E2E0032-38-95
¡ Semiconductor
MSM64172
¡ Semiconductor
This version: MSM64172
Sep. 1998
Previous version: Mar. 1996
4-Bit Microcontroller with Built-in Serial Port and LCD Driver
GENERAL DESCRIPTION
The MSM64172 is a low-power 4-bit microcontroller that incorporates Oki's original CPU core
nX-4/20. The MSM64172 has a minimum instruction execution time of 5 ms (@ 600 kHz and 3.0
V). The device includes an internal 2016-byte program memory, 128-nibble data memory, two
4-bit input-output ports, 4-bit input port, 8-bit synchronous serial port, LCD driver for up to 92
segments, and buzzer output port. Applications include low-power products with LCD
functions.
FEATURES
• Operating range
Operating frequencies
1.5 V spec.
3.0 V spec. low-speed clock
3.0 V spec. high-speed clock
Operating voltage
Operating temperature
• Memory space
Internal program memory
Internal data memory
• Minimum instruction execution time
• Serial port
• LCD driver
(1) At 1/4 duty and 1/3 bias
(2) At 1/3 duty and 1/3 bias
(3) At 1/2 duty and 1/2 bias
• Buzzer driver
• Watchdog timer
• Clock
CPU clock
Time base clock
• Power supply voltage
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
32.768 kHz (crystal oscillation)
32.768 kHz (crystal oscillation)
600 kHz maximum
(RC oscillation/ceramic resonator oscillation)
0.9 to 1.8 V (1.5 V spec.)
1.8 to 3.6 V (3.0 V spec.)
–10 to +65°C
2016 bytes
128 nibbles
5 ms @ 600 kHz (3.0 V spec. only)
91.6 ms @ 32.768 kHz
Clock synchro, 8-bit data transfer
27 outputs (duty ratio switchable by software)
92 segments (max.)
72 segments (max.)
50 segments (max.)
1 output; ON/OFF controllable in four modes
32.768 kHz crystal oscillator
RC oscillator/ceramic oscillator (600 kHz max.)
for high-speed clock (only for 3.0 V spec.)
32.768 kHz
Switchable to high-speed clock by software
(only for 3.0 V spec.)
32.768 kHz
1.5 V/3.0 V (selectable by mask option), low
power consumption
1/29
¡ Semiconductor
• I/O port
Input-output port
Input port
MSM64172
:
:
• Interrupt sources
External interrupt
:
Internal interrupt
:
• Package options:
56-pin plastic QFP (QFP56-P-910-0.65-K)
56-pin plastic QFP (QFP56-P-910-0.65-2K)
Chip
2 ports ¥ 4 bits
1 port ¥ 4 bits
(16 out of the 27 LCD driver outputs can be
used as output-only ports by a mask option.)
2 sources
5 sources
: (Product name : MSM64172-¥¥¥GS-K)
: (Product name : MSM64172-¥¥¥GS-2K)
: (Product name : MSM64172-¥¥¥)
¥¥¥ indicates a code number.
2/29
TR0
ROM
2016B
TR1
HALT
ALU
C
A11 to A8
A7 to A0
H
(4)
A
(4)
MIEF
B
L
X
S0
S1
PORT ADDRESS
(4)
PCH
PCM PCL
LCD
RAM
128N
Y
¡ Semiconductor
BSR
TR2
VSS1
VSS2
VSS3
C1
C2
BLOCK DIAGRAM
BIAS
S22
COM3/S23
COM2/S24
COM1
COM0
VSS
DB7 to DB0
OSC2
OSC1
XT
XT
TBC
3
TST1
TST2
TST
VSSL
VR
SP
ROMR
IR
RSTG
TIMING
CONTROLLER
IR
DECODER
RESET
2CLK
(8)
P1
P2
SIOP
INT
(8)
INT
INT
INT
P1.0
P1.1
P2.3
VSS
P0
PORT ADDRESS
P0.0
P0.1
P0.2
P0.3
DB7 to DB0
VSS
INTC
BD
INT
BD
3/29
is the CPU core (nX–4/20).
VDD
MSM64172
WDT
¡ Semiconductor
MSM64172
56
55
54
53
52
51
50
49
48
47
46
45
44
43
S11/P5.3
S12/P6.0
S13/P6.1
S14/P6.2
S15/P6.3
S16
S17
(VDD)
S18
S19
S20
S21
S22
COM3/S23
PIN CONFIGURATION (TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
42
41
40
39
38
37
36
35
34
33
32
31
30
29
COM2/S24
COM1
COM0
C2
C1
VSS3
VSS2
VSS1
VSSL
OSC1
OSC2
XT
XT
RESET
P1.3
P2.0
P2.1
P2.2
P2.3
VSS
VDD
P0.0
P0.1
P0.2
P0.3
BD
TST1
TST2
15
16
17
18
19
20
21
22
23
24
25
26
27
28
S10/P5.2
S9/P5.1
S8/P5.0
S7/P4.3
S6/P4.2
S5/P4.1
S4/P4.0
S3/P3.3
S2/P3.2
S1/P3.1
S0/P3.0
P1.0
P1.1
P1.2
56-Pin Plastic QFP
Note: Pin 49 is internally connected to VDD, and VDD should be supplied from pin 21.
4/29
¡ Semiconductor
MSM64172
PIN DESCRIPTIONS
Basic Functions
Function
Power Supply
Oscillation
Symbol
VDD
Type
—
VSS1
VSS2
—
—
Bias output for driving LCD (–1.5 V), or negative power supply at 1.5 V spec.
Bias output for driving LCD (–3.0 V), or negative power supply at 3.0 V spec.
VSS3
—
Bias output for driving LCD (–4.5 V).
VSS
—
Negative power supply for I/O port interface
VSSL
—
Negative power supply for internal logic (internally generated constant voltage)
C1, C2
—
Pins for connecting a capacitor for generating VSS1, VSS2, and VSS3.
Description
0 V power supply
XT
I
XT
O
OSC1
I
OSC2
O
should be connected to these pins.
P0.0 to P0.3
I
Input port
P1.0 to P2.3
I/O
BD
O
Buzzer driver pin
S16 to S22
O
LCD driver pins
S0/P3.0 to
S15/P6.3
O
LCD driver pins or output ports by mask option
COM3/S23
O
LCD common 3 signal output pin, or segment signal output pin
during 1/3 or 1/2 duty
COM2/S24
O
LCD common 2 signal output pin, or segment signal output pin
during 1/2 duty
COM1
O
LCD common 1 signal output pin
COM0
O
LCD common 0 signal output pin
RESET
I
Reset pin
TST1
I
TST2
I
32.768 kHz crystal connection pins
High-speed clock pins :
A ceramic resonator and capacitors, or an external oscillation resistor (ROS),
Ports
Reset
Test
Input-output ports
Input pins for testing
Secondary Functions
Symbol
Type
Description
P1.3
I
Serial data input pin (SIN)
P2.0
O
Serial data output pin (SOUT)
P2.1
O
Serial communication ready signal output pin (SPR)
P2.2
I/O
Serial communication clock input-output pin (SCLK)
P2.3
O
High-speed oscillation clock monitor pin for system clock (MON)
5/29
¡ Semiconductor
MSM64172
MEMORY MAPS
Program Memory
Test program area
07FFH
32 bytes
07E0H
2016 bytes
03EH
Interrupt area
020H
Contents of Interrupt Area
03BH
038H
035H
032H
029H
026H
023H
Watchdog timer interrupt
External interrupt (0)
Serial port interrupt
External interrupt (1)
32 Hz interrupt
16 Hz interrupt
1 Hz interrupt
Call zero page (CZP)
area
010H
000H
Start address
8 bits
Program Memory Map
Address 000H is the instruction execution start address after a system reset. The call zero page
(CZP) area from address 010H to address 01FH assigns the start address for the CZP subroutine
of one-byte call instruction.
The start address of an interrupt subroutine is assigned to the interrupt address from address
02DH to 03DH. The user area has 2016 bytes at addresses 000H to 07DFH. No program can be
stored in the test program area.
6/29
¡ Semiconductor
MSM64172
Data Memory
The data memory area consists of 8 banks and each bank has 256 nibbles (256 ¥ 4 bits).
The data RAM is assigned to BANK 7 and peripheral ports are assigned to BANK 0.
7FFH
780H
77FH
700H
BANK 7
Data RAM area
Data/Stack area (128 nibbles)
Unused area
Contents of 000H to 07FH
07FH
Inaccessible area
SFR area
0FFH
080H
07FH
Unused area
BANK 0
000H
000H
4 bits
Data Memory Map
The data RAM area (128 nibbles) is shared by the stack area. The stack is a memory starting from
address 7FFH toward the low-order addresses where 4 nibbles are used by Subroutine Call
Instruction and 8 nibbles are used by an interrupt.
The addresses 080H to 0FFH of BANK 0 and the addresses 700H to 77FH of BANK 7 are not
assigned as the data memory, so access to these addresses has no effect. Moreover, it is
impossible to access BANK 1 to BANK 6.
7/29
¡ Semiconductor
MSM64172
ABSOLUTE MAXIMUM RATINGS (1.5 V Spec.)
(VDD = 0 V)
Symbol
Condition
Rating
Unit
Power Supply Voltage 1
Parameter
VSS1
Ta = 25°C
–2.0 to +0.3
V
Power Supply Voltage 2
VSS2
Ta = 25°C
–4.0 to +0.3
V
Power Supply Voltage 3
VSS3
Ta = 25°C
–5.5 to +0.3
V
Power Supply Voltage 4
VSSL
Ta = 25°C
–2.0 to +0.3
V
Power Supply Voltage 5
VSS
Ta = 25°C
–5.5 to +0.3
V
Input Voltage 1
VIN1
VSS1 Input, Ta = 25°C
VSS1 – 0.3 to +0.3
V
Input Voltage 2
VIN2
VSS Input, Ta = 25°C
VSS – 0.3 to +0.3
V
Input Voltage 3
VIN3
VSSL Input, Ta = 25°C
VSSL – 0.3 to +0.3
V
Output Voltage 1
VOUT1
VSS1 Output, Ta = 25°C
VSS1 – 0.3 to +0.3
V
Output Voltage 2
VOUT2
VSS2 Output, Ta = 25°C
VSS2 – 0.3 to +0.3
V
Output Voltage 3
VOUT3
VSS3 Output, Ta = 25°C
VSS3 – 0.3 to +0.3
V
Output Voltage 4
VOUT4
VSS Output, Ta = 25°C
VSS – 0.3 to +0.3
V
Output Voltage 5
VOUT5
VSSL Output, Ta = 25°C
VSSL – 0.3 to +0.3
V
Storage Temperature
TSTG
—
–55 to +150
°C
RECOMMENDED OPERATING CONDITIONS (1.5 V Spec.)
(VDD = 0 V)
Parameter
Operating Temperature
Operating Voltage
Crystal Oscillation Frequency
Symbol
Condition
Range
Unit
Top
VSS1
—
–10 to +65
°C
—
–1.8 to –0.9
V
VSS
—
–5.25 to VSS1
V
fXT
—
30 to 35
kHz
8/29
¡ Semiconductor
MSM64172
ELECTRICAL CHARACTERISTICS (1.5 V Spec.)
DC Characteristics
(VDD = 0 V, VSS1 = VSS = –1.5 V, Ta = –10 to +65°C unless otherwise specified)
Parameter
Condition
Symbol
VSS2 Voltage
VSS2
Ca, Cb, C12 = 0.2 mF
VSS3 Voltage
VSS3
Ca, Cb, C12 = 0.2 mF
VSSL Voltage
VSSL
Crystal Oscillation
Start Voltage
Crystal Oscillation
Hold Voltage
Crystal Oscillation
Stop Detection Time
Internal Crystal
Oscillator Capacitance
External Crystal
Oscillator Capacitance
Internal Crystal
Oscillator Capacitance
POR Generation
Voltage
POR Non-generation
Voltage
VSTA
–10%
+100%
–10%
—
Oscillation start time:
within 5 seconds
Typ.
Max.
Unit
–3.2
–3.0
–2.7
V
–4.7
–4.5
–4.1
V
–1.9
–1.3
–0.6
V
—
—
–0.9
V
VHOLD
—
—
—
–0.9
V
TSTOP
—
0.1
—
1000
ms
CG
—
12
15
20
pF
12
—
30
pF
12
15
20
pF
–0.4
—
0
V
–1.5
—
–1.2
V
Ta = –10 to +30°C
—
3
5
mA
Ta = +30 to +65°C
—
3
20
mA
CGEX
When external CG used
—
CD
VPOR1
VPOR2
Supply Current 1
IDD1
Supply Current 2
IDD2
When VSS1 is between VPOR1
and –1.5 V
No POR when VSS1 is between
VPOR2 and –1.5 V
CPU in halt state
CPU in operating Ta = –10 to +30°C
—
8
15
mA
state
Ta = +30 to +65°C
—
8
25
mA
Ta = –10 to +30°C
—
10
25
mA
Ta = +30 to +65°C
—
10
40
mA
Serial transfer,
Supply Current 3
+100%
Min.
IDD3
fSCK = 300 kHz,
CPU in operating
state
Measuring
Circuit
1
Notes: 1. "POR" denotes Power On Reset.
2. "TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the
system reset occurs.
9/29
¡ Semiconductor
MSM64172
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = VSS = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –10 to +65°C unless otherwise specified)
Parameter
(Pin Name)
Condition
Symbol
Min.
Typ.
Max.
Unit
IOH1
VOH1 = –0.5 V
–2.1
–0.7
–0.2
mA
IOL1
VOL1 = VSS + 0.5 V
0.2
0.7
2.1
mA
IOH1S
VSS = –5 V, VOH1S = –0.5 V
–9.0
–3.0
–1.0
mA
IOL1S
VSS = –5 V, VOL1 = VSS + 0.5 V
1.0
3.0
9.0
mA
Output Current 2
(BD)
IOH2
VOH2 = –0.7 V
–1.8
–0.6
–0.2
mA
IOL2
VOL2 = VSS1 + 0.7 V
0.2
0.6
1.8
mA
Output Current 3
(When S0 to S15 are
configured as output
ports)
(P3.0 to P3.3)
(P4.0 to P4.3)
(P5.0 to P5.3)
(P6.0 to P6.3)
IOH3
VOH3 = –0.5 V
–1.5
–0.5
–0.1
mA
IOL3
VOL3 = VSS + 0.5 V
0.1
0.5
1.5
mA
IOH3S
VSS = –5 V, VOH3S = –0.5 V
–2.0
–0.7
–0.2
mA
IOL3S
VSS = –5 V, VOL3S = VSS + 0.5 V
0.2
0.7
2.0
mA
IOH4
VOH4 = –0.2 V
(VDD level)
—
—
–4.0
mA
IOMH4
VOMH4 = VSS1 + 0.2 V (VSS1 level)
4.0
—
—
mA
IOMH4S
VOMH4S = VSS1 – 0.2 V (VSS1 level)
—
—
–4.0
mA
IOML4
VOML4 = VSS2 + 0.2 V (VSS2 level)
4.0
—
—
mA
IOML4S
VOML4S = VSS2 – 0.2 V (VSS2 level)
—
—
–4.0
mA
IOL4
VOL4 = VSS3 + 0.2 V
4.0
—
—
mA
IOOH
VOH = VDD
—
—
0.3
mA
IOOL
VOL = VSS
–0.3
—
—
mA
Output Current 1
(P1.0 to P1.3)
(P2.0 to P2.3)
Output Current 4
(S0 to S22)
(COM0 to COM3)
Output Leakage Current
(P1.0 to P1.3)
(P2.0 to P2.3)
(VSS3 level)
Measuring
Circuit
2
10/29
¡ Semiconductor
MSM64172
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = VSS = –1.5 V, VSS2 = –3.0 V, VSS3 = –4.5 V,
Ta = –10 to +65°C unless otherwise specified)
Parameter
(Pin Name)
Symbol
Condition
Min.
Typ.
Max.
Unit
IIH1
VIH1 = VDD (when pulled down)
5.0
18
60
mA
IIL1
VIL1 = VSS (when pulled up)
–60
–18
–5.0
mA
IIH1S
VIH1 = VDD, VSS = –5 V (when pulled down)
70
250
660
mA
IIL1S
VIL1 = VSS = –5 V (when pulled up) –660
–250
–70
mA
IIH1Z
VIH1 = VDD (in a high impedance state)
0
—
1.0
mA
IIL1Z
VIL1 = VSS (in a high impedance state)
–1.0
—
0
mA
Input Current 2
(OSC1)
IIH2
VIH2 = VDD
0
—
1.0
mA
IIL2
VIL2 = VSS1
–60
–22
–6.0
mA
Input Current 3
(RESET, TST1, TST2)
IIH3
VIH3 = VDD
0
—
1.0
mA
IIL3
VIL3 = VSS1
–1.5
–0.75
–0.3
mA
Input Current 1
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
Input Voltage 1
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
VIH1
—
–0.3
—
0
V
VIL1
—
–1.5
—
–1.2
V
VIH1S
VSS = –5 V
–1.0
—
0
V
VIL1S
VSS = –5 V
–5.0
—
–4.0
V
Input Voltage 2
(RESET, TST1, TST2)
VIH2
—
–0.3
—
0
V
VIL2
—
–1.5
—
–1.2
V
Hysteresis Width
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
DVT1
—
0.05
0.1
0.3
V
DVT1S
0.25
1.0
1.5
V
Hysteresis Width
(RESET, TST1, TST2)
DVT2
—
0.05
0.1
0.3
V
Input Pin Capacitance
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
CIN
—
—
—
5.0
pF
VSS = –5 V
Measuring
Circuit
3
4
1
11/29
¡ Semiconductor
MSM64172
Measuring circuit 1
XT
Crystal
V
32.768 kHz DD
MSM64172
(1.5 V Spec.)
XT
CG
C1
VSSL
VDD
C2
VSS1
A
Cl
C12
VSS2
VSS3
Ca
VSS
Note :
Connect
a 15 pF
capacitor
if CG is external.
Cb
V
V
V
Ca, Cb, C12
Cl
: 0.2 mF
: 0.1 mF
Measuring circuit 2
(*2)
VIH
VDD
VSS1
VSS2
VSS3
OUTPUT
VIL
INPUT
(*1)
A
MSM64172
(1.5 V Spec.)
VSSL
VSS
12/29
¡ Semiconductor
MSM64172
Measuring circuit 3
(*3)
MSM64172
(1.5 V Spec.)
INPUT
VDD
OUTPUT
A
VSS1
VSS2
VSS3
VSSL
VSS
Measuring circuit 4
VIH
VDD
VSS1
VSS2
VSS3
OUTPUT
VIL
INPUT
(*3)
MSM64172
(1.5 V Spec.)
VSSL
Waveform
Monitoring
VSS
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
13/29
¡ Semiconductor
MSM64172
AC Characteristics (Serial Interface)
(VDD = 0 V, VSS1 = –1.5 V, VSS = –5 V, Ta = –10 to +65°C unless otherwise specified)
Parameter
SCLK Input Fall Time
Symbol
Condition
Min.
tf
—
—
Typ. Max.
—
1.0
Unit
ms
tr
—
—
—
1.0
ms
SCLK Input "L" Level Pulse Width
tCWL
—
0.8
—
—
ms
SCLK Input "H" Level Pulse Width
tCWH
tCYC
—
0.8
—
—
ms
1.8
—
—
ms
—
30.5
—
ms
SCLK Input Rise Time
SCLK Input Cycle Time
SCLK Output Cycle Time
VSS = –5.25 V to VSS1
tCYC1(O) CPU operating at 32.768 kHz
SOUT Output Delay Time
SIN Input Setup Time
tDDR
0.4
ms
—
—
0.5
—
tDS
—
ms
SIN Input Hold TIme
tDH
—
0.8
—
—
—
Cl = 10 pF
ms
AC characteristics timing
("H" level = 0.2 · VSS, "L" level = 0.8 · VSS)
tCYC
SCLK
(P2.2)
0V
tr
tf
tCWH
tCWL
tDDR
tDDR
SOUT
(P2.0)
0V
tDS
SIN
(P1.3)
tDH
tDS
0V
14/29
¡ Semiconductor
MSM64172
ABSOLUTE MAXIMUM RATINGS (3.0 V Spec.)
(VDD = 0 V)
Parameter
Power Supply Voltage 1
Symbol
Condition
Rating
Unit
VSS1
Ta = 25°C
–2.0 to +0.3
V
Power Supply Voltage 2
VSS2
Ta = 25°C
–4.0 to +0.3
V
Power Supply Voltage 3
VSS3
Ta = 25°C
–5.5 to +0.3
V
Power Supply Voltage 4
VSSL
Ta = 25°C
–4.0 to +0.3
V
Power Supply Voltage 5
VSS
Ta = 25°C
–5.5 to +0.3
V
Input Voltage 1
VIN1
VSS2 Input, Ta = 25°C
VSS2 – 0.3 to +0.3
V
Input Voltage 2
VIN2
VSS Input, Ta = 25°C
VSS – 0.3 to +0.3
V
Input Voltage 3
VIN3
VSSL Input, Ta = 25°C
VSSL – 0.3 to +0.3
V
Output Voltage 1
VOUT1
VSS2 Output, Ta = 25°C
VSS2 – 0.3 to +0.3
V
Output Voltage 2
VOUT2
VSS3 Output, Ta = 25°C
VSS3 – 0.3 to +0.3
V
Output Voltage 3
VOUT3
VSS Output, Ta = 25°C
VSS – 0.3 to +0.3
V
Output Voltage 4
VOUT4
VSSL Output, Ta = 25°C
VSSL – 0.3 to +0.3
V
Storage Temperature
TSTG
—
–55 to +150
°C
RECOMMENDED OPERATING CONDITIONS (3.0 V Spec.)
(VDD = 0 V)
Parameter
Symbol
Condition
Range
Unit
Top
—
–10 to +65
°C
VSS2
—
–3.6 to –1.8
V
VSS
—
–5.25 to –1.8
V
External RC Oscillator Resistance
ROS
—
90 to 500
kW
Crystal Oscillation Frequency
fXT
—
30 to 66
kHz
fCM
VSS2 = –3.6 V to –2.2 V
200 to 600
kHz
Operating Temperature
Operating Voltage
Ceramic Resonator Oscillation
Frequency
15/29
¡ Semiconductor
MSM64172
ELECTRICAL CHARACTERISTICS (3.0 V Spec.)
DC Characteristics
Parameter
(VDD = 0 V, VSS2 = VSS = –3.0 V, Ta = –10 to +65°C unless otherwise specified)
Symbol
Condition
VSS1 Voltage
VSS1
Ca, Cb, C12 = 0.1 mF
VSS3 Voltage
VSS3
Ca, Cb, C12 = 0.1 mF
VSSL Voltage
VSSL
Crystal Oscillation
Start Voltage
Crystal Oscillation
Hold Voltage
Crystal Oscillation
Stop Detection Time
Internal Crystal
Oscillator Capacitance
External Crystal
Oscillator Capacitance
Internal Crystal
Oscillator Capacitance
Internal RC
Oscillator Capacitance
RC Oscillation
Frequency
POR Generation
Voltage
POR Non-generation
Voltage
VSTA
+100%
–50%
+100%
–50%
—
Oscillation start time:
within 5 seconds
Min.
Typ.
Max.
Unit
–1.7
–1.5
–1.3
V
–4.7
–4.5
–4.3
V
–1.9
–1.3
–0.6
V
—
—
–1.8
V
VHOLD
—
—
—
–1.8
V
TSTOP
—
0.1
—
1000
ms
CG
—
12
15
20
pF
12
—
30
pF
CGEX
When external CG used
CD
—
12
15
20
pF
COS
—
8.0
12
16
pF
280
560
800
kHz
–0.7
—
0
V
–3.0
—
–2.0
V
fOSC
VPOR1
VPOR2
External resistor ROS = 100 kW
VSS2 = –1.8 to –3.6 V
When VSS2 is between VPOR1
and –3.0 V
No POR when VSS2 is between
VPOR2 and –3.0 V
Measuring
Circuit
1
Notes: 1. "POR" denotes Power On Reset.
2. "TSTOP" indicates that if the crystal oscillator stops over the value of TSTOP, the
system reset occurs.
16/29
¡ Semiconductor
MSM64172
DC Characteristics (continued)
(VDD = 0 V, VSS2 = VSS = –3.0 V, Ta = –10 to +65°C unless otherwise specified)
Parameter
Condition
Min.
Typ.
Max.
Unit
Ta = –10 to +30°C
—
1.5
3
mA
oscillation stop) Ta = +30 to +65°C
—
1.5
15
mA
Ta = –10 to +30°C
—
5.0
13
mA
Ta = +30 to +65°C
—
5.0
25
mA
—
220
500
mA
—
170
400
mA
Ta = –10 to +30°C
—
7.0
25
mA
(High-speed clock Ta = +30 to +65°C
oscillation stop)
—
7.0
40
mA
Symbol
CPU in halt state
Supply Current 1
IDD1
IDD2
state
(High-speed clock
oscillation stop)
Supply Current 3
IDD3
Supply Current 4
IDD4
Circuit
(High-speed clock
CPU in operating
Supply Current 2
Measuring
CPU operating at 400 kHz
(RC oscillation)
CPU operating at 500 kHz
(ceramic oscillation)
1
Serial transfer,
fSCK = 300 kHz,
Supply Current 5
IDD5
CPU in operating
state
17/29
¡ Semiconductor
MSM64172
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = VSS = –3.0 V, VSS3 = –4.5 V,
Ta = –10 to +65°C unless otherwise specified)
Parameter
(Pin Name)
Condition
Symbol
Min.
Typ.
Max.
Unit
IOH1
VOH1 = –0.5 V
–6.0
–2.0
–0.7
mA
IOL1
VOL1 = VSS + 0.5 V
0.7
2.0
6.0
mA
IOH1S
VSS = –5 V, VOH1S = –0.5 V
–9.0
–3.0
–1.0
mA
IOL1S
VSS = –5 V, VOL1 = VSS + 0.5 V
1.0
3.0
9.0
mA
Output Current 2
(BD)
IOH2
VOH2 = –0.7 V
–6.0
–2.0
–0.7
mA
IOL2
VOL2 = VSS2 + 0.7 V
0.7
2.0
6.0
mA
Output Current 3
(When S0 to S15 are
configured as output
ports)
(P3.0 to P3.3)
(P4.0 to P4.3)
(P5.0 to P5.3)
(P6.0 to P6.3)
IOH3
VOH3 = –0.5 V
–1.5
–0.6
–0.15
mA
IOL3
VOL3 = VSS + 0.5 V
0.15
0.6
1.5
mA
IOH3S
VSS = –5 V, VOH3S = –0.5 V
–2.0
–0.7
–0.2
mA
IOL3S
VSS = –5 V, VOL3S = VSS + 0.5 V
0.2
0.7
2.0
mA
IOH4
VOH4 = –0.2 V
(VDD level)
—
—
–4.0
mA
IOMH4
VOMH4 = VSS1 + 0.2 V (VSS1 level)
4.0
—
—
mA
IOMH4S
VOMH4S = VSS1 – 0.2 V (VSS1 level)
—
—
–4.0
mA
IOML4
VOML4 = VSS2 + 0.2 V (VSS2 level)
4.0
—
—
mA
IOML4S
VOML4S = VSS2 – 0.2 V (VSS2 level)
—
—
–4.0
mA
IOL4
VOL4 = VSS3 + 0.2 V
4.0
—
—
mA
IOH5R
VOH5R = –0.5 V (RC oscillation mode) –6.0
–2.0
–0.7
mA
IOL5R
VOL5R = VSS + 0.5 V (RC oscillation mode)
2.0
6.0
mA
IOH5C
VOH5C = –0.5 V
–35
–10
mA
IOL5C
VOL5C = VSS2 + 0.5 V (ceramic oscillation mode)
10
35
100
mA
IOOH
VOH = VDD
—
—
0.3
mA
IOOL
VOL = VSS
–0.3
—
—
mA
Output Current 1
(P1.0 to P1.3)
(P2.0 to P2.3)
Measuring
Circuit
2
Output Current 4
(S0 to S22)
(COM0 to COM3)
Output Current 5
(OSC2)
Output Leakage Current
(P1.0 to P1.3)
(P2.0 to P2.3)
(VSS3 level)
0.7
(ceramic oscillation mode) –100
18/29
¡ Semiconductor
MSM64172
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = VSS = –3.0 V, VSS3 = –4.5 V,
Ta = –10 to +65°C unless otherwise specified)
Parameter
(Pin Name)
Input Current 1
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
Input Current 2
(OSC1)
Input Current 3
(RESET, TST1, TST2)
Input Voltage 1
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
Symbol
Condition
Min.
Typ.
Max.
Unit
IIH1
VIH1 = VDD (when pulled down)
30
90
300
mA
IIL1
VIL1 = VSS (when pulled up)
–300
–90
–30
mA
IIH1S
VIH1 = VDD, VSS = –5 V (when pulled down)
80
250
800
mA
IIL1S
VIL1 = VSS = –5 V (when pulled up) –800
–250
–80
mA
IIH1Z
VIH1 = VDD (in a high impedance state)
0
—
1.0
mA
IIL1Z
VIL1 = VSS (in a high impedance state)
–1.0
—
0
mA
IIL2
VIL2 = VSS2 (when pulled up)
–300
–110
–30
mA
IIH2Z
VIH2 = VDD (RC oscillation mode)
0
—
1
mA
IIL2Z
VIL2 = VSS2 (RC oscillation mode)
–1
—
0
mA
IIH2C
VIH2 = VDD (ceramic oscillation mode)
0.75
1.5
3
mA
IIL2C
VIL2 = VSS2 (ceramic oscillation mode)
–3
–1.5
–0.75
mA
IIH3
VIH3 = VDD
0
—
1.0
mA
IIL3
VIL3 = VSS2
–3.0
–1.5
–0.75
mA
VIH1
—
–0.6
—
0
V
VIL1
—
–3.0
—
–2.4
V
VIH1S
VSS = –5 V
–1.0
—
0
V
VIL1S
VSS = –5 V
–5.0
—
–4.0
V
Input Voltage 2
(OSC1)
VIH2
—
–0.6
—
0
V
VIL2
—
–3.0
—
–2.4
V
Input Voltage 3
(RESET, TST1, TST2)
VIH3
—
–0.6
—
0
V
VIL3
—
–3.0
—
–2.4
V
Measuring
Circuit
3
4
19/29
¡ Semiconductor
MSM64172
DC Characteristics (continued)
(VDD = 0 V, VSS1 = VSSL = –1.5 V, VSS2 = VSS = –3.0 V, VSS3 = –4.5 V,
Ta = –10 to +65°C unless otherwise specified)
Parameter
(Pin Name)
Hysteresis Width
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
Symbol
Condition
—
DVT1
DVT1S
VSS = –5 V
Min.
Typ.
Max.
Unit
0.2
0.5
1.0
V
0.25
1.0
1.5
V
Measuring
Circuit
4
Hysteresis Width
(RESET, TST1, TST2)
DVT2
—
0.2
0.5
1.0
V
Input Pin Capacitance
(P0.0 to P0.3)
(P1.0 to P1.3)
(P2.0 to P2.3)
CIN
—
—
—
5.0
pF
1
20/29
¡ Semiconductor
MSM64172
Measuring circuit 1
External Circuit (*)
XT
OSC1
q
w
MSM64172
(3.0 V Spec.)
OSC2
Crystal
32.768 kHz VDD
XT
C1
VSSL
VDD
VSS2
A
Cl
C12
C2
VSS1
VSS3
Ca
VSS
* : Connect as follows.
Cb
V
V
CG
Note:
Connect a 15 pF
capacitor if CG is
external.
q
V
ROS
w
Ca, Cb, C12
Cl
ROS
CL1
CL2
Ceramic resonator
:
:
:
:
:
:
In ceramic resonator oscillation mode
VDD
0.1 mF
0.47 mF
100 kW
100 pF
100 pF
CSB500E (500 kHz)
(Murata MFG.-make)
q
CL1
Ceramic resonator
w
CL2
Measuring circuit 2
(*2)
A
VIL
MSM64172
(3.0 V Spec.)
INPUT
(*1)
VDD
OUTPUT
VIH
VSS1
VSS2
VSS3
VSSL
VSS
21/29
¡ Semiconductor
MSM64172
Measuring circuit 3
(*3)
OUTPUT
INPUT
A
MSM64172
(3.0 V Spec.)
VDD
VSS1
VSS2
VSS3
VSSL
VSS
Measuring circuit 4
VIL
MSM64172
(3.0 V Spec.)
INPUT
(*3)
VDD
OUTPUT
VIH
VSS1
VSS2
VSS3
VSSL
Waveform
Monitoring
VSS
*1 Input logic circuit to determine the specified measuring conditions.
*2 Measured at the specified output pins.
*3 Measured at the specified input pins.
22/29
¡ Semiconductor
MSM64172
AC Characteristics (Serial Interface)
(VDD = 0 V, VSS2 = –3 V, VSS = –5 V, Ta = –10 to +65°C unless otherwise specified)
Parameter
SCLK Input Fall Time
Symbol
Condition
Min.
tf
—
—
Typ. Max.
—
1.0
Unit
ms
tr
—
—
—
1.0
ms
SCLK Input "L" Level Pulse Width
tCWL
—
0.8
—
—
ms
SCLK Input "H" Level Pulse Width
tCWH
tCYC
—
0.8
—
—
ms
1.8
—
—
ms
SCLK Input Rise Time
SCLK Input Cycle Time
VSS = –5.25 V to –2.4 V
SCLK Output Cycle Time
tCYC1(O) CPU operating at 32.768 kHz
—
30.5
—
ms
SCLK Output Cycle Time
tCYC2(O) CPU operating at 500 kHz
—
2.0
—
ms
—
0.4
ms
—
—
—
—
ms
SOUT Output Delay Time
SIN Input Setup Time
tDDR
tDS
—
—
0.5
SIN Input Hold TIme
tDH
—
0.8
Cl = 10 pF
ms
AC characteristics timing
("H" level = 0.2 · VSS, "L" level = 0.8 · VSS)
tCYC
SCLK
(P2.2)
0V
tr
tf
tCWH
tCWL
tDDR
tDDR
SOUT
(P2.0)
0V
tDS
SIN
(P1.3)
tDH
tDS
0V
23/29
¡ Semiconductor
MSM64172
FUNCTIONAL DESCRIPTION
CPU Peripheral Functions
• Serial port (SIOP)
The MSM64172 has an 8-bit synchronous serial port. Receive/transmit operation of the serial
port is performed simultaneously and the serial transfer clock can select either internal or
external mode. Direction of transfer data can be big endian or little endian. Each pin of the serial
port is assigned as secondary functions of P1.3 and P2.0 to P2.2. Setting each bit of SIN, SOUT,
SPR, and SCLK of P13CON and P20CON to P22CON to "1" makes each pin valid.
• LCD driver (LCD)
The MSM64172 has a built-in LCD driver for 27 outputs.
The LCD driver consists of display registers (DSPR0-30), the Display Control Register (DSPCON),
a 27-output LCD driver circuit, and a bias generation circuit (BIAS).
There are three types of driving methods: 1/4 duty, 1/3 duty, and 1/2 duty. Software selects
the duty mode.
S0 to S15 of the LCD driver can be configured to be output ports by a mask option.
The relationship between the duty, the bias method, and the maximum segment number follows:
1/4 duty 1/3 bias method ------- 92 segments (COM0-3, S0-22)
1/3 duty 1/3 bias method ------- 72 segments (COM0-2, S0-23)
1/2 duty 1/2 bias method ------- 50 segments (COM0, 1, S0-24)
• Buzzer driver (BD)
The MSM64172 has a built-in buzzer driver with 2 buzzer output frequencies and 4 buzzer output
modes. Each buzzer output is selected by the Buzzer Control Register (BDCON) and the Buzzer
Frequency Control Register (BFCON).
• Watchdog timer (WDT)
The MSM64172 has a built-in watchdog timer to detect CPU malfunction. The watchdog timer
is composed of a 6-bit watchdog timer counter (WDTC) to count a 16 Hz output and a watchdog
timer control register (WDTCON) to reset WDTC.
• Clock generation circuit (2CLK)
The Clock Generation Circuit (2CLK) consists of a 32.768 kHz crystal oscillation circuit, a highspeed clock generation circuit, and clock control logic. 2CLK generates the system clock (CLK)
and the time-base clock (32.768 kHz).
The high-speed clock generation circuit is available only for use in 3 V operation, and offers two
modes, the RC Oscillation Mode and the Ceramic Resonator Oscillation Mode.
The system clock is the source clock for the CPU. The time-base clock is the source clock for the
TBC and BD.
The system clock frequency is 32.768 kHz, which is output from the crystal oscillation circuit in
1.5 V operation. In 3.0 V operation, the system clock can be switched to 32.768 kHz, which is
output from the crystal oscillation circuit, or to the frequency that is output from the high-speed
clock oscillation circuit by controlling the contents of Frequency Control Register (FCON). The
desired high-speed clock oscillation circuit mode also can be selected by using FCON.
24/29
¡ Semiconductor
MSM64172
• Time base counter (TBC)
The MSM64172 has a built-in time base counter (TBC) that generates clocks to be supplied to
internal peripheral circuits. The time base counter is composed of 15 binary counters. The count
clock of the time base is driven by the oscillation clock (32.768 kHz) of the crystal oscillation
circuit. The output of the time base counter is used for the buzzer driver, the system reset circuit,
the watchdog timer, the time base interrupt, and the sampling clocks of each port.
• I/O port
Input-output ports (P1, P2) (8 bits)
Input port (P0) (4 bits)
: Pull-up (pull-down) resistor input or highimpedance input, CMOS output or NMOS
open drain output: these can be specified for
each bit; external 0 interrupt
: Pull-up (pull-down) resistor input or highimpedance input; external 1 interrupt
• Interrupt (INTC)
The MSM64172 has seven interrupt sources (seven vector addresses), of which two are external
interrupts from ports and five are internal interrupts.
Of the seven interrupt sources, only the watchdog interrupt cannot be disabled (non-maskable
interrupt). The other six interrupts are controlled by the master interrupt enable flag (MI) and the
interrupt enable registers (IE0 and IE1). When an interrupt condition is met, the CPU branches
to a vector address corresponding to the interrupt source.
25/29
S22 to S0
COM3/S23
COM2/S24
COM1
32.768 kHz
COM0
1.5 V Spec. Application Circuit
OSC2
OSC1
XT
XT
RESET
MSM64172-xxx
(1.5 V Spec.)
BD
P2.3
P2.2
P2.1
P2.0
P1.3
P0.0
P0.1
P0.2
P0.3
VDD
C2
C1
C12
VSS3
Cb
VSS2
Ca
VSS
VSS1
VSSL
TST2
TST1
¡ Semiconductor
APPLICATION CIRCUITS
LCD
C1
1.5 V
Cl
• Without 5 V
interface
• CG of crystal
oscillator : Internal
26/29
MSM64172
Buzzer
MSM64172-xxx
(3 V Spec.)
P0.0
P0.1
P0.2
P0.3
VDD
C2
C1
C12
VSS3
Cb
VSS2
VSS
VSS1
VSSL
TST2
TST1
C2
3V
CS
5V
¡ Semiconductor
S22 to S0
COM3/S23
COM2/S24
COM1
CGEX
XT
XT
RESET
Ca
Cl
• With 5 V interface
• CGEX of crystal
oscillator : External
BD
P2.3
P2.2
P2.1
P2.0
P1.3
3.0 V Spec. Application Circuit
32.768 kHz
OSC2
OSC1
COM0
ROS
APPLICATION CIRCUITS (continued)
LCD
• High-speed RC
oscillation
mode selected
(with external ROS)
Buzzer
MSM64172
27/29
High-speed clock monitor
SCLK
To serial communication interface
SPR
(5 V (VSS) )
SOUT
SIN
¡ Semiconductor
MSM64172
PACKAGE DIMENSIONS
(Unit : mm)
QFP56-P-910-0.65-K
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.36 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
28/29
¡ Semiconductor
MSM64172
(Unit : mm)
QFP56-P-910-0.65-2K
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.43 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
29/29