TPS65135 www.ti.com SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 Single-Inductor, Multiple-Output (SIMO) Regulator Check for Samples: TPS65135 FEATURES 1 • • • • • • • 2 • • • • • • • SIMO Regulator Technology 2.5 V to 5.5 V Input Voltage Range 750 mW Output Power at VIN = 2.9 V Positive Output Voltage up to 6 V Negative Output Voltage Down to –7 V 1% Output Voltage Accuracy Output Current Mismatch of pos and neg rail up to 50% Excellent Line Regulation Advanced Power-Save Mode for Light-Load Efficiency Low-Noise Operation Out-of-Audio Mode Short-Circuit Protection Thermal Shutdown 3-mm × 3-mm Thin QFN Package APPLICATIONS • • • Active-Matrix OLED Power Supply LCD Power Supply General dual power supply applications DESCRIPTION The TPS65135 is a high efficient single inductor dual output converter. Due to its single-inductor multiple-output (SIMO) technology the converter uses a minimum of external components. The device operates with a buckboost topology and generates a positive and a negative output voltage above or below the input voltage rail. The SIMO technology enables excellent line and load regulation which is for instance required to avoid disturbance of a mobile phone display as a result of input voltage variations that occur during transmit periods in mobile communication systems. The device can also be used as a standard ± supply as long as the output current mismatch between the rails is smaller than 50%. TYPICAL APPLICATION L1 2.2 mH TPS65135 16 15 VIN 2.5 V to 5.5 V 1 C1 10 mF 8 4 11 C4 100 nF 12 5 L1 L2 L1 L2 VIN OUTP EN OUTP VAUX FB PGND FBG PGND OUTN GND OUTN 14 13 10 9 R1 365 kW 7 6 VPOS 5 V / 80 mA C2 4.7 mF R2 120 kW 3 2 R3 487 kW C3 4.7 mF VNEG –5 V / 80 mA 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated TPS65135 SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) (1) TA ORDERING P/N PACKAGE PACKAGE MARKING –40°C to 85°C TPS65135RTE RTE CCR The RTE package is available in tape and reel. Add R suffix (TPS65135RTER) to order quantities of 3000 parts per reel. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. 16-PIN TQFN PACKAGE OUTN 3 VAUX 4 L1 L2 L2 13 12 PGND 11 PGND Exposed Thermal Die 10 OUTP 9 5 6 7 8 EN 2 14 FB OUTN 15 FBG 1 16 GND VIN L1 RTE Package (Top View) OUTP P0081-01 PIN FUNCTIONS PIN NAME NO. I/O DESCRIPTION EN 8 I Input pin to enable the device. Pulling this pin high enables the device. This pin has an internal 500 kΩ pulldown resistor. FB 7 I Feedback regulation input for the positive output voltage rail FBG 6 I Feedback regulation input for GND reference (regulation of the negative output voltage rail) Analog ground GND 5 – L1 15, 16 I/O Inductor terminal L2 13, 14 I/O Inductor terminal 2, 3 O Negative output OUTP 9, 10 O Positive output PGND 11, 12 – Power GND VAUX 4 I/O VIN 1 OUTN Exposed thermal die Reference voltage output. This pin requires a 100-nF capacitor for stability. I Input supply – Connect this pad to analog GND. 2 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 www.ti.com SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 FUNCTIONAL BLOCK DIAGRAM L1 L1 15 L2 16 L2 13 14 OVP VIN OUTP VAUX M4 1 Vpos 9 M1 OUTP VAUX 10 M2 FB Gate Drive EN 8 7 Bias (1.2V) UVLO Thermal Shutdown FBG 6 OUTN PGND GND 2 5 M3 Vneg 3 VAUX 4 VAUX Regulator Current Limit OUTP + VoltageControlled Oscillator VCO OUTN Current Sense/ Soft Start Ipeak – – + PWM/PFM Control Vref – + Gate Drive Out-of-Audio Mode 20 kHz OUTP OUTP OUTN Short-Circuit Protection OUTN 11 PGND 12 PGND 3 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) (2) over operating free-air temperature range (unless otherwise noted) VALUE VIN, EN, VAUX, FB, OUTP, L2 Voltage range MAX –0.3 7 V –8 7 V –0.3 0.3 V 2 kV L1, OUTN FBG Human Body Model ESD rating Machine Model Charged Device Model Continuous total power dissipation UNIT MIN 200 V 1 kV See Dissipation Ratings Table Operating junction temperature range, TJ –40 150 °C Operating ambient temperature range, TA –40 85 °C Storage temperature range, Tstg –65 150 °C (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. All voltage values are with respect to ground. THERMAL INFORMATION THERMAL METRIC (1) VALUE θJA Junction-to-ambient thermal resistance 44.8 θJCtop Junction-to-case (top) thermal resistance 42.0 θJCbot Junction-to-case (bottom) thermal resistance 4.3 θJB Junction-to-board thermal resistance 16.9 ψJT Junction-to-top characterization parameter 0.4 ψJB Junction-to-board characterization parameter 16.8 (1) UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. RECOMMENDED OPERATING CONDITIONS MIN VIN Input voltage range TYP 2.5 (1) L Inductor 1 2.2 CIN Input Capacitor (1) 4.7 10 COUTP, COUTN Output Capacitors (1) 4.7 10 TA Operating ambient temperature TJ Operating junction temperature (1) MAX UNIT 5.5 V 4.7 µH µF 20 µF –40 85 °C –40 125 °C Please refer to DETAILED DESCRIPTION for further information 4 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 www.ti.com SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 ELECTRICAL CHARACTERISTICS VIN = 3.7 V, EN = VIN, OUTP = 5 V, OUTN = –5 V, TA = –40°C to 85°C; typical values are at TA = 25°C (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VIN Input voltage range IQ Operating quiescent current into VIN ISD Shutdown current into VIN VUVLO Undervoltage lockout threshold 2.5 5.5 7 EN = low 0.1 2 VIN falling 1.8 2.1 VIN rising 2 2.3 Thermal shutdown Thermal shutdown hysteresis V mA µA V 140 °C 5 °C ENABLE VH Logic high-level voltage VIN = 2.5 V to 5.5 V VL Logic low-level voltage VIN = 2.5 V to 5.5 V REN Enable pulldown resistor 1.2 200 V 500 0.4 V 900 kΩ 6 V OUTPUT VOUTP Positive output voltage range OVPP Positive overvoltage protection VOUTN Negative output voltage range OVPN Negative overvoltage protection Imis Output current mismatch Ipos to Ineg (1) VOUTP Positive output voltage regulation VFBG Feedback ground regulation rDS(on) 3 IOUT = 10 mA 6.1 7 –2.5 IOUT = 10 mA -7.1 V –7 –7.6 –50% V V 50% -1 % 1.24 +1 % –10 0 10 M1 MOSFET on-resistance IL1 = 100 mA 250 M2 MOSFET on-resistance IL2 = 100 mA 200 M3 MOSFET on-resistance IL1 = 100 mA 500 M4 MOSFET on-resistance IL2 = 100 mA V mV mΩ 300 VIN = 3.7 V 0.9 1.2 1.6 VIN = 2.5 V 1 1.5 1.9 ISW Switch current limit (M2) POUT Output power Vpos – Vneg ≤ 10 V; VIN = 2.9 V fs Switching frequency IOUT neg = IOUT pos = 30 mA 1 MHz Line regulation positive output OUTP VIN = 2.5V to 5.5V, IOUTN = IOUTP = 5 mA 0 %/V Line regulation negative output OUTN VIN = 2.5V to 5.5V, IOUTN = IOUTP = 5 mA 0 %/V Load regulation positive output OUTP IOUTN = IOUTP = 0 mA to 80 mA 0 %/A Load regulation negative output OUTN IOUTN = IOUTP = 0 mA to 80 mA 0 %/A (1) 750 A mW See TYPICAL CHARACTERISTICS and DETAILED DESCRIPTION for more detail 5 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com Application for Typical Characteristics Measurements L1 TPS65135 16 15 1 VIN C1 8 4 11 C4 12 5 L1 L2 L1 L2 VIN EN OUTP OUTP VAUX FB PGND FBG PGND OUTN GND OUTN 14 13 10 VPOS 9 R1 C2 7 6 R2 3 2 C3 R3 VNEG Figure 1. Application Circuit for Typical Characteristics Measurements Table 1. Component List for Typical Characteristics Circuit Reference Description C1, C2, C3 10 μF, 6.3 V, 0603, X5R, ceramic Murata, GRM188R60J106ME84D Manufacturer and Part Number C4 100 nF, 10 V, 0603, X7R, ceramic Murata, GRM188R71H104KA93D L1 2.2 μH, 2.2 A, 90 mΩ, 2.5 mm * 2.0 mm * 1.2 mm Toko, DFE252012C R1 Depending on the output voltage, 1%, (all measurements with +/-5 V output voltage uses 365 kΩ) R2 Depending on the output voltage, 1%, (all measurements with +/-5 V output voltage uses 120 kΩ) R3 Depending on the output voltage, 1%, (all measurements with +/-5 V output voltage uses 487 kΩ) U1 TPS65135RTE Texas Instruments 6 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 www.ti.com SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 TYPICAL CHARACTERISTICS VPOS= 5 V, VNEG= -5 V, unless otherwise noted TABLE OF GRAPHS Figure Efficiency vs. load current with TOKO DFE252012C 2.2 µH inductor Figure 2 Efficiency vs. load current with TOKO DFE252012C 4.7 µH inductor Figure 3 Typical Output Current Window (Mismatch) IOUTP vs. IOUTN Figure 4 Operation at light load current (10mA) DCM operation Figure 5 Operation at high load current (80mA) CCM operation Figure 6 Line transient response IOUT = 10 mA Figure 7 Line transient response IOUT = 50 mA Figure 8 Start-up VIN rising, no load Figure 9 Start-up EN = high, no load Figure 10 Shut-down VIN falling, no load Figure 11 Shut-down EN = low, no load Figure 12 Transient Response IOUT = 10mA to 50mA (load between VNEG and VPOS) Figure 13 Transient Response IOUT = 20mA to 80mA (load between VNEG and VPOS) Figure 14 Switching frequency vs. load current Figure 15 Quiescent current vs. input voltage Figure 16 80 80 70 70 60 60 50 40 30 20 0 VIN = 2.5 V VIN = 3.0 V VIN = 3.7 V VIN = 4.5 V L = 2.2 µH VPOS = 5 V VNEG = −5 V 10 1 10 Current (mA) 50 40 30 20 10 100 0 VIN = 2.5 V VIN = 3.0 V VIN = 3.7 V VIN = 4.5 V L = 4.7 µH VPOS = 5 V VNEG = −5 V 1 10 Current (mA) G000 100 G000 Figure 2. Figure 3. OUTPUT CURRENT MISMATCH Positive Output Current vs. Negative Output Current OPERATION AT LIGHT LOAD CURRENT, DCM OPERATION Not allowed Area 90 L1 VIN = 3.7 V Vpos = 5 V Vneg = −5 V L = TOKO DFE252012C, 2.2µH 80 Vneg current (mA) EFFICIENCY vs. LOAD CURRENT (TOKO DFE252012C, 4.7 µH) Efficiency (%) Efficiency (%) EFFICIENCY vs LOAD CURRENT (TOKO DFE252012C, 2.2 µH) 70 60 VPOS 50 VNEG 40 30 Not allowed Area 10 0 VIN = 3.7V VPOS = 5V VNEG = -5V IOUT = 10mA IInductor 20 0 10 20 30 40 50 60 70 Vpos current (mA) 80 90 100 Figure 4. Figure 5. 7 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com OPERATION AT HIGH LOAD CURRENT, CCM OPERATION LINE TRANSIENT RESPONSE IOUT = 10 mA VIN L1 VPOS VPOS VIN = 2.9V → 3.4V VPOS = 5V VNEG = -5V IOUT = 10mA VNEG VNEG VIN = 3.7V VPOS = 5V VNEG = -5V IOUT = 80mA IInductor Figure 6. Figure 7. LINE TRANSIENT RESPONSE IOUT = 50 mA START UP VIN RISING VIN VPOS VIN = 2.9V → 3.4V VPOS = 5V VNEG = -5V IOUT = 50mA VIN VNEG VPOS VIN = 3.7V VPOS = 5V VNEG = -5V IOUT = 0mA VNEG IIN Figure 8. Figure 9. START UP EN = HIGH SHUTDOWN VIN FALLING EN VIN VNEG VPOS VPOS VIN = 3.7V VPOS = 5V VNEG = -5V IOUT = 0mA IIN VNEG VIN = 3.7V VPOS = 5V VNEG = -5V IOUT = 0mA IIN Figure 10. Figure 11. 8 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 www.ti.com SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 SHUTDOWN EN = LOW TRANSIENT RESPONSE IOUT = 10mA to 50mA EN VNEG VPOS VPOS VNEG VIN = 3.7V VPOS = 5V VNEG = -5V IOUT = 0mA IIN VIN = 3.7V VPOS = 5V VNEG = -5V IOUT IOUT_POS to NEG = 10mA → 50mA Figure 12. Figure 13. TRANSIENT RESPONSE IOUT = 20mA to 80mA SWITCHING FREQUENCY vs LOAD CURRENT Switching Frequency (MHz) VNEG VPOS IOUT IOUT_POS to NEG 2 VIN = 3.7V VPOS = 5V VNEG = -5V = 20mA → 80mA L = 2.2 µH VPOS = 5 V VNEG = −5 V 1.5 1 VIN = 2.5 V VIN = 3.1 V VIN = 3.7 V VIN = 4.6 V 0.5 0 0 10 20 30 40 50 60 70 Output Current (mA) Figure 14. 80 90 100 G000 Figure 15. QUIESCENT CURRENT vs INPUT VOLTAGE 30 IOUT = 0mA IOUT = 1mA IOUT = 2mA IOUT = 3mA IOUT = 4mA IOUT = 5mA Input Current (mA) 25 20 15 10 5 0 2.5 L = 2.2 µH VPOS = 5 V VNEG = −5 V 3 3.5 4 4.5 Input Voltage (V) 5 5.5 G000 Figure 16. 9 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com DETAILED DESCRIPTION The TPS65135 operates with a four-switch buck-boost converter topology, generating a negative and a positive output voltage with a single inductor. The device uses the SIMO regulator technology featuring best-in-class linetransient regulation, buck-boost mode for the positive and negative outputs, and highest efficiency over the entire load-current range. High efficiency over the entire load-current range is implemented by reducing the converter switching frequency. Out-of-audio mode avoids the switching frequency going below 20 kHz. As illustrated in the FUNCTIONAL BLOCK DIAGRAM, the converter operates with two control loops. One error amplifier sets the output voltage for the positive output OUTP. The ground error amplifier regulates FBG to typically 0 V. Using the external feedback divider allows setting both output voltages, OUTP and OUTN. In principle the converter topology operates just like any other buck-boost converter topology with the difference that the output voltage across the inductor is the sum of the positive and negative output voltage. With this consideration all calculations of the buck-boost converter apply for this topology as well. During the first switch cycle M1 and M2 are closed, connecting the inductor from VIN to GND. During the second switch cycle the inductor discharges to the positive and negative outputs by closing switches M4 and M3. Because the inductor is discharged to both of the outputs simultaneously, the output voltages can be higher or lower than the input voltage. Because of this the converter operates best when the current out of OUTP is equal to the current flowing into OUTN. This is for example the case when driving an AMOLED panel. Asymmetries in load current can be canceled out by the used topology. However this is only possible for current asymmetries of up to 50%. During light load the converter operates in discontinuous conduction mode. The converter operates in peak-currentmode control with the switching cycle given by an internal voltage-controlled oscillator (VCO). As the load current increases the converter operates in continuous-conduction mode. In this mode, the converter moves to peakcurrent control with the switch cycle given by the fixed off-time. The SIMO regulator topology has excellent line transient regulation when operating in discontinuous conduction mode. As the load current increases, entering continuous conduction mode, the line transient performance is linearly decreased. Advanced Power-Save Mode for Light-Load Efficiency In order to maintain high efficiency over the entire load-current range, the converter reduces its switching frequency as the load current decreases. The advanced power-save mode controls the switching frequency using a voltage-controlled oscillator (VCO). The VCO frequency is proportional to the inductor peak current, with a lower frequency limit of 20 kHz in typical applications the frequency does not go below 100 kHz. This avoids disturbance of the audio band and minimizes audible noise coming from the ceramic input and output capacitors. By maintaining a controlled switching frequency, possible EMI is minimized. This is especially important when using the device in mobile phones. See Figure 15 for typical switching frequency versus load current. For zero load an internal shunt regulator ensures stable output voltage regulation. Buck-Boost Mode Operation Buck-boost mode operation allows the input voltage to be higher or lower than the output voltage. This mode allows the use of batteries and supply voltages that are above the output voltage of OUTP. Inherent Excellent Line-Transient Regulation The SIMO regulator achieves inherent superior line-transient regulation when operating in discontinuous conduction mode, shown in Figure 7 and Figure 8. In discontinuous conduction mode the current delivered to the output is given by the inductor peak current and falling slope of the inductor current. This is shown in Figure 17, where the output current, given by the area A, is the same for different input voltages. Because the converter uses peak-current-mode control, the peak current is fixed as long as the load current is fixed. The falling slope of the inductor current is given by the sum of the output voltage and inductor value. This is also a fixed value and independent of the input voltage. Because of this, any change in input voltage changes the converter duty cycle but does not change the inductor peak current or the falling slope of the inductor current. Therefore the output current, given by the area A (Figure 17), remains constant over any input voltage variation. Because the area A is constant, the converter has an inherently perfect line regulation when operating in discontinuous conduction mode. Entering continuous conduction mode (CCM) linearly decreases the line-transient performance. However the line-transient response in CCM is still as good as for any standard current-mode-controlled switching converter. The following formulas detail the relations of the TPS65135 converter topology operating in CCM. 10 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 www.ti.com SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 Vpos Vin L Ip Vneg L A A tclock M0116-01 Figure 17. Inherently Perfect Line-Transient Regulation The converter always sees the sum of the negative and positive output voltage, which is calculated as: VO = VOUTP + VOUTN (1) The converter duty cycle is calculated using the efficiency estimation from the data sheet curves or from real application measurements. A 70% efficiency value is a good value to go through the calculations. VO D= h × VIN + VO (2) The output current for entering continuous conduction mode can be calculated. The switching frequency can be obtained from the data sheet graphs. A frequency of 1.5 MHz is usually sufficient for these types of calculations. 2 IC = VO × (1 - D ) fS × 2 × L (3) The inductor ripple current when operating in CCM can also be calculated. V ×D DIL = IN L × fS (4) Last but not least, the converter switch peak current is calculated as follows. I 1 IL _ peak = OUT + × DIL 1- D 2 (5) Overvoltage Protection The device monitors the positive and negative output voltage. The regulators monitor the outputs and reduce the current limit when the output voltages exceed the overvoltage protection limit. They are clamped using a zener diode, the positive output to typically 7V and the negative to –7.6 V. Short-Circuit Protection Both outputs are protected against short circuits either to GND or against the other output. The device switching frequency and the current limit are reduced in case of a short circuit. Soft-Start Operation The device increases the current limit during soft-start operation to avoid high inrush currents during start-up. The current limit typically ramps up to its full-current limit within 100 µs. 11 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com Output-Current Mismatch The device operates best when the current of the positive output is similar to the current of the negative output. However the device is able to regulate an output-current mismatch between the outputs of up to 50% (See Figure 4 for typically allowed currents, only 50% mismatch is specified). If the output-current mismatch becomes much larger one of the outputs goes out of regulation and finally the IC shuts down. In case of zero load of one output the other output can support up to 5mA. The IC automatically recovers when the mismatch is reduced. The below formula is used to calculate the maximum supported current mismatch. Smaller IOUT 1£ 50% Bigger IOUT (6) Input Capacitor Selection The device typically requires a 10 µF ceramic input capacitor. Larger values can be used to lower the input voltage ripple. Table 2 lists capacitors suitable for use on the TPS65135 input. Table 2. Input Capacitor Selection CAPACITOR COMPONENT SUPPLIER SIZE 10 µF / 6.3V Murata GRM188R60J106ME84D 0603 10 µF / 6.3 V Taiyo Yuden JMK107BJ106 0603 Inductor Selection/Efficiency/Line-Transient Response The device is internally compensated and operates best with a 2.2 µH inductor. For this type of converter the inductor selection is a key element in the design process because it has a big impact on several application parameters. The inductor selection influences the converter efficiency a lot, also the line and load transient response as well as the maximum output current. Because the inductor ripple current is fairly large in this type of application, the inductor has a major impact on the overall converter efficiency. Having large inductor ripple current causes the inductor core and magnetizing losses to become dominant. Due to this, an inductor with a larger dc winding resistance can achieve higher converter efficiencies when having lower core and magnetizing losses. The used inductance influences the line transient regulation, it influences the current range entering continuous conduction mode (CCM). As discussed, the line transient performance decreases when entering CCM. The larger the inductor value, the lower the load current when entering CCM. The formula to calculate the current entering CCM is shown in Equation 3. The inductors listed in Table 3 achieve a good overall converter efficiency while having a low device profile. The first two TOKO inductors achieve the highest efficiency (almoust identical) followed by the LPS3008. The best compromize between efficiency and inductor size is given by the XFL2006 inductor . The inductor saturation current should be 1A or higher, depending on the maximum output current of the application it can also be lower. See Equation 5, where the converter switch current limit is calculated. The converter switch current is equal to the peak inductor current. Table 3. Inductor Selection INDUCTOR VALUE COMPONENT SUPPLIER DIMENSIONS in mm Isat / RDC 2.2 µH 2.2 µH TOKO DFE252010C 2.5 x 2 x 1 1.9 A / 130 mΩ TOKO DFE252012C 2.5 x 2 x 1.2 2.2 µH 2.2 A / 90 mΩ Coilcraft XFL2006-222 2 × 1.9 × 0.6 0.8 A / 278 mΩ 2.2 µH Coilcraft LPS3008-222 3 × 3 × 0.8 1.1 A / 175 mΩ 2.2 µH Samsung CIG2MW2R2NNE 2 × 1.6 × 1 1.2 A / 110 mΩ 2.2 µH TOKO FDSE0312-2R2 3.3 × 3.3 × 1.2 1.2 A / 160 mΩ 2.2 µH ABCO LPF3010T-2R2 2.8 × 2.8 × 1 1.0 A / 100 mΩ 2.2 µH Maruwa CXFU0208-2R2 2.65 × 2.65 × 0.8 0.85 A / 185 mΩ 12 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 www.ti.com SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 Output Capacitor Selection A 4.7-µF output capacitor is generally sufficient for most applications, but larger values can be used as well for improved load- and line-transient response at higher load currents. The capacitors of Table 4 is recommended for use with the TPS65135. Table 4. Output Capacitor Selection CAPACITOR COMPONENT SUPPLIER SIZE 10 µF / 6.3V Murata GRM188R60J106ME84D 0603 4.7 µF / 10V Taiyo Yuden LMK107BJ475 0603 10 µF / 6.3 V Taiyo Yuden JMK107BJ106 0603 SPACER Setting the Output Voltages OUTP and OUTN The feedback divider R1, R2, R3 sets the positive and negative output voltage. The device regulates the feeback voltage FB to typically 1.24 V and the feedback FBG to typically 0V. R2 is selected to have at least 10 µA through the feedback divider. 1.24V R2 = » 120kW 10mA (7) The positive output voltage and R1 are calculated as: VPOS = 1.24V × R1 + R2 R2 (8) æ V ö R1 = R2 × ç POS - 1÷ è 1.24V ø (9) The negative output voltage is calculated as: VNEG = - (VFB + VFBG ) × R3 R2 (10) Since VFBG is typically regulated to 0 V, the formula can be simplified and R3 is then calculated as: R3 = VNEG 1.24V × R2 (11) PCB Layout Guidelines PCB layout is an important task in the power supply design. Good PCB layout minimizes EMI and allows very good output voltage regulation. For the TPS65135 the following PCB layout guidelines are recommended. Place the power components first. The inductor and the input and output capacitors must be as close as possible to the IC pins. Place the bypass capacitor for the reference output voltage VAUX as close as possible to pin 4. Use bold and wide traces for power traces connecting the inductor and input and output capacitors. Use a common ground plane or a start ground connection. See the TPS65135EVM-063 user's guide (SLVU244) and evaluation module for a PCB layout example. 13 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 TPS65135 SLVS704A – NOVEMBER 2011 – REVISED NOVEMBER 2011 www.ti.com TYPICAL APPLICATION L1 2.2 mH TPS65135 16 15 VIN 2.5 V to 5.5 V 1 C1 10 mF 8 4 11 C4 100 nF 12 5 L1 L2 L1 L2 VIN OUTP EN OUTP VAUX FB PGND FBG PGND OUTN GND OUTN 14 13 10 9 R1 365 kW 7 6 VPOS 5 V / 80 mA C2 4.7 mF R2 120 kW 3 2 R3 487 kW C3 4.7 mF VNEG –5 V / 80 mA Figure 18. Standard Application +/- 5 V Supply SPACER REVISION HISTORY Changes from Original (November 2011) to Revision A • Page Changed the UVLO threshould max value for VIN falling From: 2 V To 2.1 V ...................................................................... 5 14 Copyright © 2011, Texas Instruments Incorporated Product Folder Links: TPS65135 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS65135RTER Package Package Pins Type Drawing WQFN RTE 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3000 330.0 12.4 Pack Materials-Page 1 3.3 B0 (mm) K0 (mm) P1 (mm) 3.3 1.1 8.0 W Pin1 (mm) Quadrant 12.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS65135RTER WQFN RTE 16 3000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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