SID3310 -10A, -20V,RDS(ON)150mΩ P-Channel Enhancement Mode Power Mos.FET Elektronische Bauelemente RoHS Compliant Product Description TO-251 The SID3310 provide the designer with the best combination of fast switching, ruggerized device device design, low on-resistance 2.3±0.1 6.6±0.2 5.3±0.2 and cost -effectiveness. 0.5±0.05 The TO-251 is universally preferred for all commercial-industrial surface mount applications and suited for low voltage applications such as DC/DC converters. 7.0±0.2 5.6±0.2 1.2±0.3 0.75±0.15 Features 7.0±0.2 * 2.5V Gate Drive Capability * Simple Drive Requirement 0.6±0.1 0.5±0.1 2.3REF. G D D S Dimensions in millimeters G S Absolute Maximum Ratings Symbol Ratings Unit Drain-Source Voltage VDS -20 V Gate-Source Voltage VGS ±12 V -10 A -6.2 A -24 A 25 W 0.01 W/ C Parameter o Continuous Drain Current,VGS@10V ID@TC=25 C Continuous Drain Current,VGS@10V o Pulsed Drain Current ID@TC= 100 C 1 IDM o Total Power Dissipation PD@TC=25 C Linear Derating Factor Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 Symbol Ratings o o C Thermal Data Parameter Thermal Resistance Junction-case Max. Thermal Resistance Junction-ambient Max. ttp://www.SeCoSGmbH.com/ 01-Jun-2002 Rev. A Rthj-c Rthj-a Unit 5.0 o 110 o C /W C /W Any changing of specification will not be informed individual Page 1 of 5 SID3310 -10A, -20V,RDS(ON)150mΩ P-Channel Enhancement Mode Power Mos.FET Elektronische Bauelemente o Electrical Characteristics( Tj=25 C Unless otherwise specified) Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Gate Threshold Voltage Gate-Source Leakage Current Symbol Min. Typ. BVDSS - 20 _ _ V BVDS/ Tj _ - 0.1 _ V/ C VGS(th) -0.5 _ _ IGSS _ _ ±100 nA VGS=±12V _ _ -1 uA VDS=-20V,VGS=0 _ _ -25 uA VDS=-16V,VGS=0 _ _ o Drain-Source Leakage Current (Tj=25 C ) o Drain-Source Leakage Current(Tj=150C) Static Drain-Source On-Resistance IDSS RD S (O N ) Max. 150 _ _ 250 Total Gate Charge2 Qg _ 6 _ Gate-Source Charge Qgs _ 1.5 _ Gate-Drain ("Miller") Charge Qgd _ 0.6 _ Td(ON) _ 2.5 _ Tr _ 60 _ Td(Off) _ 70 _ Tf _ 60 _ 300 _ 180 _ 60 _ Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Input Capacitance Ciss _ _ Output Capacitance Coss Reverse Transfer Capacitance Crss _ Forward Transconductance Gfs _ 4.4 Unit o V mΩ Test Condition VGS=0V, ID=-250uA o Reference to 25 C, ID=- 1mA VDS=VGS, ID=-250uA VGS=-4.5V, ID=-2.8A VGS=-2.5V, ID=-2 A nC ID=- 2.8 A VDS=- 6V VGS=- 5V VDD=-6 V ID=-1A nS VGS=- 5V RG=6Ω RD=6 Ω pF VGS=0V VDS=-6V _ S VDS=- 5V, ID=-2.8A Max. Unit Test Condition -1.2 V IS=-10A,VGS=0V,Tj=25 C VD=VG=0V,VS=-1.2 f=1.0MHz Source-Drain Diode Parameter Forward On Voltage 2 Continuous Source Current (Body Diode) 1 Pulsed Source Current (Body Diode) Symbol Min. Typ. VSD _ _ IS _ _ -10 A ISM _ _ -24 A o Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width≦300us, dutycycle≦2%. ttp://www.SeCoSGmbH.com/ 01-Jun-2002 Rev. A Any changing of specification will not be informed individual Page 2 of 5 SID3310 Elektronische Bauelemente -10A, -20V,RDS(ON)150mΩ P-Channel Enhancement Mode Power Mos.FET Characteristics Curve Fig 1. Typical Output Characteristics Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature Fig 5. Maximum Drain Current v.s. Case Temperature Fig 6. Type Power Dissipation ttp://www.SeCoSGmbH.com/ 01-Jun-2002 Rev. A Fig 2. Typical Output Characteristics Any changing of specification will not be informed individual Page 3 of 5 SID3310 Elektronische Bauelemente Fig 7. Maximum Safe Operating Area Fig 9. Gate Charge Characteristics Fig 11. Forward Characteristics of Reverse Diode ttp://www.SeCoSGmbH.com/ 01-Jun-2002 Rev. A -10A, -20V,RDS(ON)150mΩ P-Channel Enhancement Mode Power Mos.FET Fig 8. Effective Transient Thermal Impedance Fig 10. Typical Capacitance Characteristics Fig 12. Gate Threshold Voltage v.s. Junction Temperature Any changing of specification will not be informed individual Page 4 of 5 SID3310 Elektronische Bauelemente Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform http://www.SeCoSGmbH.com/ 01-Jun-2002 Rev. A -10A, -20V,RDS(ON)150mΩ P-Channel Enhancement Mode Power Mos.FET Any changing of specification will not be informed individual Page 5 of 5