STT6405 -5.0 A, -30 V, RDS(ON) 50 mΩ P-Channel Enhancement Mode Mos.FET Elektronische Bauelemente RoHS Compliant Product A suffix of “-C” specifies halogen and lead-free DESCRIPTION The STT6405 uses advanced trench technology to provide excellent on-resistance with low gate change. The device is suitable for use as a load switch or in PWM applications. FEATURES z z z N-Channel Lower Gate Charge Small Footprint & Low Profile Package PACKAGE DIMENSIONS REF. Millimeter Min. Max. A A1 A2 c D E E1 1.10 Max 0 0.10 0.70 1.00 0.12 Ref 2.70 3.10 2.60 3.00 1.40 1.80 REF. L L1 b e e1 Millimeter Min. Max. 0.45 Ref 0.60 Ref 0° 10° 0.30 0.50 0.95 Ref 1.90 Ref ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ=150℃) Pulsed Drain Current Power Dissipation Linear Derating Factor Operating Junction and Storage Temperature Range Parameter 3 Thermal Resistance- Junction to Ambient 01-June-2005 Rev. A Max. Symbol VDS VGS ID @TA=25℃ ID @TA=70℃ IDM PD @TA=25℃ Unit Tj, Tstg Ratings -30 ±12 -5.0 -4.2 -20 2 0.016 -55 ~ +150 Symbol Ratings Unit RθJA 62.5 ℃/W V V A A W W/℃ ℃ Page 1 of 4 STT6405 -5.0 A, -30 V, RDS(ON) 50 mΩ P-Channel Enhancement Mode Mos.FET Elektronische Bauelemente ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Symbol Min Typ Max Unit Test Conditions Drain-Source Breakdown Voltage BVDSS -30 - - V VGS = 0, ID= -250 uA Gate Threshold Voltage VGS(th) -1.0 - -3.0 V VDS = VGS, ID= -250 uA IGSS - - ±100 nA VGS = ±20 V - - -1 - - -5 - - 50 Gate-Source Leakage Current Drain-Source Leakage Current (Tj=25℃) Drain-Source Leakage Current (Tj=55℃) Static Drain-Source On-Resistance2 Forward Transconductance IDSS RDS(ON) 75 gfs - 8.6 - Qg - 14.7 18 Gate-Source Charge Qgs - 2 - Gate-Drain (“Miller”) Charge Qgd - 3.8 - Td(on) - 8.3 - Tr - 5 - Td(off) - 29 - Tf - 14 - Input Capacitance Ciss - 700 840 Output Capacitance Coss - 120 - Reverse Transfer Capacitance Crss - 75 - Rg - 10 - Total Gate Charge 2 Turn-on Delay Time2 Rise Time Turn-off Delay Time Fall Time Gate Resistance uA mΩ S VDS = -30 V, VGS = 0 VDS = -24 V, VGS = 0 VGS = -10 V, ID = -5.0 A VGS = -4.5 V, ID = -4.0 A VDS = -5V, ID = -5.0A nC ID = -5.0 A VDS = -15 V VGS = -10 V ns VDS = -15 V VGS = -10 V RG = 3 Ω RL = 3 Ω pF VGS = 0 V VDS = -15 V f = 1.0 MHz Ω f=1.0 MHz SOURCE-DRAIN DIODE Parameter Forward On Voltage2 Reverse Recovery Time 2 Reverse Recovery Charge Notes: Symbol Min Typ Max Unit Test Conditions VSD - - -1.0 V IS = -1.0 A, VGS= -0 V Trr - 23.5 - ns IS = -5.0A, VGS=0V, dl/dt= Qrr - 13.4 - nC 100A/us 1. Pulse width limited by Max. junction temperature. 2. Pulse width≦300us, duty cycle≦2%. 2 3. Surface mounted on 1 in copper pad of FR4 board; 156℃/W when mounted on Min. copper pad. 01-June-2005 Rev. A Page 2 of 4 STT6405 Elektronische Bauelemente -5.0 A, -30 V, RDS(ON) 50 mΩ P-Channel Enhancement Mode Mos.FET CHARACTERISTIC CURVES 01-June-2005 Rev. A Page 3 of 4 STT6405 Elektronische Bauelemente -5.0 A, -30 V, RDS(ON) 50 mΩ P-Channel Enhancement Mode Mos.FET CHARACTERISTIC CURVES 01-June-2005 Rev. A Page 4 of 4