AGILENT HMMC-5620

6 – 20 GHz High-Gain Amplifier
Technical Data
HMMC-5620
Features
• Wide-Frequency Range:
6 – 20 GHz
• High Gain: 17 dB
• Gain Flatness: ± 1.0 dB
• Return Loss:
Input -15 dB
Output -15 dB
• Single Bias Supply
Operation
• Low DC Power Dissipation:
PDC ~ 0.5 Watts
• Medium Power:
20 GHz: P-1dB: 12 dBm
Psat: 13 dBm
Description
The HMMC-5620 is a wideband
GaAs MMIC Amplifier designed
for medium output power and
high gain over the 6 to 20 GHz
frequency range. Four MESFET
cascade stages provide high gain,
while the single bias supply offers
ease of use. E-Beam lithography
is used to produce gate lengths of
≈ 0.3 µm. The HMMC-5620 incorporates advanced MBE technology, Ti-Pt-Au gate metallization,
silicon nitride passivation, and
polyimide for scratch protection.
5965-5442E
Chip Size:
Chip Size Tolerance:
Chip Thickness:
Pad Dimensions:
1410 x 1010 µm (55.5 x 39.7 mils)
± 10 µm (± 0.4 mils)
127 ± 15 µm (5.0 ± 0.6 mils)
80 x 80 µm (2.95 x 2.95 mils), or larger
Absolute Maximum Ratings[1]
Symbol
Parameters/Conditions
VDD
Positive Drain Voltage
IDD
Total Drain Current
PDC
Units
Min.
Max.
V
7.5
mA
135
DC Power Dissipation
watts
1.0
Pin
CW Input Power
dBm
20
Tch
Operating Channel Temp.
°C
+160
Tcase
Operating Case Temp.
°C
-55
TSTG
Storage Temperature
°C
-65
Tmax
Maximum Assembly Temp.
(for 60 seconds maximum)
°C
+165
+300
Notes:
1. Operation in excess of any one of these conditions may result in permanent
damage to this device. TA = 25°C except for Tch, TSTG, and Tmax.
6-70
HMMC-5620 DC Specifications/Physical Properties[1]
Symbol
IDD
IDD
θch-bs
Parameters and Test Conditions
Drain Current (VDD = +5.0 V)
Drain Current (VDD = +7.0 V)
Thermal Resistance (Tbackside = 25°C)
Units
mA
mA
°C/W
Min.
70
Typ.
100
105
70
Max.
135
Note:
1. Measured in wafer form with Tchuck = 25°C. (Except θch-bs).
HMMC-5620 RF Specifications/Physical Properties
VDD = 5.0 V, IDD(Q) = 100 mA, Zin =Zo = 50 Ω[1]
Symbol
BW
S 21
∆S 21
RL in
RL out
S 12
P-1dB
Psat
H2
H3
NF
Parameters and Test Conditions
Guaranteed Bandwidth
Small Signal Gain
Small Signal Gain Flatness
Input Return Loss
Output Return Loss
Reverse Isolation
Output Power @ 1 dB Gain Compression
Saturated Output Power
Second Harmonic Power Level (6 < ƒo < 20)
Po(ƒo) = 10 dBm
Third Harmonic Power Level (6 < ƒo < 20)
Po(ƒo) = 10 dBm
Noise Figure
Units
GHz
dB
dB
dB
dB
dB
dBm
dBm
dBc
Min.
6
15
Typ.
17
± 1.0
-15
-15
-55
12
13
-30
dBc
-40
dB
9.0
Note:
1. Small-signal data measured in wafer form with Tchuck = 25°C. Large-signal data measured on individual devices
mounted in an HP83040 Series Modular Microcircuit Package at TA = 25°C.
6-71
Max.
20
21
± 1.25
-10
-10
HMMC-5620 Applications
The HMMC-5620 amplifier is
designed for use as a general
purpose wideband, high gain
stage in communication systems
and microwave instrumentation.
It is ideally suited for broadband
applications requiring high gain
and excellent port matches over a
6 to 20 GHz frequency range.
Both RF input and output ports
are AC-coupled on chip.
Biasing and Operation
This amplifier is biased with a
single positive drain supply (VDD).
The recommended bias for the
HMMC-5620 is VDD = 5.0 V, which
results in IDD = 100 mA (Typ.). No
other bias supplies or connections
to the device are required for 6 to
20 GHz operation. See Figure 3 for
assembly information.
tion should be 64 ± 1 dB and
76␣ ± ␣ 8 msec, respectively. The
bonding pad and chip backside
metallization is gold.
Assembly Techniques
For more detailed information
see HP application note #999
“GaAs MMIC Assembly and
Handling Guidelines.”
Solder die-attach using a fluxless
AuSu solder preform is the
recommended assembly method.
Gold thermosonic wedge bonding
with 0.7 or 1.0 mil diameter Au
wire is recommended for D.C.
bonds. For RF bonds, MWTC
recommends low inductance
mesh interconnections for best
return loss performance. Tool
force should be 22 ± 1 gram, stage
temperature should be 150 ± 2°C,
and ultrasonic power and dura-
GaAs MMICs are ESD sensitive.
Proper precautions should be used
when handling these devices.
Drain Bias
FEEDBACK
NTWK
FEEDBACK
NTWK
FEEDBACK
NTWK
FEEDBACK
NTWK
RF Output
MATCHING
MATCHING
RF Input
MATCHING
5
MATCHING
5
MATCHING
5
5
GND
GND
GND
GND
GND
GND
GND
Figure 1. HMMC-5620 Schematic.
6-72
GND
VDD
RF
Input
RF
Output
Chip ID No.
875 (VDD Pad)
910 (Center of VDD Pad)
1010
(±10)
350
350
Notes:
All dimensions in microns.
RF Pad Dim: 80 x 80 µm.
VDD Pad Dim: 110 x 90 µm
All other dimensions: ±5 µm
(unless otherwise noted).
Chip thickness: 127 ± 15 µm.
0
85
0 (RF Input Pad)
1325
(RF Output Pad)
1410
(±10)
Figure 2. HMMC-5620 Bonding Pad Locations.
68 pF Chip Capacitor
L ≥2 nH
(1.0 mil Gold Wire Bond
with length ≥100 mils)
Gold Plated Shim
Input and Output Thin Film
Circuits with 50 ohm transmission
lines. (2 places)
VDD
RF IN RF OUT
2.0 mil
nom. gap
Figure 3. HMMC-5620 Assembly Diagram. (For 6.0 – 20.0 GHz Operation)
6-73
HMMC-5620 Typical Performance
–45
–50
–55
13
–60
–65
8
–70
–75
3
2 4 6 8 10 12 14 16 18 20 22 24 26.5
VDD = 5.0 V, IDD = 100 mA[1]
–5
–10
–10
–15
–15
–20
–20
–25
–25
–30
–30
OUTPUT RETURN LOSS, S22 (dB)
–40
18
–5
–35
INPUT RETURN LOSS, S11 (dB)
VDD = 5.0 V, IDD = 100 mA[1]
REVERSE ISOLATION, S12 (dB)
SMALL-SIGNAL GAIN, S21 (dB)
23
–35
–35
2 4 6 8 10 12 14 16 18 20 22 24 26.5
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 4. Typical Gain and Reverse
Isolation vs. Frequency.
Figure 5. Typical Input and Output
Return Loss vs. Frequency.
Typical Scattering Parameters[1], (Tchuck = 25°C, VDD = 5.0 V, IDD = 100 mA, Zin = Zo = 50 Ω)
Freq.
GHz
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
15.0
16.0
17.0
18.0
19.0
20.0
21.0
22.0
23.0
24.0
25.0
26.0
26.5
dB
-10.7
-13.5
-14.6
-15.8
-18.4
-20.9
-22.2
-21.9
-20.2
-18.4
-16.7
-15.8
-15.8
-16.4
-17.5
-17.7
-16.8
-16.1
-18.5
-19.9
-14.2
-11.6
-10.3
-9.6
-9.2
-9.1
S11
Mag.
0.292
0.212
0.186
0.162
0.120
0.090
0.078
0.080
0.097
0.120
0.146
0.161
0.163
0.151
0.134
0.130
0.145
0.156
0.119
0.101
0.195
0.263
0.306
0.330
0.347
0.349
Ang.
-100.3
-117.5
-136.6
-168.9
157.5
123.0
83.1
41.3
6.6
-21.0
-46.4
-70.0
-90.0
-105.6
-115.4
-114.1
-118.4
-131.6
-143.8
-108.1
-107.7
-125.6
-142.2
-157.2
-169.9
-357.4
dB
-46.1
-74.1
-63.1
-60.4
-66.5
-62.7
-61.3
-66.5
-68.1
-60.0
-58.3
-62.7
-59.3
-57.5
-57.1
-55.6
-62.3
-59.7
-52.5
-53.2
-59.3
-54.0
-75.8
-53.5
-59.0
-54.9
S21
Mag.
0.0049
0.0002
0.0007
0.0010
0.0005
0.0007
0.0009
0.0005
0.0004
0.0010
0.0012
0.0007
0.0011
0.0013
0.0014
0.0017
0.0008
0.0010
0.0024
0.0022
0.0011
0.0020
0.0002
0.0021
0.0011
0.0018
Ang.
-174.7
114.0
-122.1
-161.8
162.7
-175.3
-178.0
-62.4
-159.3
-113.5
-112.2
-130.0
-161.1
173.9
-165.9
175.5
98.2
112.8
72.9
-7.1
-8.0
-54.4
-158.2
-165.8
-137.5
78.2
Note:
1. Data obtained from on-wafer measurements.
6-74
dB
-6.2
3.5
13.0
16.0
16.7
16.3
16.0
16.0
16.1
16.3
16.6
17.0
17.3
17.4
17.5
17.3
17.0
16.7
16.0
15.3
10.7
5.4
0.3
-4.5
-9.0
-11.2
S12
Mag.
0.491
1.489
4.486
6.310
6.839
6.531
6.310
6.310
6.383
6.531
6.761
7.079
7.328
7.413
7.499
7.328
7.079
6.839
6.310
5.842
3.414
1.857
1.034
0.595
0.355
0.275
Ang.
-52.2
-170.0
82.2
-26.5
-116.8
173.2
114.2
60.2
9.0
-40.7
-89.9
-139.4
170.1
118.6
66.0
12.3
-43.1
-101.9
-168.5
119.8
54.2
-0.4
-47.5
-90.5
-131.1
-511.3
dB
-8.1
-10.1
-12.7
-21.7
-25.7
-22.1
-21.7
-22.5
-23.2
-23.4
-21.5
-19.1
-17.2
-16.0
-15.5
-15.5
-16.5
-17.7
-20.8
-20.4
-14.9
-12.0
-10.3
-9.0
-7.9
-7.4
S22
Mag.
0.395
0.311
0.232
0.082
0.052
0.079
0.082
0.075
0.070
0.067
0.084
0.111
0.137
0.159
0.168
0.167
0.149
0.130
0.091
0.096
0.179
0.250
0.306
0.353
0.402
0.426
Ang.
-152.2
-171.5
136.5
61.5
-86.6
-131.4
-150.6
-156.7
-152.9
-143.0
-136.8
-133.7
-143.0
-152.8
-167.9
-179.7
162.9
145.2
93.0
-4.3
-63.6
-93.3
-110.4
-124.2
-134.3
-140.2
HMMC-5620 Typical Performance
17
VDD = 5.0 V, IDD (Q) = 100 mA
–20
VDD = 5.0 V, IDD (Q) = 100 mA
17
VDD = 7.0 V, IDD (Q) = 105 mA
HARMONICS (dBc)
13
11
9
P(–1 dB)
P(–3 dB)
P(–5 dB)
7
5
4
6
8
10 12
–35
–40
–45
–55
–60
–70
4
14 16 18 20 22
5
6
7
8
20
VDD = 5.0 V, IDD (Q) = 100 mA
18
16
16
14
14
12
12
10
10
8
8
6
6
–60
4
4
–65
2
2
–70
4
0
5
3rd Harmonic
–50
–55
5
6
7
8
9 10 11 12 13 14
NOISE FIGURE (dB)
2nd Harmonic
–45
FUNDAMENTAL FREQUENCY, ƒO (GHz)
Figure 9. Typical Second and Third
Harmonics vs. Fundamental Frequency
at POUT = 10 dBm.
7
9
11
13
15
17
19
0
21
FREQUENCY (GHz)
Figure 10. Typical Noise Figure
Performance vs. Frequency.
VDD = 5.0 V, IDD (@ TA = 25°C) = 100 mA
SMALL-SIGNAL GAIN, S21 (dB)
0.035 dB/°C
22
0.027 dB/°C
0.036 dB/°C
20
18
16
14
9
P(–1 dB)
P(–3 dB)
P(–5 dB)
–55°C
–25°C
0°C
+25°C
+55°C
+85°C
+100°C
+125°C
12
10
8
2 4 6 8 10 12 14 16 18 20 22 24 26.5
FREQUENCY (GHz)
Figure 11. Typical Small-Signal Gain
vs. Temperature.
This data sheet contains a variety of typical and guaranteed performance data. The
information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For
additional information contact your local HP sales representative.
6-75
6
8
10 12
14 16 18 20 22
FREQUENCY (GHz)
20
18
–40
11
5
4
9 10 11 12 13 14
Figure 7. Typical Second and Third
Harmonics vs. Fundamental Frequency
at POUT = 10 dBm.
–25
–35
13
7
FUNDAMENTAL FREQUENCY, ƒO (GHz)
VDD = 7.0 V, IDD (Q) = 105 mA
–30
15
–65
Figure 6. Typical Output Power vs.
Frequency (with 5 V bias.)
HARMONICS (dBc)
3rd Harmonic
–50
FREQUENCY (GHz)
–20
2nd Harmonic
ASSOCIATED GAIN (dB)
OUTPUT POWER (dBm)
–30
OUTPUT POWER (dBm)
–25
15
Figure 8. Typical Output Power vs.
Frequency (with 7 V bias).