NEC UPA1855GR-9JG

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1855
N-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
PACKAGE DRAWING (Unit : mm)
The µPA1855 is a switching device which can be
driven directly by a 2.5 V power source.
The µPA1855 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
8
5
1
2, 3
4
5
6, 7
8
FEATURES
1
Power TSSOP8
6.4 ±0.2
3.15 ±0.15
3.0 ±0.1
0.65
0.27
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS
20
V
Gate to Source Voltage
VGSS
±12
V
Drain Current (DC)
ID(DC)
±6.0
A
ID(pulse)
±24
A
PT
2.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to +150
°C
Drain Current (pulse)
Note1
Total Power Dissipation
Note2
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1 %
2
2. Mounted on ceramic substrate of 5000 mm x 1.1 mm
Remark
0.5
0.6 +0.15
–0.1
4
4.4 ±0.1
0.145 ±0.055
µPA1855GR-9JG
0.25
0.1±0.05
ORDERING INFORMATION
PACKAGE
1.2 MAX.
1.0±0.05
3° +5°
–3°
• Can be driven by a 2.5 V power source
• Low on-state resistance
RDS(on)1 = 23 mΩ MAX. (VGS = 4.5 V, ID = 3.0 A)
RDS(on)2 = 24 mΩ MAX. (VGS = 4.0 V, ID = 3.0 A)
RDS(on)3 = 29 mΩ MAX. (VGS = 2.5 V, ID = 3.0 A)
• Built-in G-S protection diode against ESD
PART NUMBER
:Drain1
:Source1
:Gate1
:Gate2
:Source2
:Drain2
1.0 ±0.2
0.1
0.8 MAX.
+0.03
–0.08
0.10 M
EQUIVALENT CIRCUIT
Drain1
Body
Diode
Gate1
Gate
Protection
Diode
Drain2
Source1
Body
Diode
Gate2
Gate
Protection
Diode
Source2
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D13454EJ2V0DS00 (2nd edition)
Date Published May 2001 NS CP(K)
Printed in Japan
The mark ★ shows major revised points.
©
1998, 1999
µ PA1855
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Drain Cut-off Current
IDSS
VDS = 20 V, VGS = 0 V
10
µA
Gate Leakage Current
IGSS
VGS = ±12 V, VDS = 0 V
±10
µA
VGS(off)
VDS = 10 V, ID = 1 mA
0.5
1.0
1.5
V
| yfs |
VDS = 10 V, ID = 3.0 A
1
13.3
RDS(on)1
VGS = 4.5 V, ID = 3.0 A
17
23
mΩ
RDS(on)2
VGS = 4.0 V, ID = 3.0 A
18
24
mΩ
RDS(on)3
VGS = 2.5 V, ID = 3.0 A
22
29
mΩ
Gate Cut-off Voltage
Forward Transfer Admittance
Drain to Source On-state Resistance
S
Input Capacitance
Ciss
VDS = 10 V
980
pF
Output Capacitance
Coss
VGS = 0 V
293
pF
Reverse Transfer Capacitance
Crss
f = 1 MHz
205
pF
Turn-on Delay Time
td(on)
VDD = 10 V
86
ns
tr
ID = 3.0 A
247
ns
VGS(on) = 4.0 V
480
ns
tf
RG = 10 Ω
659
ns
Total Gate Charge
QG
VDD = 10 V
8.8
nC
Gate to Source Charge
QGS
ID = 6.0 A
2.2
nC
Gate to Drain Charge
QGD
VGS = 4.0 V
3.2
nC
Rise Time
Turn-off Delay Time
td(off)
Fall Time
Diode Forward Voltage
VF(S-D)
IF = 6.0 A, VGS = 0 V
0.82
V
Reverse Recovery Time
trr
IF = 6.0 A, VGS = 0 V
44
ns
Reverse Recovery Charge
Qrr
di/dt = 15 A / µs
2.2
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
D.U.T.
RL
RG
RG = 10 Ω
PG.
VGS
VGS
Wave Form
0
PG.
90 %
90 %
ID
VGS
0
ID
Wave Form
τ
τ = 1µ s
Duty Cycle ≤ 1 %
10 %
0 10 %
tr
td(on)
ton
IG = 2 mA
RL
50 Ω
VDD
90 %
VDD
ID
2
VGS(on)
10 %
td(off)
tf
toff
Data Sheet D13454EJ2V0DS
µ PA1855
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
★
FORWARD BIAS SAFE OPERATING AREA
100
d
ite )
im .5 V
4
=
)L
on
S(
RD GS
80
ID - Drain Current - A
dT - Derating Factor - %
100
60
40
V
(@
10
0
30
60
120
90
TA - Ambient Temperature - ˚C
1
=1
00
ms
1
10
100
VDS - Drain to Source Voltage - V
TRANSFER CHARACTERISTICS
100
25
VGS = 4.5 V
VGS = 4.0 V
VDS = 10 V
10
20
ID - Drain Current - A
ID - Drain Current - A
=1
ms
=1
0m
s
Single Pulse
Mounted on Ceramic
2
Board of 50cm x 1.1mm
PD(FET1) : PD(FET2) = 1:1
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
VGS = 2.5 V
15
ID (DC)
DC
0.01
0.1
150
PW
PW
PW
0.1
20
ID (pulse)
10
1
0.1
TA = 125˚C
0.01
TA = 75˚C
0.001
TA = 25˚C
5
TA = -25˚C
0.0001
0
0
0.2
0.6
0.4
0.8
1.0
0.00001
0.0
VDS - Drain to Source Voltage - V
100
| yfs | - Forward Transfer Admittance - S
VGS(off) - Gate to Source Cut-off Voltage - V
1.5 VDS = 10 V
ID = 1 mA
1.0
0
50
100
1.0
1.5
2.0
2.5
FORWARD TRANSFER ADMITTANCE Vs.
DRAIN CURRENT
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
0.5
− 50
0.5
VGS - Gate to Sorce Voltage - V
150
VDS = 10 V
10
TA = -25 ˚C
TA = 25 ˚C
TA = 75 ˚C
1
TA = 125 ˚C
0.1
0.01
0.01
0.1
1
10
100
ID - Drain Current - A
Tch - Channel Temperature - ˚C
Data Sheet D13454EJ2V0DS
3
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
40
RDS(on) - Drain to Source On-State Resistance - mΩ
RDS(on) - Drain to Source On-State Resistance - mΩ
µ PA1855
VGS = 2.5 V
TA = 125˚C
30
TA = 75˚C
TA = 25˚C
20
TA = -25˚C
10
0.01
1
0.1
10
100
40
30
TA = 125˚C
TA = 75˚C
20
VGS = 4.5 V
30
TA = 125˚C
TA = 75˚C
20
TA = 25˚C
TA = -25˚C
10
0.01
1
0.1
TA = 25˚C
TA = -25˚C
10
0.01
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
40
VGS = 4.0 V
10
100
ID = 3.0 A
VGS = 2.5 V
VGS = 4.0 V
20
VGS = 4.5 V
10
- 50
Ciss, Coss, Crss - Capacitance - pF
RDS (on) - Drain to Source On-state Resistance - mΩ
150
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
40
30
20
10
4
6
8
10
12
f = 1 MHz
1000
Ciss
Coss
Crss
100
10
0.1
VGS - Gate to Source Voltage - V
4
0
50
100
Tch - Channel Temperature -˚C
10000
ID = 3.0 A
2
100
30
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
0
0
10
DRAIN TO SOURCE ON STATE RESISTANCE vs.
CHANNEL TEMPERATURE
ID - Drain Current - A
50
1
0.1
ID - Drain Current - A
RDS (on) - Drain to Source On-state Resistance - mΩ
RDS(on) - Drain to Source On-State Resistance - mΩ
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
1
10
VDS - Drain to Source Voltage - V
Data Sheet D13454EJ2V0DS
100
µ PA1855
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
SWITCHING CHARACTERISTICS
100
tf
td(off)
tr
td(on)
100
VDD = 10V
VGS(on) = 4.0V
RG = 10Ω
10
0.1
1
ID - Drain Current - A
10
IF - Source to Drain Current - A
td(on), tr, td(off), tf - Switchig Time - ns
1000
10
1
0.1
0.01
0.4
0.6
0.8
1.0
1.2
VF(S-D) - Source to Drain Voltage - V
DYNAMIC INPUT CHARACTERISTICS
VGS - Gate to Source Voltage - V
5
ID = 6.0 A
4
VDD = 16 V
10 V
3
2
1
0
0
1
2
3
4
5
6
7
8
9
10
QG - Gate Charge - nC
★
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
rth(t) - Transient Thermal Resistance - ˚C/W
1000
100
62.5˚C/W
10
1
0.1
1m
Mounted on ceramic board
of 50cm2 x 1.1mm
Single Pulse
PD(FET1) : PD(FET2) = 1:1
10m
100m
1
10
PW - Pulse Width - S
Data Sheet D13454EJ2V0DS
100
1000
5
µ PA1855
[MEMO]
6
Data Sheet D13454EJ2V0DS
µ PA1855
[MEMO]
Data Sheet D13454EJ2V0DS
7
µ PA1855
• The information in this document is current as of May, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
• NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
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• Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
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parties arising from the use of these circuits, software and information.
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M8E 00. 4