<M F T> RT8H072E Preliminary *This is tentative specification. IGBT gate interception circuit DESCRIPTION RT8H072E is composed by NPN transistors, PNP transistors and resistors. It can miniaturization of a set and reduce parts or time necessary for completion. Connected This MFT with the level-shift circuit of IPM, It can prevent the fault that IGBT gate turn on at the same time. OUTLINE DRAWING FEATURES ● Miniaturization of a set. ● Open collector output. APPLICATION The protection of IGBT Gate. Unit:mm PIN CONFIGURATION ① ② ③ ④ ⑧ ⑦ ⑥ ⑤ ①VCC ②IN ③GND ④N.C. ⑧OUT4 ⑦OUT3 ⑥OUT2 ⑤OUT1 BLOCK DIAGRAM VCC OUT1 OUT2 OUT3 OUT4 VCC VCC High LEVEL VCC S IN R Q VCC Low LEVEL GND 110427 (1/3) <M F T> RT8H072E Preliminary *This is tentative specification. IGBT gate interception circuit ABSOLUTE MAXIMUM RATINGS (Ta=25℃) Parameter Conditions Symbol Vcc IOUT VOUT VIN Pd Kθ Tj Tstg Topr Supply voltage Output current Output voltage Input voltage OUT1~4 common OUT1~4 common Internal power dissipation Thermal derating Junction temperature Storage temperature Operating temperature Ta≧25℃ (keep dry) Ratings Unit 10 10 -0.3~VCC -0.3~VCC 200 1.6 150 -40~150 -20~85 V mA V V mW mW/℃ ℃ ℃ ℃ ELECTRICAL CHARACTERISTIC (Ta=25℃,VCC=5V unless otherwise noted.) Symbol Parameter Test conditions VCC Operating supply voltage range ICC_ON Circuit current in on states ICC_OFF Min Designed value Typ Max Unit 3 5 9 V IN=5V - 400 600 uA Circuit current in off states IN=0V - 400 600 uA VTHH Threshold voltage in level HI IN=0V→HIGH 3.03 3.16 3.28 V VTHL Threshold voltage in level Low IN=3.5V→LOW 2.43 2.53 2.63 V IIN IN input current IN=VTHL(MIN) -1 -0.3 - uA VOL OUT saturation voltage - 0.85 1.5 V ILO OUT leak current - 0 1 uA IN=5V,IOUT=5mA OUT1,OUT2,OUT3,OUT4 common IN=0V,VOUT=5V OUT1,OUT2,OUT3,OUT4 common THERMAL DERATING POWER DISSIPATION Pd[mW] 250 200 150 100 50 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE Ta [℃] 110427 (2/3) <M F T> RT8H072E Preliminary *This is tentative specification. IGBT gate interception circuit APPLICATION CIRCUIT EXAMPLES IGBT1 1KΩ UP-IN UP-OUT RES4 LVIC IGBT2 1KΩ VP-IN RES5 1KΩ WP-IN RES6 RES10 VP-OUT LVIC WP-OUT LVIC IGBT3 TR1 1KΩ UN-IN UN-OUT RES7 LVIC RES11 IGBT4 TR2 1KΩ タイミングチャート VN-IN VN-OUT RES8 VCC RES1 470KΩ 1S VCC S IN 3KΩ R RES2 C1 OUT1 OUT2 OUT3 WN-OUT LVIC IGBT6 OUT4 VCC VCC High LEVEL IN RES3 RES9 CVCC 5V IGBT5 TR3 1KΩ WN-IN LVIC RES12 12S 1S Q 12S VCC 1S 12S Low LEVEL 1S GND 12S RT8HXXXE Timing diagram High LEVEL LOW LEVEL IN *OUT1~OUT4,VCC ≧-0.3 *-0.3≦IN≦VCC through OUT1 through P-SIDE IGBT1 OFF through OUT2 P-SIDE IGBT3 OFF through OUT3 OUT4 through P-SIDE IGBT5 OFF through through N-SIDE IGBT2,4,6 ON 110427 (3/3) 6-41 Tsukuba, Isahaya, Nagasaki, 854-0065 Japan Keep safety first in your circuit designs! ·ISAHAYA Electronics Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. 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