KERSEMI SIHFB20N50K-E3

IRFB20N50K, SiHFB20N50K
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low Gate Charge Qg Results in Simple Drive
Requirement
500
RDS(on) (Ω)
VGS = 10 V
0.21
Qg (Max.) (nC)
110
Qgs (nC)
33
Qgd (nC)
54
Configuration
• Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Available
RoHS*
COMPLIANT
• Fully Characterized Capacitance and Avalanche Voltage
and Current
Single
• Low RDS(on)
D
TO-220
• Lead (Pb)-free Available
APPLICATIONS
• Switch Mode Power Supply (SMPS)
G
• Uninterruptible Power Supply
• High Speed Power Switching
S
G
D
• Hard Switched and High Frequency Circuits
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-220
IRFB20N50KPbF
SiHFB20N50K-E3
IRFB20N50K
SiHFB20N50K
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
500
Gate-Source Voltage
VGS
± 30
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
ID
UNIT
V
20
12
A
IDM
80
2.2
W/°C
EAS
330
mJ
Currenta
IAR
20
A
Repetitive Avalanche Energya
EAR
28
mJ
Linear Derating Factor
Single Pulse Avalanche Energyb
Repetitive Avalanche
TC = 25 °C
Maximum Power Dissipation
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
PD
280
W
dV/dt
6.9
V/ns
TJ, Tstg
- 55 to + 150
for 10 s
300d
6-32 or M3 screw
10
°C
N
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. Starting TJ = 25 °C, L = 1.6 mH, RG = 25 Ω, IAS = 20 A.
c. ISD ≤ 20 A, dI/dt ≤ 350 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
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IRFB20N50K, SiHFB20N50K
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
58
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.45
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.61
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 500 V, VGS = 0 V
-
-
50
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
µA
-
0.21
0.25
Ω
gfs
VDS = 50 V, ID = 12 A
11
-
-
S
Input Capacitance
Ciss
VGS = 0 V,
-
2870
-
Output Capacitance
Coss
VDS = 25 V,
-
320
-
Reverse Transfer Capacitance
Crss
f = 1.0 MHz, see fig. 5
-
34
-
-
3480
-
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
ID = 12 Ab
VGS = 10 V
Dynamic
Output Capacitance
Effective Output Capacitance
Total Gate Charge
Coss
VDS = 1.0 V, f = 1.0 MHz
VGS = 0 V
Coss eff.
VDS = 400 V, f = 1.0 MHz
-
85
-
VDS = 0 V to 400 V
-
160
-
-
-
110
-
-
33
Qg
VGS = 10 V
ID = 20 A, VDS = 400 V
pF
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
-
-
54
Turn-On Delay Time
td(on)
-
22
-
-
74
-
-
45
-
-
33
-
-
-
20
S
-
-
80
TJ = 25 °C, IS = 20 A, VGS = 0 Vb
-
-
1.5
-
520
780
ns
-
5.3
8.0
µC
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(off)
see fig. 6 and 13b
VDD = 250 V, ID = 20 A
RG = 7.5 Ω, VGS = 10 V, see fig.
10b
tf
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
TJ = 25 °C, IF = 20 A, dI/dt = 100 A/µsb
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. Pulse width ≤ 400 µs; duty cycle ≤ 2 %.
2
A
G
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V
IRFB20N50K, SiHFB20N50K
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
10
100.0
VGS
Top 15 V
12 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
Bottom 5.0 V
ID, Drain-to-Source Current (A)
ID , Drain-to-Source Current (A)
100
1
0.1
5.0V
T J = 150 °C
10.0
T J = 25 °C
1.0
0.1
20 µs Pulse Width
TJ = 25 °C
VDS = 50 V
0.01
20 ms Pulse width
0.0
0.1
1
10
100
5.0
1
5.0V
0.1
20 µs Pulse Width
TJ = 25 °C
9.0
10.0
I D = 20 A
1
10
2.5
2.0
1.5
1.0
0.5
V GS = 10 V
0.01
0.1
8.0
3.0
rDS(on), Drain-to-Source On-Resistance
(normalised)
ID, Drain-to-Source Current (A)
3.5
VGS
Top 15 V
12 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
Bottom 5.0 V
10
7.0
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
VDS , Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
100
6.0
100
0.0
- 60
- 40
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
- 20
0
20
40
60
80
100
120
140
160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFB20N50K, SiHFB20N50K
100000
100.0
C, Capacitance (pF)
10000
ISD, Reverse Drain Current (A)
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds
shorted
Crss = Cgd
Coss = Cds + Cgd
Ciss
1000
Coss
100
Crss
TJ = 150 °C
10.0
1.0
TJ = 25 °C
10
VGS = 0 V
0.1
1
10
100
1000
0.2
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
1.0
1.2
Operation in this area limited
by rDS(on)
VDS = 400 V
VDS = 250 V
VDS = 100 V
16
12
8
4
For test circuit
see figure 13
20
40
60
80
100
100
10
120
100 µs
1 ms
1
0.1
0
TC = 25 °C
TJ = 150 °C
Single Pulse
1
10
10 ms
100
1000
10000
VDS, Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
4
0.8
1000
?? ? ???
0
0.6
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
20
0.4
VSD, Source-to Drain Voltage (V)
Fig. 8 - Maximum Safe Operating Area
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IRFB20N50K, SiHFB20N50K
RD
VDS
20
VGS
D.U.T.
RG
16
+
10 V
12
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
8
Fig. 10a - Switching Time Test Circuit
VDS
4
90 %
0
25
50
75
100
125
150
10 %
VGS
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
1
D = 0.50
Thermal Response ( ZthJC)
ID, Drain Current (A)
- VDD
0.20
0.1
0.10
0.01
0.02
0.01
Single Pulse
(Thermal Response)
P DM
0.01
t1
t2
Notes:
1. Duty Factor D = t1/t2
2. Peak TJ = PDM x TthJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t1, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
tp
15 V
L
VDS
D.U.T
RG
IAS
20 V
tp
Driver
+
A
- VDD
A
A
IAS
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
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IRFB20N50K, SiHFB20N50K
600
ID
9.4 A
17 A
20A
EAS, Single Pulse Avalanche Energy (mJ)
Top
500
Bottom
400
300
200
100
0
25
50
75
100
125
150
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
6
Fig. 13b - Gate Charge Test Circuit
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IRFB20N50K, SiHFB20N50K
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
•
•
•
•
RG
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
Period
P.W.
+
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode
VDD
forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
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