SHENZHENFREESCALE SQ4850EY

SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
PRODUCT SUMMARY
VDS (V)
60
RDS(on) () at VGS = 10 V
0.022
RDS(on) () at VGS = 4.5 V
0.031
ID (A)
FEATURES
• TrenchFET® Power MOSFET
12
Configuration
• AEC-Q101 Qualified
Single
• 100 % Rg and UIS Tested
D
• Material categorization:
For definitions of compliance please see
SO-8
S
1
8
D
S
2
7
D
S
3
6
D
G
4
5
D
G
S
Top View
N-Channel MOSFET
ORDERING INFORMATION
Package
SO-8
Lead (Pb)-free and Halogen-free
SQ4850EY-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
60
Gate-Source Voltage
VGS
± 20
Continuous Drain Current
TC = 25 °C
TC = 125 °C
Continuous Source Current (Diode Conduction)
Pulsed Drain Currenta
Single Pulse Avalanche Current
Single Pulse Avalanche Energy
Maximum Power Dissipationa
L = 0.1 mH
TC = 25 °C
TC = 125 °C
Operating Junction and Storage Temperature Range
ID
12
IS
6.2
48
IAS
23
PD
V
6.9
IDM
EAS
UNIT
26
6.8
2.2
A
mJ
W
TJ, Tstg
- 55 to + 175
°C
SYMBOL
LIMIT
UNIT
RthJA
85
RthJF
22
THERMAL RESISTANCE RATINGS
PARAMETER
Junction-to-Ambient
Junction-to-Foot (Drain)
PCB
Mountb
°C/W
Notes
a. Pulse test; pulse width  300 μs, duty cycle  2 %.
b. When mounted on 1" square PCB (FR-4 material).
1 / 10
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
SPECIFICATIONS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
Gate-Source Threshold Voltage
Gate-Source Leakage
60
-
-
1.5
2
2.5
VDS = 0 V, VGS = ± 20 V
IDSS
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward
VGS = 0, ID = 250 μA
VDS = VGS, ID = 250 μA
IGSS
Zero Gate Voltage Drain Current
Transconductanceb
VDS
VGS(th)
RDS(on)
gfs
-
-
± 100
VGS = 0 V
VDS = 60 V
-
-
1.0
VGS = 0 V
VDS = 60 V, TJ = 125 °C
-
-
50
VGS = 0 V
VDS = 60 V, TJ = 175 °C
-
-
150
VGS = 10 V
VDS5 V
30
-
-
VGS = 10 V
ID = 6 A
-
0.017
0.022
VGS = 10 V
ID = 6 A, TJ = 125 °C
-
0.029
0.037
VGS = 10 V
ID = 6 A, TJ = 175 °C
-
0.037
0.047
VGS = 4.5 V
ID = 5 A
-
0.025
0.031
-
21
-
-
1000
1250
-
185
235
-
75
95
VDS = 15 V, ID = 6 A
V
nA
μA
A

S
Dynamicb
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Chargec
Qg
Gate-Source Chargec
Qgs
Gate-Drain Chargec
Qgd
Gate Resistance
Turn-On Delay Timec
Rise Timec
Turn-Off Delay Timec
Fall Timec
Source-Drain Diode Ratings and
Rg
VGS = 0 V
VDS = 25 V, f = 1 MHz
VGS = 10 V
VDS = 30 V, ID = 6 A
f = 1 MHz
td(on)
tr
td(off)
VDD = 30 V, RL = 30 
ID  1 A, VGEN = 10 V, Rg = 1 
tf
-
20
30
-
2.9
-
-
4.4
-
0.5
-
2.1
-
7
11
-
9
14
-
23
35
-
9
14
pF
nC

ns
Characteristicsb
Pulsed Currenta
ISM
Forward Voltage
VSD
IF = 1.7 A, VGS = 0
-
-
48
A
-
0.8
1.2
V
Notes
a. Pulse test; pulse width  300 μs, duty cycle  2 %.
b. Guaranteed by design, not subject to production testing.
c. Independent of operating temperature.




Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
2 / 10
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
40
40
VGS = 10 V thru 5 V
VGS = 4 V
32
I D - Drain Current (A)
I D - Drain Current (A)
32
24
16
24
16
TC = 25 °C
8
8
TC = 125 °C
VGS = 3 V
TC = - 55 °C
0
0
0
2
4
6
8
VDS - Drain-to-Source Voltage (V)
0
10
1
2
3
4
VGS - Gate-to-Source Voltage (V)
Output Characteristics
5
Transfer Characteristics
0.10
50
R DS(on) - On-Resistance (Ω)
g fs - Transconductance (S)
TC = - 55 °C
40
TC = 25 °C
30
20
TC = 125 °C
10
0.08
0.06
0.04
VGS = 4.5 V
0.02
VGS = 10 V
0.00
0
0
5
10
15
I D - Drain Current (A)
20
0
25
Transconductance
8
16
24
ID - Drain Current (A)
32
40
On-Resistance vs. Drain Current
1500
10
VGS - Gate-to-Source Voltage (V)
C - Capacitance (pF)
ID = 6 A
Ciss
1000
500
Coss
8
VDS = 30 V
6
4
2
Crss
0
0
0
10
20
30
40
50
VDS - Drain-to-Source Voltage (V)
Capacitance
3 / 10
60
0
5
10
15
Qg - Total Gate Charge (nC)
20
Gate Charge
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
100
ID = 6 A
2.1
10
I S - Source Current (A)
R DS(on) - On-Resistance (Normalized)
2.5
VGS = 10 V
1.7
1.3
0.9
TJ = 150 °C
1
TJ = 25 °C
0.1
0.01
0.5
- 50
- 25
0
25
50
75
100
125
150
0.001
0.0
175
0.2
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
1.0
0.4
0.6
0.8
VSD - Source-to-Drain Voltage (V)
1.2
Source Drain Diode Forward Voltage
0.6
0.15
VGS(th) Variance (V)
0.09
0.06
TJ = 125 °C
0
- 0.3
ID = 5 mA
- 0.6
ID = 250 µA
0.03
- 0.9
TJ = 25 °C
- 1.2
- 50
0.00
0
1
2
3
4
5
6
7
8
VGS - Gate-to-Source Voltage (V)
9
10
- 25
0
25
50
75
100
125
150
175
TJ - Temperature (°C)
On-Resistance vs. Gate-to-Source Voltage
Threshold Voltage
75
ID = 1 mA
VDS - Drain-to-Source Voltage (V)
R DS(on) - On-Resistance (Ω)
0.3
0.12
72
69
66
63
60
- 50
- 25
0
25
50
75
100
125
150
175
TJ - Junction Temperature (°C)
Drain Source Breakdown vs. Junction Temperature
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
THERMAL RATINGS (TA = 25 °C, unless otherwise noted)
IDM Limited
100
100 μs
ID - Drain Current (A)
Limited by RDS(on)*
10
1 ms
10 ms
1
100 ms
1s
10 s, DC
0.1
BVDSS Limited
TC = 25 °C
Single Pulse
0.01
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 85 °C/W
0.02
3. T JM - TA = PDMZthJA(t)
0.01
10 -4
4. Surface Mounted
Single Pulse
10 -3
10 -2
10 -1
1
Square Wave Pulse Duration (s)
100
10
1000
Normalized Thermal Transient Impedance, Junction-to-Ambient
5 / 10
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
THERMAL RATINGS (TA = 25 °C, unless otherwise noted)
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10 -4
10 -3
10 -2
10 -1
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Note
• The characteristics shown in the two graphs
- Normalized Transient Thermal Impedance Junction-to-Ambient (25 °C)
- Normalized Transient Thermal Impedance Junction-to-Foot (25 °C)
are given for general guidelines only to enable the user to get a “ball park” indication of part capabilities. The data are extracted from single
pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part
mounted on printed circuit board - FR4, size 1" x 1" x 0.062", double sided with 2 oz. copper, 100 % on both sides. The part capabilities
can widely vary depending on actual application parameters and operating conditions.
6 / 10
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
8
6
7
5
E
1
3
2
H
4
S
h x 45
D
C
0.25 mm (Gage Plane)
A
B
e
All Leads
q
A1
L
0.004"
MILLIMETERS
DIM
Min
INCHES
Max
Min
Max
A
1.35
1.75
0.053
0.069
A1
0.10
0.20
0.004
0.008
B
0.35
0.51
0.014
0.020
C
0.19
0.25
0.0075
0.010
D
4.80
5.00
0.189
0.196
E
3.80
4.00
0.150
e
0.101 mm
1.27 BSC
0.157
0.050 BSC
H
5.80
6.20
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.50
0.93
0.020
0.037
q
0°
8°
0°
8°
S
0.44
0.64
0.018
0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
7 / 10
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
Mounting LITTLE FOOT®, SO-8 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use
integrated circuit and small-signal packages which have
been been modified to provide the heat transfer capabilities
required by power devices. Leadframe materials and
design, molding compounds, and die attach materials have
been changed, while the footprint of the packages remains
the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, ( www.freescale.net.cn
), for the
basis of the pad design for a LITTLE FOOT SO-8 power
MOSFET. In converting this recommended minimum pad
to the pad set for a power MOSFET, designers must make
two connections: an electrical connection and a thermal
connection, to draw heat away from the package.
In the case of the SO-8 package, the thermal connections
are very simple. Pins 5, 6, 7, and 8 are the drain of the
MOSFET for a single MOSFET package and are connected
together. In a dual package, pins 5 and 6 are one drain, and
pins 7 and 8 are the other drain. For a small-signal device or
integrated circuit, typical connections would be made with
traces that are 0.020 inches wide. Since the drain pins serve
the additional function of providing the thermal connection
to the package, this level of connection is inadequate. The
total cross section of the copper may be adequate to carry
the current required for the application, but it presents a
large thermal impedance. Also, heat spreads in a circular
fashion from the heat source. In this case the drain pins are
the heat sources when looking at heat spread on the PC
board.
0.288
7.3
0.050
1.27
0.196
5.0
0.027
0.69
0.078
1.98
0.2
5.07
Figure 1. Single MOSFET SO-8 Pad
Pattern With Copper Spreading
8 / 10
0.288
7.3
0.050
1.27
0.088
2.25
0.088
2.25
0.027
0.69
0.078
1.98
0.2
5.07
Figure 2. Dual MOSFET SO-8 Pad Pattern
With Copper Spreading
The minimum recommended pad patterns for the
single-MOSFET SO-8 with copper spreading (Figure 1) and
dual-MOSFET SO-8 with copper spreading (Figure 2) show
the starting point for utilizing the board area available for the
heat-spreading copper. To create this pattern, a plane of
copper overlies the drain pins. The copper plane connects
the drain pins electrically, but more importantly provides
planar copper to draw heat from the drain leads and start the
process of spreading the heat so it can be dissipated into the
ambient air. These patterns use all the available area
underneath the body for this purpose.
Since surface-mounted packages are small, and reflow
soldering is the most common way in which these are
affixed to the PC board, “thermal” connections from the
planar copper to the pads have not been used. Even if
additional planar copper area is used, there should be no
problems in the soldering process. The actual solder
connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the
drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces.
The absolute minimum power trace width must be
determined by the amount of current it has to carry. For
thermal reasons, this minimum width should be at least
0.020 inches. The use of wide traces connected to the drain
plane provides a low impedance path for heat to move away
from the device.
www.freescale.net.cn
SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
RECOMMENDED MINIMUM PADS FOR SO-8
0.172
(4.369)
0.028
0.022
0.050
(0.559)
(1.270)
0.152
(3.861)
0.047
(1.194)
0.246
(6.248)
(0.711)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Return to Index
9 / 10
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SQ4850EY
Automotive N-Channel
60 V (D-S) 175 °C MOSFET
Disclaimer
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Material Category Policy
freestyle Intertechnology, Inc. hereby certi fies that all its products that are id entified as RoHS-Compliant fulfill the
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