TYSEMI PMV45EN

Product specification
PMV45EN
N-channel TrenchMOS logic level FET
Rev. 2 — 7 November 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications.
1.2 Features and benefits
 Logic-level compatible
 Trench MOSFET technology
 Very fast switching
1.3 Applications
 Battery management
 High-speed switching
1.4 Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 150 °C
-
-
30
V
ID
drain current
Tsp = 25 °C; VGS = 10 V; see Figure 1;
see Figure 3
-
-
5.4
A
VGS
gate-source voltage
-20
-
20
V
-
35
42
mΩ
Static characteristics
drain-source on-state
resistance
RDSon
VGS = 10 V; ID = 2 A; Tj = 25 °C; see
Figure 9; see Figure 10
2. Pinning information
Table 2.
Pinning information
Pin
Symbol Description
1
G
gate
2
S
source
3
D
drain
Simplified outline
Graphic symbol
3
D
G
1
2
SOT23 (TO-236AB)
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S
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Product specification
PMV45EN
N-channel TrenchMOS logic level FET
3. Ordering information
Table 3.
Ordering information
Type number
Package
PMV45EN
Name
Description
Version
TO-236AB
plastic surface-mounted package; 3 leads
SOT23
4. Marking
Table 4.
Marking codes
Type number
Marking code[1]
PMV45EN
%4N
[1]
% = placeholder for manufacturing site code
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 150 °C
-
30
V
VDGR
drain-gate voltage
Tj ≥ 25 °C; Tj ≤ 150 °C; RGS = 20 kΩ
-
30
V
VGS
gate-source voltage
-20
20
V
ID
drain current
Tsp = 100 °C; VGS = 10 V; see Figure 1
-
3.4
A
Tsp = 25 °C; VGS = 10 V; see Figure 1;
see Figure 3
-
5.4
A
-
21.6
A
IDM
peak drain current
Tsp = 25 °C; pulsed; tp ≤ 10 µs; see
Figure 3
Ptot
total power dissipation
Tsp = 25 °C; see Figure 2
-
2
W
Tstg
storage temperature
-55
150
°C
Tj
junction temperature
-55
150
°C
Source-drain diode
IS
source current
Tsp = 25 °C
-
1.7
A
ISM
peak source current
Tsp = 25 °C; pulsed; tp ≤ 10 µs
-
6.9
A
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Product specification
PMV45EN
N-channel TrenchMOS logic level FET
6. Characteristics
Table 6.
Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
drain-source
breakdown voltage
ID = 250 µA; VGS = 0 V; Tj = 25 °C
30
-
-
V
ID = 250 µA; VGS = 0 V; Tj = -55 °C
27
-
-
V
gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C; see
Figure 8
1
1.5
2
V
ID = 1 mA; VDS = VGS; Tj = 150 °C; see
Figure 8
0.6
-
-
V
ID = 1 mA; VDS = VGS; Tj = -55 °C; see
Figure 8
-
-
2.2
V
VDS = 30 V; VGS = 0 V; Tj = 25 °C
-
-
1
µA
VDS = 30 V; VGS = 0 V; Tj = 150 °C
-
-
100
µA
Static characteristics
V(BR)DSS
VGS(th)
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
10
100
nA
VGS = -20 V; VDS = 0 V; Tj = 25 °C
-
10
100
nA
VGS = 10 V; ID = 2 A; Tj = 25 °C; see
Figure 9; see Figure 10
-
35
42
mΩ
VGS = 10 V; ID = 2 A; Tj = 150 °C; see
Figure 9; see Figure 10
-
59.5
71.4
mΩ
VGS = 4.5 V; ID = 1.5 A; Tj = 25 °C; see
Figure 9; see Figure 10
-
45
54
mΩ
ID = 3 A; VDS = 15 V; VGS = 10 V;
Tj = 25 °C; see Figure 11
-
9.4
-
nC
-
1.2
-
nC
-
1.9
-
nC
Dynamic characteristics
QG(tot)
total gate charge
QGS
gate-source charge
QGD
gate-drain charge
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer
capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
tf
VDS = 30 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C
VDS = 15 V; RL = 15 Ω; VGS = 10 V;
RG(ext) = 6 Ω; Tj = 25 °C
-
350
-
pF
-
70
-
pF
-
50
-
pF
-
5
-
ns
-
7
-
ns
turn-off delay time
-
16
-
ns
fall time
-
5.5
-
ns
-
0.79
1.2
V
Source-drain diode
VSD
source-drain voltage
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IS = 1.5 A; VGS = 0 V; Tj = 25 °C; see
Figure 12
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