APDS-9190
Digital Proximity Sensor
Data Sheet
Description
Features
The APDS-9190 provides IR LED and a complete digital
proximity detection system in a single 8 pin package. The
proximity function offers plug and play detection to 100
mm (without front glass) thus eliminating the need for
factory calibration of the end equipment or sub-assembly.
The proximity detection feature operates well from bright
sunlight to dark rooms. The wide dynamic range also
allows for operation in short distance detection behind
dark glass such as a cell phone.
• IR LED and Proximity Detector in an Optical Module
The proximity function is targeted specifically towards
near field proximity applications. In cell phones, the
proximity detection can detect when the user positions
the phone close to their ear. The device is fast enough
to provide proximity information at a high repetition
rate needed when answering a phone call. This provides
both improved “green” power saving capability and the
added security to lock the computer when the user is not
present. The addition of the micro-optics lenses within
the module, provide highly efficient transmission and
reception of infrared energy which lowers overall power
dissipation.
• Proximity Detection
– Fully Calibrated to 100 mm Detection
– Integrated IR LED and Synchronous LED Driver
– Eliminates “Factory Calibration” of Prox
– Covers a 2000: 1 Dynamic Range
• Programmable Wait Timer
– Wait State Power – 70 µA Typical
– Programmable from 2.72 ms to > 6 Sec
• I2C Interface Compatible
– Up to 400 kHz (I2C Fast-Mode)
– Dedicated Interrupt Pin
• Sleep Mode Power - 2.5 µA Typical
• Small Package L3.94 x W2.36 x H1.35 mm
Applications
• Cell Phone Touch-screen Disable
• Notebook/Monitor Security
• Automatic Speakerphone Enable
• Automatic Menu Pop-up
Ordering Information
• Digital Camera Eye Sensor
Part Number
Packaging
Quantity
APDS-9190
Tape & Reel
2500 per reel
8 - VDD
1 - SDA
7 - SCL
2 - SINT
6 - GND
3 - LDR
5 - LED A
4 - LED K
Functional Block Diagram
VDD
Interrupt
INT
Upper Threshold
Prox
Detect
ADC
Data
Lower Threshold
Ch1
LED A
SCL
I2C Interface
Ch0
LED Regulated
Constant Current
Sink
SDA
Control
Logic
Prox IR LED
LED K
LDR
GND
Detailed Description
The APDS-9190 light-to-digital device provides on-chip
Ch0 and CH1 diodes, integrating amplifiers, ADCs, accumulators, clocks, buffers, comparators, a state machine
and an I2C interface. Each device combines one Ch0
photodiode (visible plus infrared) and one infraredresponding (IR) photodiode. Two integrating ADCs simultaneously convert the amplified photodiode currents to a
digital value providing up to 16-bits of resolution. Upon
completion of the conversion cycle, the conversion result
is transferred to the Ch0 and IR data registers. This digital
output can be read by a microprocessor.
Communication to the device is accomplished through a
fast (up to 400 kHz), two-wire I2C serial bus for easy connection to a microcontroller or embedded controller. The
digital output of the APDS-9190 device is inherently more
immune to noise when compared to an analog interface.
The APDS-9190 provides a separate pin for level-style interrupts. When interrupts are enabled and a pre-set value
is exceeded, the interrupt pin is asserted and remains
asserted until cleared by the controlling firmware.
2
The interrupt feature simplifies and improves system
efficiency by eliminating the need to poll a sensor for a
proximity value. An interrupt is generated when the value
of proximity conversion exceeds either an upper or lower
threshold. Additionally, a programmable interrupt persistence feature allows the user to determine how many
consecutive exceeded thresholds are necessary to trigger
an interrupt. Interrupt thresholds and persistence settings
are configured independently for proximity.
Proximity detection is fully provided with an 850 nm IR
LED. An internal LED driver (LDR) pin, is jumper connected
to the LED cathode (LED K) to provide a factory calibrated
proximity of 100 +/- 20 mm. This is accomplished with a
proprietary current calibration technique that accounts
for all variances in silicon, optics, package and most importantly IR LED output power. This will eliminate or greatly
reduce the need for factory calibration that is required
for most discrete proximity sensor solutions. While the
APDS-9190 is factory calibrated at a given pulse count,
the number of proximity LED pulses can be programmed
from 1 to 255 pulses, which will allow greater proximity
distances to be achieved. Each pulse has a 16 µs period.
I/O Pins Configuration
Pin
Name
Type
Description
1
SDA
I/O
I2C serial data I/O terminal – serial data I/O for I2C.
2
INT
O
Interrupt – open drain.
3
LDR
I
LED driver for proximity emitter – up to 100 mA, open drain.
4
LEDK
O
LED Cathode, connect to LDR pin in most systems to use internal LED driver circuit
5
LEDA
I
LED Anode, connect to VBATT on PCB
6
GND
7
SCL
8
VDD
Power supply ground. All voltages are referenced to GND.
I
I2C serial clock input terminal – clock signal for I2C serial data.
Power Supply voltage.
Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)†
Parameter
Symbol
Power Supply voltage
VDD
Min
Digital voltage range
Max
Units
Conditions
1
3.8
V
-0.5
3.8
V
Digital output current
IO
-1
20
mA
Storage temperature range
Tstg
-40
85
°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Note:
1. All voltages are with respect to GND.
Recommended Operating Conditions
Parameter
Symbol
Min
Operating Ambient Temperature
TA
-30
Supply voltage
VDD
2.5
Interface Bus Power Supply Voltage
VBUS
Supply Voltage Accuracy,
VDD total error including transients
LED Supply Voltage
VBATT
Typ
3.0
Max
Units
85
°C
3.6
V
1.8
V
-3
+3
%
2.5
4.5
V
Operating Characteristics, VDD = 3 V, TA = 25° C (unless otherwise noted)
Parameter
Symbol
Supply current [1]
IDD
Min
Typ
Max
Units
Test Conditions
175
250
µA
Active
70
2.5
INT SDA output low voltage
VOL
Leakage current, SDA, SCL, INT pins
ILEAK
Leakage current, LDR pin
ILEAK
SCL, SDA input high voltage
VIH
SCL, SDA input low voltage
VIL
Oscillator frequency
fosc
Wait Mode
4.0
Sleep Mode
0
0.4
0
0.6
-5
5
µA
10
µA
1.25
705
V
3 mA sink current
6 mA sink current
V
750
0.54
V
795
kHz
PON = 1
Note:
1. The power consumption is raised by the programmed amount of Proximity LED Drive during the 8 us the LED pulse is on. The nominal and
maximum values are shown under Proximity Characteristics. There the IDD supply current is IDD Active + Proximity LED Drive programmed value.
3
Proximity Characteristics, VDD = 3 V, TA = 25° C, PGAIN=1, PEN = 1 (unless otherwise noted)
Parameter
Symbol
Supply current – LDR Pulse On
IDD
Min
Typ
Max
Units
Test Conditions
3
mA
ADC Conversion Time Step Size
2.72
ms
PTIME = 0xff
ADC Number of Integration Steps
1
steps
PTIME = 0xff
1023
counts
PTIME = 0xff
255
pulses
Full Scale ADC Counts per Steps
Proximity IR LED Pulse Count
0
Proximity Pulse Period
16.3
µs
Proximity Pulse – LED On Time
7.2
µs
Proximity LED Drive
100
mA
Proximity ADC count value,
no object
Proximity ADC Count Value
416
50
ISINK Sink current
PDRIVE =1 @ 600 mV, LDR Pin
25
PDRIVE =2
12.5
PDRIVE =3
100
LED driving 8 pulses, PDRIVE
= 0, open view (no glass) and
no reflective object above the
module.
520
624
PDRIVE=0
counts
Reflecting object – 73 x 83 mm
Kodak 90% grey card, 100 mm
distance, LED driving 8 pulses,
PDRIVE = 0, open view (no glass)
above the module.
IR LED Characteristics, VDD = 3 V, TA = 25° C
Parameter
Symbol
Forward Voltage
VF
Reverse Voltage
VR
Radiant Power
PO
Peak Wavelength
λP
Spectrum Width, Half Power
Optical Rise Time
Optical Fall Time
Min
Typ
Max
Units
Test Conditions
1.4
1.5
V
IF = 20 mA
5
V
IR = 10 µA
4.5
mW
IF = 20 mA
850
nm
IF = 20 mA
Δλ
40
nm
IF = 20 mA
TR
20
ns
IF = 100 mA
TF
20
ns
IF = 100 mA
Wait Characteristics, VDD = 3 V, TA = 25° C, WEN = 1 (unless otherwise noted)
Parameter
Min
Wait Step Size
Wait Number of Step
4
Typ
Max
2.72
1
256
Units
Test Conditions
ms
WTIME = 0xff
steps
Characteristics of the SDA and SCL bus lines, VDD = 3 V, TA = 25° C (unless otherwise noted) †
Standard-mode
Fast-mode
Parameter
Symbol
Min.
Max.
Min.
Max.
Unit
SCL clock frequency
fSCL
0
100
0
400
kHz
Hold time (repeated) START condition.
After this period, the first clock pulse is
generated
tHD;STA
4.0
–
0.6
–
µs
LOW period of the SCL clock
tLOW
4.7
–
1.3
–
µs
HIGH period of the SCL clock
tHIGH
4.0
–
0.6
–
µs
Set-up time for a repeated START condition
tSU;STA
4.7
–
0.6
–
µs
Data hold time:
tHD;DAT
0
–
0
–
ns
Data set-up time
tSU;DAT
250
–
100
–
ns
Rise time of both SDA and SCL signals
tr
20
1000
20
300
ns
Fall time of both SDA and SCL signals
tf
20
300
20
300
ns
Set-up time for STOP condition
tSU;STO
4.0
–
0.6
–
µs
Bus free time between a STOP and START condition
tBUF
4.7
–
1.3
–
µs
Capacitive load for each bus line
Cb
–
400
–
400
pF
Noise margin at the LOW level for each connected device
(including hysteresis)
VnL
0.1 VBUS
–
0.1 VBUS
–
V
Noise margin at the HIGH level for each connected device
(including hysteresis)
VnH
0.2 VBUS
–
0.2 VBUS
–
V
†
Specified by design and characterization; not production tested.
SDA
tLOW
tf
tf
tSU;DAT
tr
tHD;STA
tSP
tr
tBUF
SCL
S
tHD;STA
tHD;DAT
tHIGH
tSU;STA
Sr
tSU;STO
P
S
MSC610
Start
SCL
t(LOWSEXT)
t(LOWMEXT)
SCLACK
SDA
Figure 1. I2C Bus Timing Diagram
5
t(LOWMEXT)
Stop
SCLACK
t(LOWMEXT)
1.1
1.0
Ch 0
Normalized IDD @ 3 V 25° C
Normalized Responsitivity
1.2
0.8
0.6
0.4
Ch 1
0.2
0.0
300
400
500
600 700 800
Wavelength (Nm)
900
1000
0.9
0.8
2.4
1100
Figure 2. Spectral Responsivity
1.0
2.6
2.8
3.0
3.2
VDD (V)
3.4
3.6
3.8
Figure 3. Normalized IDD vs. VDD
Normalized IDD @ 3 V
1.2
1.1
1.0
0.9
0.8
-60
-40
-20
0
20
40
Temperature (°C)
60
80
100
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-100 -80
Normalised Radiant Intensity
Normalized Responsitivity
Figure 4. Normalized IDD vs. Temperature
-60
-40
-20 0
20
Angle (Degree)
40
60
Figure 5a. Normalized Pd Responsivity vs. Angular Displacement
6
80
100
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30
Angle (Degree)
Figure 5b. Normalized LED Angular Emitting Profile
Principles of Operation
Proximity Detection
System State Machine
Proximity sensing uses an internal IR LED light source to
emit light which is then viewed by the integrated light
detector to measure the amount of reflected light when
an object is in the light path. The amount of light detected
from a reflected surface can then be used to determine an
object’s proximity to the sensor. The APDS-9190 is factory
calibrated to meet the requirement of proximity sensing
of 100 +/- 20 mm, thus eliminating the need for factory
calibration of the end equipment. When the APDS-9190
is placed behind a typical glass surface, the proximity
detection achieved is around 25 to 40 mm, thus providing
an ideal touch-screen disable.
The APDS-9190 provides control of proximity detection
and power management functionality through an internal
state machine. After a power-on-reset, the device is in
the sleep mode. As soon as the PON bit is set, the device
will move to the start state. It will then continue through
the Prox and Wait states. If these states are enabled, the
device will execute each function. If the PON bit is set to
a 0, the state machine will continue until all conversions
are completed and then go into a low power sleep mode.
Sleep
PON = 1 (r0:b0)
PON = 0 (r0:b0)
Start
Prox
Wait
Note: In this document, the nomenclature uses the bit field name in
italics followed by the register number and bit number to allow the
user to easily identify the register and bit that controls the function. For
example, the power on (PON) is in register 0, bit 0. This is represented as
PON (r0:b0).
Figure 6. Simplified State Diagram
The APDS-9190 has controls for the number of IR pulses
(PPCOUNT), the integration time (PTIME), the LED drive
current (PDRIVE) and the photodiode configuration
(PDIODE). The photodiode configuration can be set to no
diode (test mode), infrared diode (recommended), Ch0
diode or a combination of both diodes. At the end of the
integration cycle, the results are latched into the proximity
data (PDATA) register.
The LED drive current is controlled by a regulated current
sink on the LDR pin. This feature eliminates the need to
use a current limiting resistor to control LED current. The
LED drive current can be configured for 12.5 mA, 25 mA,
50 mA, or 100mA. For higher LED drive requirements, an
external P type transistor can be used to control the LED
current.
The number of LED pulses can be programmed to a value
of 1 to 255 pulses as needed. Increasing the number of
LED pulses at a given current will increase the sensor sensitivity. Sensitivity grows by the square root of the number
of pulses. Each pulse has a 16 mS period.
The proximity integration time (PTIME) is the period of
time that the internal ADC converts the analog signal
to a digital count. It is recommend that this be set to a
minimum of PTIME = 0xFF or 2.72 ms.
Add IR+
Background
Subtract
Background
LED Off
LED On
16 µs
IRLED Pulses
Figure 7. Proximity IR LED Waveform
7
Optical Design Considerations
The APDS-9190 simplifies the optical system design by
eliminating the need for light pipes and improves system
optical efficiency by providing apertures and package
shielding which will reduce crosstalk when placed in
the final system. By reducing the IR LED to glass surface
crosstalk, proximity performance is greatly improved
and enables a wide range of cell phone applications
utilizing the APDS-9190. The module package design
has been optimized for minimum package foot print and
short distance proximity of 100 mm typical. The spacing
between the glass surface and package top surface is
critical to controlling the crosstalk. If the package to top
surface spacing gap, window thickness and transmittance
are met, there should be no need to add additional components (such as a barrier) between the LED and photodiode. Thus with some simple mechanical design implementations, the APDS-9190 will perform will in the end
equipment system.
The APDS-9190 is available in a low profile package that
contains optics which provides optical gain on both the
LED and the sensor side of the package. The device has
a package Z height of 1.35 mm and will support air gap
of < = 0.5 mm between the glass and the package. The
assumption of the optical system level design is that glass
surface above the module is < = to 1.0 mm.
By integrating the micro-optics in the package, the IR
energy emitted can be reduced thus conserving the
precious battery life in the application.
The system designer has the ability to optimize their
designs for slim form factor Z height as well as improve
the proximity sensing, save battery power and disable the
touch screen in a cellular phone.
APDS-9190 Module Optimized design parameters
• Window thickness, t ≤ 1.0 mm
• Air gap, g ≤ 0.5 mm
• Assuming window IR transmittance 90%
Plastic/Glass Window
Windows Thickness, t
Air Gap, g
APDS-9190
Figure 8. Proximity Detection
1200
1000
800
600
400
200
200
0
2
4
6
8
10
Distance (cm)
12
14
16
Figure 9a. PS Output vs. Distance, at Various Pulse number
(LED drive Current). No glass in front of the module, 18% Kodak Grey Card
8
600
400
0
4P (100 mA)
6P (100 mA)
8P (100 mA)
16P (100 mA)
8P (50 mA)
1000
PS Count
800
PS Count
1200
6P (100 mA)
8P (100 mA)
4P (100 mA)
16P (100 mA)
8P (50 mA)
0
0
2
4
6
8
10 12
Distance (cm)
14
16
18
20
Figure 9b. PS Output vs. Distance, at Various Pulse number
(LED drive Current). No glass in front of the module, 90% Kodak Grey Card
Interrupts
State Diagram
The interrupt feature of the APDS-9190 simplifies and
improves system efficiency by eliminating the need to
poll the sensor for a light intensity or proximity value. The
interrupt mode is determined by the PIEN or AIEN field in
the ENABLE register.
The following shows a more detailed flow for the state
machine. The device starts in the sleep mode. The PON
bit is written to enable the device. If the PEN bit is set,
the state machine will step through the proximity states
of proximity accumulate and then proximity ADC conversion. As soon as the conversion is complete, the state
machine will move to the following state.
The APDS-9190 implements four 16-bit-wide interrupt
threshold registers that allow the user to define thresholds
above and below a desired light level. An interrupt can
be generated when the proximity data (PDATA) exceeds
the upper threshold value (PIHTx) or falls below the lower
threshold (PILTx).
If the WEN bit is set, the state machine will then cycle
through the wait state. If the WLONG bit is set, the wait
cycles are extended by 12x over normal operation.
To further control when an interrupt occurs, the
APDS-9190 provides an interrupt persistence feature. This
feature allows the user to specify a number of conversion cycles for which an event exceeding the proximity
interrupt threshold must persist (PPERS) before actually
generating an interrupt. Refer to the register descriptions
for details on the length of the persistence.
Prox
Integration
Prox
ADC
PIHTH (r0 x OB), PIHTL (r0 x OA)
APERS (r0 x OC, b3:0)
Upper Limit
Prox Persistence
Prox
Data
Lower Limit
PILTH (r09), PIHTL (r08)
Ch1
Figure 10. Programmable Interrupt
Sleep
PON = 1
Up to 255 LED Pulses
Pulse Frequency: 60 kHz
Time: 16.3 µs – 4.2 ms
Maximum – 4.2 ms
PEN = 1
Prox
Accum
Start
WLONG = 1
Counts up to 256 steps
Step: 32.64 ms
Time: 32.64 ms – 8.35 ms
Maximum – 32.64 ms
Prox
Check
Wait
Check
Prox
ADC
Up to 255 steps
Step: 2.72 ms
Time: 2.72 ms – 696 ms
Recommended – 2.72 ms 1024 Counts
Figure 11. Extended State Diagram
9
PON = 0
Wait
WEN = 1
WLONG = 0
Counts up to 256 steps
Step: 2.72 ms
Time: 2.72 ms – 696 ms
Maximum – 2.72 ms
Power Management
Power consumption can be controlled through the use of the wait state timing since the wait state consumes only
70 µA of power. The following shows an example of using the power management feature to achieve an average power
consumption of 140 µA of current with 4 – 100 mA pulses of proximity detection.
4 IRLED Pulses
Example: 50 ms Cycle Time
Prox Accum
Prox ADC
WAIT
64 µs (32 µs LED On Time)
2.72 ms
47 ms
Figure 12. Power Consumption Calculations
10
State
Duration
Current(mA)
Prox Accum (LED On)
0.064 (0.032)
100
Prox ADC
2.72
0.175
Wait
47
0.070
Avg = ((0.032 x 100) + (2.72 x 0.175) + (47 x 0.070)) ÷ 50 = 140 µA
BASIC SOFTWARE OPERATION
The following pseudo-code shows how to do basic initialization of the APDS-9190.
uint8 PTIME,WTIME,PPCOUNT;
WTIME = 0xff; // 2.7ms – minimum Wait time
PTIME = 0xff; // 2.7ms – minimum Prox integration time
PPCOUNT = 1; // Minimum prox pulse count
WriteRegData(0, 0); //Disable and Powerdown
WriteRegData (2, PTIME);
WriteRegData (3, WTIME);
WriteRegData (0xe, PPCOUNT);
uint8 PDRIVE, PDIODE, PGAIN, AGAIN;
PDRIVE = 0; //100mA of LED Power
PDIODE = 0x20; // Ch1 Diode
PGAIN = 0; //1x Prox gain
WriteRegData (0xf, PDRIVE | PDIODE | PGAIN | AGAIN);
uint8 WEN, PEN, PON;
WEN = 8; // Enable Wait
PEN = 4; // Enable Prox
PON = 1; // Enable Power On
WriteRegData (0, WEN | PEN | PON); // WriteRegData(0,0x0f );
Wait(12); //Wait for 12 ms
int Prox_data;
Prox_data = Read_Word(0x18);
WriteRegData(uint8 reg, uint8 data)
{
m_I2CBus.WriteI2C(0x39, 0x80 | reg, 1, &data);
}
uint16 Read_Word(uint8 reg);
{
uint8 barr[2];
m_I2CBus.ReadI2C(0x39, 0xA0 | reg, 2, ref barr);
return (uint16)(barr[0] + 256 * barr[1]);
11
I2C Protocol
Interface and control of the APDS-9190 is accomplished
through an I2C serial compatible interface (standard or fast
mode) to a set of registers that provide access to device
control functions and output data. The device supports
a single slave address of 0x39 hex using 7 bit addressing
protocol. (Contact factory for other addressing options.)
of bytes. If a read command is issued, the register address
from the previous command will be used for data access.
Likewise, if the MSB of the command is not set, the device
will write a series of bytes at the address stored in the last
valid command with a register address. The command
byte contains either control information or a 5 bit register
address. The control commands can also be used to clear
interrupts. For a complete description of I2C protocols,
please review the I2C Specification at: http://www.NXP.
com
The I2C standard provides for three types of bus transaction: read, write and a combined protocol. During a
write operation, the first byte written is a command byte
followed by data. In a combined protocol, the first byte
written is the command byte followed by reading a series
Start and Stop conditions
SDA
SCL
S
P
START condition
STOP condition
Data transfer on I2C-bus
P
SDA
MSB
SCL
S or Sr
acknowledgement MSB
signal from slave
1
2
7
START or
repeated START
condition
8
9
ACK
acknowledgement
signal from receiver
MSB
1
2
3 to 8
9
ACK
1
2
3 to 8
clock line held LOW while
interrupts are serviced
byte complete,
interrupt within slave
A complete data transfer
SDA
SCL
1–7
8
9
1–7
8
9
1–7
8
9
P
S
START
condition
12
ADDRESS
R/W
ACK
DATA
ACK
DATA
ACK
STOP
condition
9
ACK
Sr
Sr or P
STOP or
repeated START
condition
A
N
P
R
S
Sr
W
…
Acknowledge (0)
Not Acknowledged (1)
Stop Condition
Read (1)
Start Condition
Repeated Start Condition
Write (0)
Continuation of protocol
Master-to-Slave
Slave-to-Master
I2C Write Protocol
1
7
1
1
8
1
8
1
1
S
Slave Address
W
A
Command Code
A
Data
A
P
I2C Write Protocol (Clear Interrupt)
1
7
1
1
8
1
1
S
Slave Address
W
A
Command Code
A
P
I2C Write Word Protocol
1
7
1
1
8
1
8
1
8
1
1
S
Slave Address
W
A
Command Code
A
Data Low
A
Data High
A
P
I2C Read Protocol – Combined Format
1
7
1
1
8
1
1
7
1
1
8
1
1
S
Slave Address
W
A
Command Code
A
Sr
Slave Address
R
A
Data High
N
P
I2C Read Word Protocol
13
1
7
1
1
8
1
1
7
1
1
8
1
S
Slave Address
W
A
Command Code
A
Sr
Slave Address
R
A
Data Low
A
8
1
1
Data High
N
P
Register Set
The APDS-9190 is controlled and monitored by data registers and a command register accessed through the serial
interface. These registers provide for a variety of control functions and can be read to determine results of the ADC
conversions.
Address
Resister Name
R/W
Register Function
Reset Value
–
COMMAND
W
Specifies register address
0x00
0x00
ENABLE
R/W
Enable of states and interrupts
0x00
0x02
PTIME
R/W
Proximity ADC time
0xFF
0x03
WTIME
R/W
Wait time
0xFF
0x08
PILTL
R/W
Proximity interrupt low threshold low byte
0x00
0x09
PILTH
R/W
Proximity interrupt low threshold hi byte
0x00
0x0A
PIHTL
R/W
Proximity interrupt hi threshold low byte
0x00
0x0B
PIHTH
R/W
Proximity interrupt hi threshold hi byte
0x00
0x0C
PERS
R/W
Interrupt persistence filters
0x00
0x0D
CONFIG
R/W
Configuration
0x00
0x0E
PPCOUNT
R/W
Proximity pulse count
0x00
0x0F
CONTROL
R/W
Gain control register
0x00
0x11
REV
R
Revision Number
Rev
0x13
STATUS
R
Device status
0x00
0x18
PDATAL
R
Proximity ADC low data register
0x00
0x19
PDATAH
R
Proximity ADC high data register
0x00
The mechanics of accessing a specific register depends on the specific protocol used. See the section on I2C protocols
on the previous pages. In general, the COMMAND register is written first to specify the specific control/status register
for following read/write operations.
14
Command Register
The command registers specifies the address of the target register for future write and read operations.
7
COMMAND
6
CMD
5
4
3
Type
2
1
0
Add
--
Field
Bits
Description
Command
7
Select Command Register. Must write as 1 when addressing COMMAND register.
Type
6:5
Selects type of transaction to follow in subsequent data transfers:
Field Value
Integration Time
00
Repeated Byte protocol transaction
01
Auto-Increment protocol transaction
10
Reserved – Do not use
11
Special function – See description below
Byte protocol will repeatedly read the same register with each data access.
Block protocol will provide auto-increment function to read successive bytes.
Add
4:0
Address register/special function register. Depending on the transaction type, see above, this field
either specifies a special function command or selects the specific control-status-register for following
write or read transactions:
Field Value
Read Value
00000
Normal – no action
00101
Proximity interrupt clear
00111
Proximity interrupt clear
other
Reserved – Do not write
Proximity Interrupt Clear. Clears any pending Proximity interrupt. This special function is self clearing.
Enable Register (0x00)
The ENABLE register is used primarily to power the APDS-9190 device up and down as shown in Table 4.
ENABLE
7
6
5
4
3
2
1
0
Address
Reserved
Reserved
PIEN
Reserved
WEN
PEN
Reserved
PON
0x00
Field
Bits
Description
Reserved
7:6
Reserved. Write as 0.
PIEN
5
Proximity Interrupt Enable. When asserted, permits proximity interrupts to be generated.
Reserved
4
Reserved. Write as 0.
WEN
3
Wait Enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables
the wait timer.
PEN
2
Proximity Enable. This bit activates the proximity function. Writing a 1 enables proximity. Writing a 0
disables proximity.
Reserved
1
Reserved. Write as 0.
PON
0
Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate.
Writing a 1 activates the oscillator. Writing a 0 disables the oscillator.
Notes:
1. A 2.7-ms delay is automatically inserted prior to entering the ADC cycle, independent of the WEN bit.
2. PON must be asserted before the ADC channels will operate correctly.
3. During writes and reads over the I2C interface, this bit is overridden and the oscillator is enabled, independent of the state of PON.
4. A minimum interval of 2.7 ms must pass after PON is asserted before proximity can be initiated. This required time is enforced by the hardware in
cases where the firmware does not provide it.
15
Proximity Time Control Register (0x02)
The proximity timing register controls the integration time of the proximity ADC in 2.72 ms increments. It is recommended that this register be programmed to a value of 0xff (1 cycle, 1023 bits).
Field
Bits
Description
PTIME
7:0
Value
Cycles
Time
Max Count
0xff
1
2.72 ms
1023
Wait Time Register (0x03)
Wait time is set 2.72 ms increments unless the WLONG bit is asserted in which case the wait times are 12x longer. WTIME
is programmed as a 2’s complement number.
Field
Bits
Description
WTIME
7:0
Register Value
Wait Time
Time (WLONG = 0)
Time (WLONG = 1)
0xff
1
2.72 ms
0.032 sec
0xb6
74
201.29 ms
2.37 sec
0x00
256
696.32 ms
8.19 sec
Notes:
1. The Write Byte protocol cannot be used when WTIME is greater than 127.
2. The Proximity Wait Time Register should be configured before PEN is asserted.
Proximity Interrupt Threshold Register (0x08 – 0x0B)
The proximity interrupt threshold registers provide the values to be used as the high and low trigger points for the comparison function for interrupt generation. If the value generated by proximity channel crosses below the lower threshold
specified, or above the higher threshold, an interrupt is signaled to the host processor.
Register
Address
Bits
Description
PILTL
0x08
7:0
Proximity ADC channel low threshold lower byte
PILTH
0x09
7:0
Proximity ADC channel low threshold upper byte
PIHTL
0x0A
7:0
Proximity ADC channel high threshold lower byte
PIHTH
0x0B
7:0
Proximity ADC channel high threshold upper byte
16
Persistence Register (0x0C)
The persistence register controls the filtering interrupt capabilities of the device. Configurable filtering is provided to
allow interrupts to be generated after each ADC integration cycle or if the ADC integration has produced a result that is
outside of the values specified by threshold register for some specified amount of time.
7
6
PERS
5
4
3
2
PPERS
1
0
Reserved
0x0c
Field
Bits
Description
PPERS
7:4
Proximity interrupt persistence. Controls rate of proximity interrupt to the host processor.
Field Value
Meaning
Interrupt Persistence Function
0000
Every
Every proximity cycle generates an interrupt
0001
1
1 consecutive proximity values out of range
...
...
...
1111
15
15 consecutive proximity values out of range
Configuration Register (0x0D)
The configuration register sets the wait long time.
7
6
5
CONFIG
4
3
2
Reserved
1
0
WLONG
Reserved
0x0D
Field
Bits
Description
Reserved
7:2
Reserved. Write as 0.
WLONG
1
Wait Long. When asserted, the wait cycles are increased by a factor 12x from that programmed in the
WTIME register.
Reserved
0
Reserved. Write as 0.
Proximity Pulse Count Register (0x0E)
The proximity pulse count register sets the number of proximity pulses that will be transmitted. PPCOUNT defines the
number of pulses to be transmitted at a 62.5 kHz rate.
7
6
PPCOUNT
5
4
3
2
1
PPCOUNT
Field
Bits
Description
PPCOUNT
7:0
Proximity Pulse Count. Specifies the number of proximity pulses to be generated.
17
0
0x0E
Control Register (0x0F)
The Gain register provides eight bits of miscellaneous control to the analog block. These bits typically control functions
such as gain settings and/or diode selection.
7
CONTROL
6
5
PDRIVE
Bits
Description
PDRIVE
7:6
LED Drive Strength.
PGAIN
Reserved
5:4
3
PDIODE
Field
PDIODE
4
Field Value
LED Strength
00
100 mA
01
50 mA
10
25 mA
11
12.5 mA
2
1
PGAIN
0
Reserved
0x0F
Proximity Diode Select.
3:2
Field Value
DIODE Selection
00
Reserved
01
Reserved
10
Proximity uses the CH1 diode
11
Reserved
Proximity Gain Control.
1:0
Field Value
Proximity Gain Value
00
1X Gain
01
Reserved
10
Reserved
11
Reserved
Reserved. Write as 0.
Rev ID Register (0x11)
The Rev ID register provides the silicon revision number. The Rev ID is a read-only register whose value never changes.
7
6
5
REV
3
REV ID
Field
Bits
Description
REV ID
7:0
Revision number identification
0x01
18
4
2
1
0
0x11
Status Register (0x13)
The Status Register provides the internal status of the device. This register is read only.
STATUS
7
6
5
4
3
2
1
0
Reserved
Reserved
PINT
Reserved
Reserved
Reserved
PVALID
Reserved
Field
Bits
Description
Reserved
7:6
Reserved.
PINT
5
Proximity Interrupt. Indicates that the device is asserting a proximity interrupt.
Reserved
4:2
Reserved.
PVALID
1
Proximity Interrupt. Indicates that the device is asserting a proximity interrupt.
Reserved
0
Reserved.
0x13
Proximity DATA Register (0x18 − 0x19)
Proximity data is stored as a 16-bit value. To ensure the data is read correctly, a two byte read I2C transaction should be
utilized with a read word protocol bit set in the command register. With this operation, when the lower byte register is
read, the upper eight bits are stored into a shadow register, which is read by a subsequent read to the upper byte. The
upper register will read the correct value even if additional ADC integration cycles end between the reading of the lower
and upper registers.
Register
Address
Bits
Description
PDATA
0x18
7:0
Proximity data low byte
PDATAH
0x19
7:0
Proximity data high byte
19
Application Information: Hardware
The application hardware circuit for implementing Proximity system solution is quite simple with the APDS-9190 and is
shown in following figure. The 1 µF decoupling capacitors should be low ESR to reduce noise. It further recommended to
maximize system performance the use of power and ground planes is recommended in the PCB. If mounted on a flexible
circuit, the power and ground traces back to the PCB should be sufficiently wide enough to have a low resistance, such
as < 1 ohm.
VDD
VBUS
1 µF
10 kΩ
10 kΩ
10 kΩ
VDD
MCU
GPIO
INT
SCL
SCL
LDR
APDS-9190
LED K
VBATT
SDA
SDA
LED A
GND
Figure 13. Circuit implementation for Proximity solution using the APDS-9190
20
1 µF
Package Outline Dimensions
1
8
7
2
2
7
6
3
3
6
5
4
4
5
.05
3.73 ±0.1
±0
1.35 ±0.20
2.36 ±0.2
2.10 ±0.1
0.25 (x6)
0.05
1.18 ±0.05
PINOUT
1 - SDA
2 - INT
3 - LDR
4 - LEDK
5 - LEDA
6 - GND
7 - SCL
8 - VDD
PCB Pad Layout
Suggested PCB pad layout guidelines for the Dual Flat
No-Lead surface mount package are shown below.
0.60
0.80
0.72 (x8)
0.25 (x6)
0.60
Notes: all linear dimensions are in mm.
21
0.80
0.60
0.72 (x8)
1
3.94 ±0.2
8
0.58 ±0.05
.90
.05
134
Ø0
±0
2.40 ±0.05
Ø1
0.05
±0
.10
4 ±0.10
0.29 ±0.02
B0
A
8 ±0.10
Ø1
Unit Orientation
±0
.05
A
2.70 ±0.10
8° Max
A0
Reel Dimensions
All dimensions unit: mm
22
5.50 ±0.05
12 +0.30
-0.10
4.30 ±0.10
Ø1
. 50
2 ±0.05
1.75 ±0.10
Tape Dimensions
1.70 ±0.10
K0
6° Max
Moisture Proof Packaging
All APDS-9190 options are shipped in moisture proof package. Once opened, moisture absorption begins. This part is
compliant to JEDEC MSL 3.
Units in A Sealed
Mositure-Proof
Package
Package Is
Opened (Unsealed)
Environment
less than 30 deg C, and
less than 60% RH ?
Yes
No Baking
Is Necessary
Yes
Package Is
Opened less
than 168 hours ?
No
Perform Recommended
Baking Conditions
Baking Conditions:
No
Recommended Storage Conditions:
Package
Temp.
Time
Storage Temperature
10° C to 30° C
In Reels
60° C
48 hours
Relative Humidity
Below 60% RH
In Bulk
100° C
4 hours
If the parts are not stored in dry conditions, they must be
baked before reflow to prevent damage to the parts.
Baking should only be done once.
23
Time from unsealing to soldering:
After removal from the bag, the parts should be soldered
within 168 hours if stored at the recommended storage
conditions. If times longer than 168 hours are needed, the
parts must be stored in a dry box
Recommended Reflow Profile
T - TEMPERATURE (°C)
255
R3
230
217
200
180
150
120
R2
MAX 260° C
R4
60 sec to 120 sec
Above 217° C
R5
R1
80
25
0
150
200
P3
SOLDER
REFLOW
Process Zone
Symbol
∆T
Maximum ∆T/
∆time or Duration
Heat Up
P1, R1
25° C to 150° C
3°C/s
Solder Paste Dry
P2, R2
150° C to 200° C
100 s to 180 s
Solder Reflow
P3, R3
P3, R4
200° C to 260° C
260° C to 200° C
3°C/s
-6°C/s
Cool Down
P4, R5
P1
HEAT
UP
50
100
P2
SOLDER PASTE DRY
250
P4
COOL DOWN
300
t-TIME
(SECONDS)
200° C to 25° C
-6°C/s
Time maintained above liquidus point, 217° C
> 217° C
60 s to 120 s
Peak Temperature
260° C
–
Time within 5° C of actual Peak Temperature
> 255° C
20 s to 40 s
Time 25° C to Peak Temperature
25° C to 260° C
8 mins
The reflow profile is a straight-line representation of
a nominal temperature profile for a convective reflow
solder process. The temperature profile is divided into
four process zones, each with different ∆T/∆time temperature change rates or duration. The ∆T/∆time rates or
duration are detailed in the above table. The temperatures
are measured at the component to printed circuit board
connections.
In process zone P1, the PC board and component pins are
heated to a temperature of 150° C to activate the flux in
the solder paste. The temperature ramp up rate, R1, is
limited to 3° C per second to allow for even heating of
both the PC board and component pins.
Process zone P2 should be of sufficient time duration (100
to 180 seconds) to dry the solder paste. The temperature is
raised to a level just below the liquidus point of the solder.
Process zone P3 is the solder reflow zone. In zone P3, the
temperature is quickly raised above the liquidus point of
For product information and a complete list of distributors, please go to our web site:
solder to 260° C (500° C) for optimum results. The dwell
time above the liquidus point of solder should be between
60 and 120 seconds. This is to assure proper coalescing
of the solder paste into liquid solder and the formation
of good solder connections. Beyond the recommended
dwell time the intermetallic growth within the solder connections becomes excessive, resulting in the formation of
weak and unreliable connections. The temperature is then
rapidly reduced to a point below the solidus temperature
of the solder to allow the solder within the connections to
freeze solid.
Process zone P4 is the cool down after solder freeze. The
cool down rate, R5, from the liquidus point of the solder to
25° C (77° F) should not exceed 6° C per second maximum.
This limitation is necessary to allow the PC board and
component pins to change dimensions evenly, putting
minimal stresses on the component.
It is recommended to perform reflow soldering no more
than twice.
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Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-3182EN - June 4, 2013