AOTF409 P-Channel Enhancement Mode Field Effect Transistor General Description The AOTF409/L uses advanced trench technology to provide excellent RDS(ON), low gate charge and low gate resistance. With the excellent thermal resistance of the TO220FL package, this device is well suited for high current load applications.AOTF409 and AOTF409L are electrically identical. Features VDS (V) =-60V ID = -24A (VGS = -10V) RDS(ON) < 40mΩ (VGS = -10V) RDS(ON) < 54mΩ (VGS = -4.5V) TO-220FL D G S G D S Absolute Maximum Ratings TA=25°C unless otherwise noted Symbol Parameter VDS Drain-Source Voltage VGS Gate-Source Voltage TC=25°C Continuous Drain Current G Pulsed Drain Current IDM TA=25°C Continuous Drain Current Avalanche Current ID TC=100°C C C Repetitive avalanche energy L=0.1mH C TC=25°C Power Dissipation B TA=25°C Power Dissipation A Junction and Storage Temperature Range Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Case 1/6 V -17 A A -4.3 IAR -37 A EAR 68 mJ 43 2.16 W 1.38 TJ, TSTG -55 to 175 Symbol t ≤ 10s Steady-State Steady-State W 21 PDSM TA=70°C ±20 -24 -60 PD TC=100°C Units V -5.4 IDSM TA=70°C Maximum -60 RθJA RθJC Typ 10 48.5 2.9 °C Max 12 58 3.5 Units °C/W °C/W °C/W www.freescale.net.cn AOTF409 P-Channel Enhancement Mode Field Effect Transistor Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=-250µA, VGS=0V -60 -1 Zero Gate Voltage Drain Current IGSS Gate-Body leakage current VDS=0V, VGS=±20V VGS(th) Gate Threshold Voltage VDS=VGS ID=-250µA -1.2 ID(ON) On state drain current VGS=-10V, VDS=-5V -60 TJ=55°C -5 VGS=-10V, ID=-20A TJ=125°C Static Drain-Source On-Resistance VGS=-4.5V, ID=-20A gFS Forward Transconductance VSD IS=-1A,VGS=0V Diode Forward Voltage Maximum Body-Diode Continuous Current IS VDS=-5V, ID=-20A DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance SWITCHING PARAMETERS Qg(10V) Total Gate Charge (10V) Qg(4.5V) Total Gate Charge (4.5V) Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time trr Qrr Max VGS=0V, VDS=-30V, f=1MHz VGS=0V, VDS=0V, f=1MHz VGS=-10V, VDS=-30V, ID=-20A Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge IF=-20A, dI/dt=500A/µs µA ±100 nA -2.1 -2.4 V 33 40 52.4 63 43 54 A 33 mΩ mΩ S -0.73 -1 V -30 A 1969 2461 2953 pF 125 178 231 pF 72 120 168 pF 1 2 4.0 Ω 34 43 52 nC 16 19.7 24 nC 8 10.2 12 nC 5 8.9 12.5 nC VGS=-10V, VDS=-30V, RL=1.5Ω, RGEN=3Ω IF=-20A, dI/dt=500A/µs Units V VDS=-60V, VGS=0V IDSS RDS(ON) Typ 12 ns 14.5 ns 38 ns 15 ns 18 25.68 33 117 167.12 217 ns nC A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The Power dissipation P DSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. B. The power dissipation P D is based on T J(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial T J =25°C. D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX)=175°C. The SOA curve provides a single pulse rating. G. The maximum current rating is limited by bond-wires. H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. 2/6 www.freescale.net.cn AOTF409 P-Channel Enhancement Mode Field Effect Transistor TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 60 30 -10V -6V -5V 50 -4.5V 20 -4V -ID(A) -ID (A) 40 30 20 15 10 VGS=-3.5V 10 VDS=-5V 25 125°C 5 VGS=-3V 25°C 0 0 0 1 2 3 4 0 5 50 RDS(ON) (mΩ) Normalized On-Resistance VGS=-4.5V 40 35 30 VGS=-10V 25 3 4 5 1.8 VGS=-10V ID=-20A 1.6 17 5 2 10 VGS=-4.5V 1.4 1.2 ID=-20A 1 0.8 20 0 5 10 15 0 20 25 50 75 100 125 150 175 Temperature (°C) 0 Figure 4: On-Resistance vs. Junction Temperature 18 (Note E) -ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 1.0E+01 100 ID=-20A 90 1.0E+00 80 40 70 1.0E-01 60 IS (A) RDS(ON) (mΩ) 2 2 45 125°C 125°C 1.0E-02 50 25°C 1.0E-03 40 25°C 30 1.0E-04 20 2 4 6 8 10 -VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) 3/6 1 -VGS(Volts) Figure 2: Transfer Characteristics (Note E) -VDS (Volts) Fig 1: On-Region Characteristics (Note E) 1.0E-05 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) www.freescale.net.cn AOTF409 P-Channel Enhancement Mode Field Effect Transistor TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 10 3500 Capacitance (pF) -VGS (Volts) 3000 VDS=30V ID=20A 8 6 4 2 Ciss 2500 2000 1500 1000 Coss 500 0 0 0 10 20 30 40 50 0 Crss 10 -Qg (nC) Figure 7: Gate-Charge Characteristics 100.0 RDS(ON) limited 10µs 10µs 200 100µs 160 10ms 1.0 TJ(Max)=175°C TC=25°C 0.0 0.01 0.1 1 ZθJC Normalized Transient Thermal Resistance 1 D=Ton/T TJ,PK=TC+PDM.ZθJC.RθJC 50 60 17 5 2 10 120 80 40 10 0 1E-04 0.001 100 -VDS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 10 40 TJ(Max)=175°C TC=25°C 1ms DC 0.1 30 -VDS (Volts) Figure 8: Capacitance Characteristics Power (W) -ID (Amps) 10.0 20 0.01 0.1 1 10 100 0 1000 Pulse Width (s) 18 Figure 10: Single Pulse Power Rating Junction-toCase (Note F) In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 40 RθJC=3.5°C/W 0.1 0.01 PD 0.001 0.0001 0.000001 Ton Single Pulse 0.00001 0.0001 0.001 0.01 0.1 T 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) 4/6 www.freescale.net.cn AOTF409 P-Channel Enhancement Mode Field Effect Transistor TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS Power Dissipation (W) -IAR(A) Peak Avalanche Current 50 120 100 TA=25°C TA=100°C 80 60 40 20 TA=150°C 40 30 20 10 TA=125°C 0 0 0.000001 0 0.00001 0.0001 0.001 Time in avalanche, tA (s) Figure 12: Single Pulse Avalanche capability (Note C) 25 50 75 100 150 175 10000 30 25 TA=25°C 1000 20 Power (W) Current rating -ID(A) 125 TCASE (°C) Figure 13: Power De-rating (Note F) 15 10 17 5 2 10 100 10 5 1 0 0 25 50 75 100 125 150 175 ZθJA Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA 0 0 0 0.01 0.1 1 10 100 1000 0 Pulse Width (s) 18 Figure 15: Single Pulse Power Rating Junction-toAmbient (Note H) TCASE (°C) Figure 14: Current De-rating (Note F) In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 40 RθJA=58°C/W 0.1 PD 0.01 Single Pulse Ton 0.001 0.0001 0.001 0.01 0.1 1 T 10 100 1000 Pulse Width (s) Figure 16: Normalized Maximum Transient Thermal Impedance (Note H) 5/6 www.freescale.net.cn AOTF409 P-Channel Enhancement Mode Field Effect Transistor Gate Charge Test Circuit & Waveform Vgs Qg -10V + VDC - Qgs Vds Qgd + VDC DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds toff t on td(on) Vgs VDC Rg - DUT Vgs t d(off) tr tf 90% Vdd + Vgs 10% Vds Unclamped Inductive Switching (UIS) Test Circuit & W aveforms 2 L E AR= 1/2 LIAR Vds Vds Id VDC - Vgs Vgs + Rg BVDSS Vdd Id I AR DUT Vgs Vgs Diode Recovery Test Circuit & W aveform s Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig 6/6 Vgs L -Isd + Vdd VD C - -I F t rr dI/dt -I RM Vdd -Vds www.freescale.net.cn