DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC2771T MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER FOR 3 V DIGITAL CELLULAR TELEPHONE The µPC2771T is a silicon monolithic integrated circuit designed as the transmission PA’s driver for digital cellular telephones. This +11.5 dBm P1db driver can get back-off to PA input level. 3 V supply operation is suitable for low voltage systems. Due to the 50 Ω cascadable and mini-mold package, this IC is suitable for high-density surface mounting. The µPC2771T is manufactured using NEC’s NESATTMIII silicon bipolar process (fT = 20 GHz). This process uses a silicon nitride passivation film and gold electrodes. These materials protect the chip’s surface, prevent corrosion and feature the low current and high-frequency characteristics transistors. Thus, this IC has excellent reliability and electrical performance. FEATURES • Supply voltage : VCC = 3.0 V 50.3 V • Medium output power : P1dB = +11.5 dBm TYP. @ 0.9 GHz (with inductance to gain wide-band) P1dB = +9.5 dBm TYP. @ 1.5 GHz (with inductance to gain wide-band) • Recommended operating frequency : 800 MHz to 1.9 GHz • Insertion power gain : GP = 21 dB TYP. @ 0.9 GHz • 50 Ω cascadable : 50 Ω input/output impedance GP = 20 dB TYP. @ 1.5 GHz • High-density surface mounting possible : 6-pin mini-mold package • Adjacent channel interference : –60 dBc (typ.) @ f = 900 MHz, f = ±50 kHz, PO = +7 dBm (for reference purposes only) ORDERING INFORMATION PART NUMBER µPC2771T-E3 Remark PACKAGE 6-pin mini-mold MARKING ARRANGEMENT C2H Embossed tape 8 mm wide. Pins 1, 2, and 3 facing the perforations. 3 000 units/reel. To order evaluation samples, please contact your local NEC sales office (specify µPC2771T). Caution: Electro-static sensitive devices Document No. P10894EJ2V0DS00 (2nd edition) (Previous No. ID-3489) Date Published February 1996 P Printed in Japan © 1996 µPC2771T PIN CONNECTIONS (Bottom view) C2H (Top view) 3 2 1 4 5 6 1. 2. 3. 4. 5. 6. Input GND GND Output GND VCC 4 3 5 2 6 1 Marking µPC2771T: C2H SERIES PRODUCTS (TA = +25 °C, VCC = 3.0 V, ZL = ZS = 50 Ω) fu PO(sat) P1dB (GHz) (dBm) (dBm) PRODUCT NAME VCC (V) ICC (mA) GP (dB) 5 V, 15 dB gain µPC2708T 5 26 15 2.9 +10 +8.5 5 V, 23 dB gain µPC2709T 5 26 23 2.3 +11.5 +9 3 V, 13 dB gain µPC2762T 3 26.5 13 2.9 +9 +8 3 V, 20 dB gain Conventional µPC2763T 3 27 20 2.4 +11 +9.5 µPC2771T 3 36 21 2.1 TYPE +11.5 dBm output REMARKS +12.5 +11.5 Device described in this data sheet Caution The above table lists the typical performance of each model. See ELECTRICAL CHARACTERISTICS for the test conditions. SYSTEM APPLICATION EXAMPLE Digital cellular telephone Low-noise transistor RX DEMO ÷N I Q PLL SW PLL I 0˚ TX PA Driver µ PC2771T Phase shifter 90˚ For details of individual products, refer to the latest data sheet for the product. 2 Q µPC2771T PIN FUNCTIONS PIN 1 APPLIED SYMBOL VOLTAGE (V) – INPUT 2 3 5 GND 4 OUTPUT 6 VCC 0 2.7-3.3 EQUIVALENT CIRCUIT DESCRIPTION High-frequency signal input pin. A internal matching circuit, configured with resistors, enables 50 Ω connection over a wide band. A multi-feedback circuit is designed to cancel the deviations of hFE and resistance. 6 4 Ground pin. Form a ground pattern as wide as possible to maintain the minimum ground impedance. 1 High-frequency signal output pin. Connect an inductor between this pin and VCC to supply current to the internal output transistors. Power supply pin, which biases the internal input transistor. Excellent RF characteristics are obtained by a two-stage amplifier circuit. 2 3 5 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNIT CONDITIONS TA = +25 °C, pins 4 and 6 Supply Voltage VCC 3.6 V Input Power Pin +13 dBm TA = +25 °C Total Circuit Current ICC 77.7 mA TA = +25 °C Power Dissipation of Package PD 280 mW Mounted on 50 × 50 × 1.6 mm double-sided copper-clad epoxy glass PWB TA = +85 °C Operating Temperature Topt –40 to +85 °C Storage Temperature Tstg –55 to +150 °C RECOMMENDED OPERATING CONDITIONS SYMBOL MIN. TYP. MAX. UNIT Supply Voltage VCC 2.7 3.0 3.3 V Operating Temperature Topt –40 +25 +85 °C Operating Frequency fopt 0.8 – 1.9 GHz PARAMETER 3 µPC2771T ELECTRICAL CHARACTERISTICS (TA = +25 °C, VCC = 3.0 V, ZL = ZS = 50 Ω, with a sin wave applied unless otherwise specified) PARAMETER SYMBOL MIN. TYP. MAX. UNIT CONDITIONS Circuit Current ICC – 36 45 mA No signal Insertion Power Gain GP 19 17 21 20 24 23 dB f = 0.9 GHz f = 1.5 GHz Noise Figure NF – – 6.0 6.0 7.5 7.5 dB f = 0.9 GHz f = 1.5 GHz Isolation ISL 25 25 30 30 – – dB f = 0.9 GHz f = 1.5 GHz Input Return Loss RLin 10 10 14 14 – – dB f = 0.9 GHz f = 1.5 GHz Output Return Loss RLout 6.5 5.5 9.5 8.5 – – dB f = 0.9 GHz f = 1.5 GHz 1 dB Compression Output Level PO(1dB) +9 +7 +11.5 +9.5 – – dBm f = 0.9 GHz PO(SAT) – – +12.5 +11 – – dBm f = 0.9 GHz f = 1.5 GHz fu 1.7 2.1 – GHz 3 dB less than the gain at 0.1 GHz Saturated Output Power Maximum Operating Frequency f = 1.5 GHz OTHER CHARACTERISTICS, FOR REFERENCE PURPOSES ONLY (TA = +25 °C, VCC = 3.0 V, ZL = ZS = 50 Ω) PARAMETER Adjacent Channel Interference 1 Adjacent Channel Interference 2 Third-order Intermodulation Distortion 1 dB Compression Output Level SYMBOL Padj1 Padj2 IM3 PO(1dB) DATA MIN. TYP. MAX. – –61 – – –72 – – –59 – – –71 – – –18 – – –12 – – +10.2 – UNIT dBC dBC CONDITIONS f = 900 MHz π/4 QPSKNote PO = +7 dBm f = ±50 MHz f = 1.5 GHz π/4 QPSKNote f = ±50 MHz f = ±100 MHz f = ±100 MHz PO = +7 dBm dBC dBm Sin wave input Output of each tone PO = +7 dBm f1 = 900 MHz f2 = 902 MHz f1 = 1.5 GHz f2 = 1.502 GHz f = 1.5 GHz, L = 10 nH (refer to page 5 and 10) Note π/4 QPSK modulation signal input, data rate = 42 kbps, rolloff ratio = 0.5, PN 9 bits (pseudorandom pattern) 4 µPC2771T TEST CIRCUIT VCC 1 000 pF C3 L 6 50 Ω C1 IN C2 4 1 50 Ω OUT 1 000 pF 1 000 pF 2, 3, 5 Components of test circuit for measuring electrical characteristics C1 to C3 L TYPE VALUE Chip capacitor 1 000 pF Coil Note Example of actual application components (refer to page 10) TYPE C1 to C3 Chip capacitor 300 nH L Chip inductor Note 20.5T, 2 mm I.D., φ 0.25UEW VALUE 1 000 pF OPERATING FREQUENCY 100 MHz or higher 50 nH 900 MHz band 10 nH 1.5 GHz band INDUCTOR FOR THE OUTPUT PIN The internal output transistor of this IC consumes 28 mA, to output medium power. To supply current for output transistor, connect an inductor between the VCC pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above. The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port-impedance higher to get enough gain. In this case, large inductance and Q is suitable. For above reason, select an inductance of 100 Ω or over impedance in the operating frequency. The gain is a peak in the operating frequency band, and suppressed at lower frequencies. The recommendable inductance can be chosen from example of actual application components list as shown above. CAPACITORS FOR THE VCC, INPUT, AND OUTPUT PINS Capacitors of 1 000 pF are recommendable as the bypass capacitor for the VCC pin and the coupling capacitors for the input and output pins. The bypass capacitor connected to the VCC pin is used to minimize ground impedance of VCC pin. So, stable bias can be supplied against VCC fluctuation. The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 Ω load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC. To obtain a flat gain from 100 MHz upwards, 1 000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are determined by equation, C = 1/(2πRfC). 5 µPC2771T CHARACTERISTIC CURVES (TA = +25 °C, with components for measuring electrical characteristics unless otherwise specified) CIRCUIT CURRENT vs. OPERATING TEMPERATURE CIRCUIT CURRENT vs. SUPPLY VOLTAGE 50 50 40 Circuit current ICC (mA) Circuit current ICC (mA) No signal 30 20 10 0 1 2 3 40 30 20 10 0 -60 4 Supply voltage VCC (V) 18 GP VCC = 3.3 V VCC = 3.0 V 16 VCC = 2.7 V 14 12 10 VCC = 3.3 V 0 VCC = 3.0 V NF VCC = 2.7 V 8 6 0.1 3 Insertion power gain GP (dB) 20 0.3 1.0 60 80 20 TA = +25˚C TA = +85˚C +85˚C 18 +25˚C -40˚C 16 VCC = 3.0 V 0.3 1.0 Frequency f (GHz) ISOLASION vs. FREQUENCY INPUT RETURN LOSS, OUTPUT RETURN LOSS vs. FREQUENCY 3.0 0 VCC = 3.0 V VCC = 3.0 V -20 -30 0.3 1.0 Frequency f (GHz) 100 TA = -40˚C Frequency f (GHz) -40 6 40 22 14 0.1 3.0 -10 -50 0.1 20 INSERTION POWER GAIN vs. FREQUENCY VCC = 3.3 V VCC = 2.7 V VCC = 3.0 V 0 24 Input return loss RLin (dB) Output return loss RLout (dB) 5 Insertion power gain GP (dB) 7 Isolation ISL (dB) Noise figure NF (dB) 22 -20 Operating temperature Topt (˚C) INSERSION POWER GAIN, NOISE FIGURE vs. FREQUENCY 24 -40 3.0 RLout -10 -20 RLin -30 -40 0.1 0.3 1.0 Frequency f (GHz) 3.0 µPC2771T OUTPUT POWER vs. INPUT POWER OUTPUT POWER vs. INPUT POWER 15 15 VCC = 3.3 V Output power PO (dBm) Output power PO (dBm) 10 VCC = 2.7 V 5 TA = +85˚C f = 900 MHz VCC = 3.0 V f = 900 MHz VCC = 3.0 V 0 10 TA = -40˚C TA = +25˚C 5 TA = +25˚C TA = -40˚C 0 TA = +85˚C -5 -5 -25 -15 -20 -10 -5 -25 0 Input power Pin (dBm) -5 0 OUTPUT POWER vs. INPUT POWER OUTPUT POWER vs. INPUT POWER 15 Output power PO (dBm) 10 VCC = 2.7 V 5 VCC = 3.0 V 0 -5 -15 -20 -10 -5 TA = +25˚C 10 TA = -40˚C 5 TA = +25˚C 0 TA = -40˚C -5 -10 -25 TA = +85˚C f = 1.5 GHz VCC = 3.0 V VCC = 3.3 V f = 1.5 GHz Output power PO (dBm) -10 Input power Pin (dBm) 15 -25 0 TA = +85˚C -15 -20 -10 -5 0 Input power Pin (dBm) Input power Pin (dBm) OUTPUT POWER vs. INPUT POWER OUTPUT POWER vs. INPUT POWER 15 15 f = 1.9 GHz 10 VCC = 3.0 V 5 VCC = 2.7 V 0 f = 1.9 GHz VCC = 3.0 V VCC = 3.3 V Output power PO (dBm) Output power PO (dBm) -15 -20 -5 -10 10 TA = +85˚C TA = +25˚C 5 TA = -40˚C 0 -5 -10 -25 -20 -15 -10 Input power Pin (dBm) -5 0 -25 -20 -15 -10 -5 0 Input power Pin (dBm) 7 µPC2771T SATURATED OUTPUT POWER vs. FREQUENCY SATURATED OUTPUT POWER vs. FREQUENCY 17 Saturated output power PO(sat) (dBm) Pin = -3 dBm 15 VCC = 3.3 V 13 VCC = 3.0 V 11 VCC = 2.7 V 9 7 5 0.1 0.3 1.0 3.0 Pin = -3 dBm 15 13 TA = +25˚C 11 TA = -40˚C 9 7 5 0.1 0.3 1.0 Frequency f (GHz) ADJACENT CHANNEL INTERFERENCE, OUTPUT POWER vs. INPUT POWER ADJACENT CHANNEL INTERFERENCE, OUTPUT POWER vs. INPUT POWER -20 15 15 f = 1.5 GHz Pout -40 5 Padj ( f = ±50 kHz) 0 -60 -5 -10 Output power PO (dBm) 10 Adjacent channel interference Padj (dBc) f = 900 MHz 10 Pout -40 5 0 Padj ( f = ±50 kHz) -60 -5 -10 Padj ( f = ±100 kHz) -80 -30 Padj ( f = ±100 kHz) -15 -25 -20 -15 -10 -5 -80 -30 0 -15 -25 THIRD-ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE -60 f1 = 900 MHz f2 = 902 MHz -50 VCC = 3.3 V -40 VCC = 3.0 V VCC = 2.7 V -30 -20 -10 -10 -5 0 +5 Output power of each tone PO(each) (dBm) 8 -20 -15 -10 -5 0 Input power Pin (dBm) +10 Third-order intermodulation distortion IM3 (dBc) Third-order intermodulation distortion IM3 (dBc) Input power Pin (dBm) 0 -15 3.0 Frequency f (GHz) -20 Adjacent channel interference Padj (dBc) TA = +85˚C THIRD-ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE -60 f1 = 1 500 MHz f2 = 1 502 MHz -50 VCC = 3.3 V -40 VCC = 3.0 V VCC = 2.7 V -30 -20 -10 0 -15 -10 -5 0 +5 Output power of each tone PO(each) (dBm) +10 Output power PO (dBm) Saturated output power PO(sat) (dBm) 17 0.4 1 0.0 9 0.37 0.13 0.35 0.15 0.36 0.04 –80 –90 0.38 0.39 0.12 0.11 –100 0.40 0.10 –11 0 –70 4 0.3 6 0.1 – 1.4 1.6 3 0.3 7 0.1 1.8 2.0 NE GA 0.4 0.4 0 2 . 0 8 0 00 .43 0. 07 30 0 0.2 12 0 –6 32 18 0. 0 1. 0.2 50 0 1. 0.6 20 10 5.0 4.0 3.0 2.0 1.8 1.6 1.4 1.2 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 N 2.0 5 0. 0.6 1.8 1.6 1.2 1.0 0.9 0.8 1.4 0.7 0.8 1.6 0.7 1.4 1.2 1.0 0.9 0 –1 0 –5 1.2 0 1.0 0.6 3. 0.9 0.8 4.0 0 1. 0.9 G 6.0 –11 0.6 1.8 5 0. 2.0 –1 0.2 0.3 O 0.4 3. 0 1. 0 4.0 5.0 0. 8 0.2 8 0.2 2 –20 0.8 0.6 0.27 0.23 0.7 20 0.40 0.10 –90 0.38 0.39 0.12 0.11 –100 0.37 0.13 0.36 0.04 –80 0.35 0.15 –70 4 0.3 6 0.1 ( –Z–+–J–XTANCE CO ) MPO ( ) 0 1. 0.1 0. 8 0.4 10 –10 0.6 0.1 G 50 0 3 0.3 7 0.1 NE G 0.4 0.2 0 1. 50 20 10 5.0 4.0 3.0 2.0 1.8 1.6 1.4 1.2 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 10 20 0.26 0.24 ) 50 0. 0.1 0.3 7 3 0.2 00 9 0.2 0.3 1 –3 0.2 0 0 0 ( 0 0.4 1 0.0 0.4 9 0 2 –1 .08 0. 20 4 0 00 3 .0 7 30 –6 0. 32 18 0. 0 0.2 600 0 ) 0.1 6 0.3 4 0. 3 –4 0.1 1 0 9 VE TI 0.6 3. 0.1 0.4 0.9 G 0.25 0.25 0. 5 0.8 4.0 T NEN PO 6.0 OM EC NC TA AC – JX – –Z–O RE – E IV AT 8 0.6 0.2 0. 4 0. 8 0.6 0.1 0.4 0.2 0 1. ( POS 14 ITIV 0 ER EA CT A ––+JX NCE ZO–– CO M PO N 0.2 5.0 0.26 0.24 44 0. 06 40 0. –1 4.0 0.25 0.25 70 10 20 0.24 0.23 0.26 2 0.2 0.27 8 10 0.2 20 1.5 G 0.15 0.35 1 0.2 9 0.2 E NC TA AC – JX –– RE ––ZO ) 0. 4 WAVELE NG 0 0.24 0.26 0.14 0.36 80 0 0.8 30 0.2 0 2 4 0.2 0 0.1 3. 0 0.6 0.27 0.2 0.23 8 0.2 2 –20 0.13 0.37 0.23 0.27 1.5 G 0.4 G 1.9 10 0.3 0.8 0.2 0. THS 0 0.01 0.49 0.02 TOWARD 0.48 0 0.49 0.01 0.0 GENE 7 0.48 3 RA 0.4 0.0W2ARD LOADLECTION COEF F F 0.4 C E O I R ENT IN 0.0TOR 6 .03THS T NGLE OF 7 4 D 0 . E 4 G G 0 REE EN 160 A 0.4 0 L 4 S E – 6 0.0 0.0WAV 5 15 0.4 5 0 0.4 5 5 0 –1 5 0.0 0.6 –10 WAVELE NGTH S 0.4 0.3 1.9 G 90 0. 0. 06 44 2.0 5 0. 0.6 1.8 50 10 T EN 40 RESISTANCE COMPONENT R –––– 0.2 ZO ( 0.12 0.38 –5 0.2 1.6 1.2 1.0 0.9 0.8 1.4 0.7 0.1 0.3 7 3 8 20 0.11 0.39 100 600 19 0. 31 0. 4 0.10 0.40 110 0.1 6 0.3 4 0. 0. 31 19 8 0.0 2 0.4 20 1 ) 0 0. 1. 0.2 0.1 70 1 0.2 9 0.2 RESISTANCE COMPONENT R –––– 0.2 ZO 0.15 0.35 0 0.2 0 0. –4 0.3 T EN 0.14 0.36 80 0.2 00 9 0.2 0.3 1 –3 0.2 0 0 0 9 0.0 1 0.4 0.13 0.37 30 0.3 90 0.3 ( 0.12 0.38 40 0.2 07 0. 3 4 0. 0 13 0.11 0.39 100 20 8 0.0 2 0.4 20 1 0.10 0.40 110 50 9 0.0 1 0.4 19 0. 31 0. 07 0. 3 4 0. 0 13 0 0.01 0.49 0.02 TOWARD 0.48 0 0.49 0.01 0.0 GENE 7 0.48 3 RA 0.4 0.0W2ARD LOADLECTION COEF FCIENT F 0.4 E O R 0.0TOR 3 T F O 6 IN DE 7 0.0GTHS ANGLE 4 G 0.4 R N EES 0.4 0 4 VELE –160 0 . 6 0.0 0 WA 5 15 0.4 5 0.4 5 50 0 1 0 – 5 0. 0. 4 0 4 POS 0.1 14 0.4 6 0. 06 40 ENT ITIV ON 0 ER 4 MP 0. –1 EA CO C µPC2771T S PARAMETERS S11 - FREQUENCY (VCC = 3.0 V) 0. 0. 18 32 50 S22 - FREQUENCY (VCC = 3.0 V) 0. 0. 18 32 50 9 µPC2771T - CHARACTERISTIC CURVES WITH ACTUAL APPLICATION COMPONENTS Specifications of sample chip inductor Manufacturer Product name Inductance (nH) Q Typ. DC resistance (Ω) Self-resonance frequency Allowable current (mA) Murata Mfg. Co., Ltd. LQN2A10NM 10 60 0.25 or less 1 000 MHz 770 INSERTION POWER GAIN vs. FREQUENCY ISOLATION vs. FREQUENCY 24 0 VCC = 3.0 V VCC = 3.0 V 22 -10 Isolation ISL (dB) Insertion power gain GP (dB) VCC = 3.3 V 20 VCC = 2.7 V 18 16 -20 -30 -40 14 -50 0.3 0.1 1.0 3.0 0.3 0.1 Frequency f (GHz) 1.0 3.0 Frequency f (GHz) INPUT RETURN LOSS, OUTPUT RETURN LOSS vs. FREQUENCY 0 Input return loss RLin (dB) Output return loss RLout (dB) VCC = 3.0 V -10 RLin -20 RLout -30 -40 0.3 0.1 1.0 3.0 Frequency f (GHz) OUTPUT POWER vs. INPUT POWER OUTPUT POWER vs. INPUT POWER 15 15 L = 10 nH 10 10 L = 300 to 1 000 nH 5 0 -5 5 L = 300 to 1 000 nH 0 -5 -10 -25 -20 -15 -10 Input power Pin (dBm) 10 L = 10 nH f = 1.9 GHz Output power PO (dBm) Output power PO (dBm) f = 1.5 GHz -5 0 -25 -20 -15 -10 Input power Pin (dBm) -5 0 µPC2771T EXAMPLE OF EVALUATION BOARD FOR TEST CIRCUIT 3 Top View OUT H C C 6 5 L 4 C2 1 2 IN Mounting direction C VCC Component List Note Value 1. 30 × 30 × 0.4 mm double sided copper clad polyimide board. C 1 000 pF 2. Back side: GND pattern L 300 nH 3. Solder plated on pattern 4. : Through holes 11 µPC2771T DIMENSIONS OF 6-PIN MINI-MOLD PACKAGE (Units: mm) +0.1 0.3 –0.05 2 3 +0.2 1.5 –0.3 0 – 0.1 6 5 4 0.95 0.95 1.9 2.9±0.2 12 0.8 +0.2 1.1– 0.1 0.2 MIN. +0.2 2.8 –0.3 1 0.13±0.1 µPC2771T NOTES ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as wide as possible to maintain the minimum ground impedance (to prevent undesired oscillation). (3) Keep the wiring length of the ground pins as short as possible. (4) Connect a bypass capacitor to the VCC pin. (5) Insert a inductor (e.g. 300 nH) between output pin and VCC pin. RECOMMENDED SOLDERING CONDITIONS The conditions listed below shall be satisfied when soldering this product. Consult your NEC sales offices when using any other soldering process, or when soldering is done under different conditions. µPC2771T SOLDERING PROCESS SOLDERING CONDITIONS SYMBOL Infrared ray reflow Peak package surface temperature Reflow time Number of reflow processes Exposure limitNote : : : : 235 °C 30 seconds or less (at 210 °C or more) 3 None IR35-00-3 VPS Peak package surface temperature Reflow time Number of reflow processes Exposure limitNote : : : : 215 °C 40 seconds or less (at 200 °C or more) 3 None VP15-00-3 Wave soldering Solder temperature Flow time : 260 °C : 10 seconds or less Number of flow processes Exposure limitNote : 1 : None Solder temperature Flow time Exposure limitNote : 300 °C or less : 3 seconds or less/pin. : None Partial heating method WS60-00-1 Note Exposure limit before soldering after dry-pack package is opened. Storage conditions: Temperature of 25 °C and maximum relative humidity of 65% Caution Do not apply more than a single process at once, except for "Partial heating method". For details of the recommended soldering conditions, refer to the "SMD Surface Mount Technology Manual" (C10535EJ7V0IF00). 13 µPC2771T ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: “Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on a customer designated “quality assurance program“ for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance. Anti-radioactive design is not implemented in this product. M4 94.11 NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.