DTA114E SERIES Preferred Devices Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the TO–92 package which is designed for through hole applications. http://onsemi.com PNP SILICON BIAS RESISTOR TRANSISTOR MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Symbol Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc Collector Current IC 100 mAdc Total Power Dissipation @ TA = 25°C (1.) Derate above 25°C PD 350 2.81 mW mW/°C Rating 1 2 3 CASE 29 TO–92 (TO–226) STYLE 1 THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction to Ambient (surface mounted) Operating and Storage Temperature Range Maximum Temperature for Soldering Purposes, Time in Solder Bath Symbol Value Unit RθJA 357 °C/W TJ, Tstg –55 to +150 °C 260 10 °C Sec TL DEVICE MARKING AND RESISTOR VALUES Device Marking R1 (K) R2 (K) Shipping DTA114E DTA124E DTA144E DTA114Y DTA114T DTA143T DTB113E DTA123E DTA143E DTA143Z DTA114E DTA124E DTA144E DTA114Y DTA114T DTA143T DTB113E DTA123E DTA143E DTA143Z 10 22 47 10 10 4.7 1.0 2.2 4.7 4.7 10 22 47 47 ∞ ∞ 1.0 2.2 4.7 47 5000/Box PIN3 COLLECTOR (OUTPUT) R1 PIN1 R2 BASE (INPUT) PIN2 EMITTER (GROUND) Preferred devices are recommended choices for future use and best overall value. 1. Device mounted on a FR–4 glass epoxy printed circuit board using the minimum recommended footprint. Semiconductor Components Industries, LLC, 2000 August, 2000 – Rev. 1 1 Publication Order Number: DTA114E/D DTA114E SERIES ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Collector–Base Cutoff Current (VCB = 50 V, IE = 0) ICBO — — 100 nAdc Collector–Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO — — 500 nAdc Emitter–Base Cutoff Current (VEB = 6.0 V, IC = 0) IEBO — — — — — — — — — — — — — — — — — — — — 0.5 0.2 0.1 0.2 0.9 1.9 4.3 2.3 1.5 0.18 mAdc Collector–Base Breakdown Voltage (IC = 10 µA, IE = 0) V(BR)CBO 50 — — Vdc Collector–Emitter Breakdown Voltage (2.) (IC = 2.0 mA, IB = 0) V(BR)CEO 50 — — Vdc hFE 35 60 80 80 160 160 3.0 8.0 15 80 60 100 140 140 250 250 5.0 15 27 140 — — — — — — — — — — VCE(sat) — — 0.25 — — — — — — — — — — — — — — — — — — — — 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 OFF CHARACTERISTICS DTA114E DTA124E DTA144E DTA114Y DTA114T DTA143T DTB113E DTA123E DTA143E DTA143Z ON CHARACTERISTICS (2.) DC Current Gain (VCE = 10 V, IC = 5.0 mA) DTA114E DTA124E DTA144E DTA114Y DTA114T DTA143T DTB113E DTA123E DTA143E DTA143Z Collector–Emitter Saturation Voltage (IC = 10 mA, IE = 0.3 mA) DTA144E/DTA114Y (IC = 10 mA, IE = 0.3 mA) DTB113E/DTA143E (IC = 10 mA, IB = 5 mA) DTA123E (IC = 10 mA, IB = 1 mA) DTA114T/DTA143T/ (IC = 10 mA, IB = 1 mA) DTA143Z/DTA124E Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kΩ) VOL DTA114E DTA124E DTA114Y DTA114T DTA143T DTB113E DTA123E DTA143E DTA143Z DTA144E 2. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% http://onsemi.com 2 Vdc Vdc DTA114E SERIES ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 0.05 V, RL = 1.0 kΩ) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kΩ) Input Resistor Resistor Ratio Symbol Min Typ Max Unit VOH 4.9 — — Vdc R1 7.0 15.4 32.9 7.0 7.0 3.3 0.7 1.5 3.3 3.3 10 22 47 10 10 4.7 1.0 2.2 4.7 4.7 13 28.6 61.1 13 13 6.1 1.3 2.9 6.1 6.1 kΩ R1/R2 0.8 0.17 — 0.8 0.055 1.0 0.21 — 1.0 0.1 1.2 0.25 — 1.2 0.185 DTA114T DTA113T DTA144E DTA114Y DTA143Z DTB113E DTA114T DTA143T DTA123E DTA143E DTA114E DTA124E DTA144E DTA114Y DTA114T DTA143T DTB113E DTA123E DTA143E DTA143Z DTA114E/DTA124E/DTA144E DTA114Y DTA114T/DTA143T DTB113E/DTA123E/DTA143E DTA143Z http://onsemi.com 3 DTA114E SERIES VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS DTA114E PD , POWER DISSIPATION (MILLIWATTS) 250 200 150 100 RθJA = 625°C/W 50 0 -50 0 50 100 150 1 IC/IB=10 TA=-25°C 75°C 0.1 0.01 20 0 TA, AMBIENT TEMPERATURE (°C) Cob , CAPACITANCE (pF) h FE, DC CURRENT GAIN (NORMALIZED) TA=75°C 25°C -25°C 100 10 IC, COLLECTOR CURRENT (mA) 3 2 1 0 100 f = 1 MHz lE = 0 V TA = 25°C 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) Figure 3. DC Current Gain 100 25°C VO = 0.2 V TA=-25°C 10 1 0.1 0.01 0.001 50 Figure 4. Output Capacitance Vin, INPUT VOLTAGE (VOLTS) IC , COLLECTOR CURRENT (mA) 75°C 80 4 VCE = 10 V 100 60 Figure 2. VCE(sat) versus IC 1000 1 40 IC, COLLECTOR CURRENT (mA) Figure 1. Derating Curve 10 25°C TA=-25°C 10 25°C 75°C 1 VO = 5 V 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (VOLTS) 8 9 0.1 10 Figure 5. Output Current versus Input Voltage 0 10 20 30 IC, COLLECTOR CURRENT (mA) 40 Figure 6. Input Voltage versus Output Current http://onsemi.com 4 50 DTA114E SERIES 1000 10 IC/IB=10 h FE , DC CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS DTA124E TA=-25°C 25°C 1 75°C 0.1 0.01 0 20 60 40 IC, COLLECTOR CURRENT (mA) VCE = 10 V TA=75°C 100 10 80 1 10 Figure 8. DC Current Gain 100 IC , COLLECTOR CURRENT (mA) f = 1 MHz lE = 0 V TA = 25°C 2 1 0 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) 25°C TA=-25°C 1 0.1 VO = 5 V 0.01 0.001 50 75°C 10 0 1 2 3 4 VO = 0.2 V TA=-25°C 25°C 10 75°C 1 0 10 6 7 8 9 Figure 10. Output Current versus Input Voltage 100 0.1 5 Vin, INPUT VOLTAGE (VOLTS) Figure 9. Output Capacitance Vin, INPUT VOLTAGE (VOLTS) Cob , CAPACITANCE (pF) 4 0 100 IC, COLLECTOR CURRENT (mA) Figure 7. VCE(sat) versus IC 3 25°C -25°C 20 30 40 50 IC, COLLECTOR CURRENT (mA) Figure 11. Input Voltage versus Output Current http://onsemi.com 5 10 DTA114E SERIES 1 1000 IC/IB=10 TA=-25°C 25°C 75°C 0.1 0.01 h FE , CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS DTA144E 0 10 20 30 IC, COLLECTOR CURRENT (mA) TA=75°C 25°C 10 40 -25°C 100 1 10 IC, COLLECTOR CURRENT (mA) Figure 12. VCE(sat) versus IC Figure 13. DC Current Gain 1 100 0.6 0.4 0.2 0 0 TA=75°C -25°C 1 0.1 0.01 VO = 5 V 1 0 2 3 4 VO = 2 V TA=-25°C 25°C 75°C 1 0 10 6 7 8 9 10 Figure 15. Output Current versus Input Voltage 100 0.1 5 Vin, INPUT VOLTAGE (VOLTS) Figure 14. Output Capacitance 10 25°C 10 0.001 50 10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS) Vin , INPUT VOLTAGE (VOLTS) Cob , CAPACITANCE (pF) I C , COLLECTOR CURRENT (mA) f = 1 MHz lE = 0 V TA = 25°C 0.8 100 20 30 40 IC, COLLECTOR CURRENT (mA) 50 Figure 16. Input Voltage versus Output Current http://onsemi.com 6 DTA114E SERIES 180 1 IC/IB=10 hFE, DC CURRENT GAIN (NORMALIZED) VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) TYPICAL ELECTRICAL CHARACTERISTICS DTA114Y TA=-25°C 25°C 0.1 75°C 0.01 0.001 0 20 40 60 IC, COLLECTOR CURRENT (mA) TA=75°C VCE = 10 V 160 25°C 140 -25°C 120 100 80 60 40 20 0 80 2 1 4 6 Figure 17. VCE(sat) versus IC TA=75°C f = 1 MHz lE = 0 V TA = 25°C 3.5 3 IC, COLLECTOR CURRENT (mA) Cob , CAPACITANCE (pF) 90 100 100 4 2.5 2 1.5 1 0.5 0 2 4 6 8 10 15 20 25 30 35 VR, REVERSE BIAS VOLTAGE (VOLTS) 40 45 25°C -25°C 10 VO = 5 V 1 50 Figure 19. Output Capacitance 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10 Figure 20. Output Current versus Input Voltage +12 V 10 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) 80 Figure 18. DC Current Gain 4.5 0 8 10 15 20 40 50 60 70 IC, COLLECTOR CURRENT (mA) TA=-25°C 25°C 75°C Typical Application for PNP BRTs 1 LOAD 0.1 0 10 20 30 IC, COLLECTOR CURRENT (mA) 40 50 Figure 21. Input Voltage versus Output Current Figure 22. Inexpensive, Unregulated Current Source http://onsemi.com 7 DTA114E SERIES PACKAGE DIMENSIONS A TO–92 (TO–226) CASE 29–11 ISSUE AL B R P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. L SEATING PLANE K DIM A B C D G H J K L N P R V D X X G J H V C SECTION X–X 1 N INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --0.250 --0.080 0.105 --0.100 0.115 --0.135 --- MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --6.35 --2.04 2.66 --2.54 2.93 --3.43 --- N STYLE 1: PIN 1. EMITTER 2. BASE 3. COLLECTOR STYLE 2: PIN 1. BASE 2. EMITTER 3. COLLECTOR STYLE 3: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 4: PIN 1. CATHODE 2. CATHODE 3. ANODE STYLE 5: PIN 1. DRAIN 2. SOURCE 3. GATE STYLE 6: PIN 1. GATE 2. SOURCE & SUBSTRATE 3. DRAIN STYLE 7: PIN 1. SOURCE 2. DRAIN 3. GATE STYLE 8: PIN 1. DRAIN 2. GATE 3. SOURCE & SUBSTRATE STYLE 9: PIN 1. BASE 1 2. EMITTER 3. BASE 2 STYLE 10: PIN 1. CATHODE 2. GATE 3. ANODE STYLE 11: PIN 1. ANODE 2. CATHODE & ANODE 3. CATHODE STYLE 12: PIN 1. MAIN TERMINAL 1 2. GATE 3. MAIN TERMINAL 2 STYLE 13: PIN 1. ANODE 1 2. GATE 3. CATHODE 2 STYLE 14: PIN 1. EMITTER 2. COLLECTOR 3. BASE STYLE 15: PIN 1. ANODE 1 2. CATHODE 3. ANODE 2 Thermal Clad is a trademark of the Bergquist Company ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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