TDA7493 2.8 W + 2.8 W dual BTL class-D audio amplifier Features ! 2.8 W + 2.8 W continuous output power RL = 4 Ω, THD = 10%, Vcc = 5 V ! Single supply voltage range 3 V to 5.5 V ! High efficiency (η = 83%) ! Four selectable, fixed gain settings of 6 dB, 12 dB, 15.6 dB and 18 dB ! Differential inputs minimize common-mode noise ! Filterless operation ! No speaker pop at turn-on/off ! Stand-by feature ! Short-circuit protection ! Thermal-overload protection ! Externally synchronizable. HTSSOP24 exposed pad down Description The TDA7493 is a dual BTL class-D audio amplifier, specially designed for LCD TV, LCD monitors or small speakers on cradles with single-supply operation. The filterless operation allows the external components count to be reduced. The TDA7493 is assembled in the HTSSOP24 package. Thanks to the high-efficiency, slug-down package no separate heatsink is required. Table 1. Device summary Part number Operating temperature range Package TDA7493 0 to 70° HTSSOP24 (slug down) TDA749313TR 0 to 70° C HTSSOP24 (slug down October 2007 Rev 1 Packing Tube Tape & Reel 1/19 www.st.com 19 Block diagram 1 Block diagram Figure 1. 2/19 TDA7493 TDA7493 block diagram (only one of two channels shown) TDA7493 2 Pin description Pin description Figure 2. Pin connection (top view) 1 INNL INNR 24 2 INPL INPR 23 3 STANDBY SVR 22 4 PVCCPL PVCCPR 21 5 OUTPL OUTPR 20 6 PGNDL PGNDR 19 7 PGNDL PGNDR 18 8 OUTNL 17 9 PVCCNL OUTNR Exposed PVCCNR pad 10 SYNCLK GAIN1 15 11 ROSC GAIN0 14 12 SGND SVCC 13 16 3/19 Pin description Table 2. Number TDA7493 Pin list Pin name Pin description 1 INNL IN Negative differential input of left channel 2 INPL IN Positive differential input of left channel 3 STANDBY IN Stand-by mode control (H = play, L = standby) 4 PVCCPL POWER Power supply for positive branch in left channel 5 OUTPL OUT Positive PWM output for left channel 6 PGNDL POWER Power stage ground for left channel 7 PGNDL POWER Power stage ground for left channel 8 OUTNL OUT Negative PWM output for left channel 9 PVCCNL POWER Power supply for negative branch in left channel 10 SYNCLK IN/OUT Clock in/out for external oscillator 11 ROSC OUT Master oscillator frequency setting pin 12 SGND POWER Signal ground 13 SVCC POWER Signal power supply 14 GAIN0 IN Gain setting input1 15 GAIN1 IN Gain setting input2 16 PVCCNR POWER Power supply for negative branch in right channel 17 OUTNR OUT Negative PWM output for right channel 18 PGNDR POWER Power stage ground for right channel 19 PGNDR POWER Power stage ground for right channel 20 OUTPR OUT Positive PWM output for right channel 21 PVCCPR POWER Power supply for positive branch in right channel 22 SVR OUTPUT Supply voltage rejection 23 INPR IN Positive differential input of right channel 24 INNR IN Negative differential input of right channel POWER Exposed pad internally connected to GND Exposed EP pad 4/19 Pin type TDA7493 Application circuit Typical application circuit “0” PWM INNL PGNDPL PVCCNL Preamp_L C5 100nF R1 39K0hm “1” “0” PGNDNL GAIN0 “1” GAIN1 OUTNL PWM ROSC Driver C2 220nF Gain setting OUTPR INNR Driver PWM INNR SGND Driver PWM OUTNR C6 10uF C19 2200uF L3 15uH C17 0.22uF C8 330pF PGNDPR PVCCNR Preamp_R C4 220nF SVR C16 0.22uF PVCCPR SYNCLK INPR L2 15uH Load 4ohm OSC “0” INPR C3 220nF R2 20ohm R3 20ohm L4 15uH C10 1uF INNL C15 0.22uF C7 330pF C12 100nF INPL C13 100nF INPLC1 220nF L1 15uH C9 1uF STBY Driver “1” C11 100nF PVCCPL SVCC C14 100nF Figure 3. OUTPL 3 Application circuit Load 4ohm C18 0.22uF PGNDNR 5/19 Electrical specifications TDA7493 4 Electrical specifications 4.1 Absolute maximum ratings Table 3. Absolute maximum rating Symbol 4.2 Negative value Parameter Positive value Unit Vcc DC supply voltage -0.3 6 V Vi STANDBY, INNL, INPL, INNR, INPR, GAIN0, GAIN1 -0.3 6 V Top Operating temperature 0 70 °C Tstore, Tj Storage and junction temperature -40 150 °C Thermal data Table 4. Thermal data Symbol Parameter Min Rth j-case Thermal resistance junction to case Rth j-amb Typ 2 Thermal resistance junction to ambient (on recommended PCB) (1) Max 3 37 Unit °C/W °C/W 1. FR4 with via holes, copper area 9 cm² as explained in Chapter 8 on page 17. 4.3 Electrical characteristics Refer to Figure 3: Typical application circuit, VCC = 5 V, RL (load) = 4 Ω, R3 = 39 kΩ, C1 = 100 nF, f = 1 kHz, GV = 18 dB, Tamb = 25° C, unless otherwise specified. Table 5. Symbol 6/19 Electrical characteristics Parameter Condition Vs Supply range Iq Total quiescent current No filter, no load Vos Output offset voltage Vi = 0, Av = 6 dB, no load Po Output power Min Typ 3 Max 5.5 7 Unit V mA 10 mV THD = 10% 2.8 W THD = 1% 2.2 W Pd Dissipated power Po = 2.8 W + 2.8 W;, THD = 10% 1.1 W η Efficiency Po = 2.8 W + 2.8 W, RL = 4 Ω 83 % THD Total harmonic distortion RL = 4 Ω, Po = 0.5 W 0.1 % TDA7493 Electrical specifications Table 5. Symbol Tj Electrical characteristics (continued) Parameter Condition Min Thermal shut-down junction temperature Typ Max 150 GAIN1 = low 6 GAIN1 = high 12 GAIN1 = low 15.6 GAIN1 = high 18 Unit °C GAIN0 = low GV dB Closed loop gain GAIN0 = high GV Gain matching CT Crosstalk eN Total output noise -1 1 dB f = 1 kHz 60 dB A curve, Gv = 18 dB 25 µV f = 22 Hz to 22 kHz, Gv = 18 dB 25 µV Ri Input resistance Differential Input 60 kΩ SVRR Supply voltage rejection ratio fr = 100 Hz, Vr = 0.5 V, CSVR = 10 µF 60 dB VOV Overvoltage protection threshold 6 V Tr, Tf Rising and falling time 20 ns Power transistor on resistance High side 0.44 RDSON Low side 0.36 fSW Switching frequency Internal oscillator fSWR Output switching frequency IqSTBY Quiescent current in stand-by Function mode Standby and play Digital inputs Digital input thresholds: High Low With internal oscillator Ω 300 (1) With external oscillator (2) kHz 250 kHz 250 kHz 1 STANDBY = high Play STANDBY = low Standby µA V 2 0.8 1. fSW = 106 / (ROSC * 64 + 440) fsynclk = 2 * fSW with R1 = 3 kΩ , fSW in kHz. 2. fSW = fsynclk / 2 with the frequency of external oscillator. 7/19 Application information TDA7493 5 Application information 5.1 Mode selection In the TDA7493 pin STANDBY selects the operating mode, namely Standby or Play. " In mode Standby all the circuits are turned off and there is very low leakage current. " In mode Play the amplifiers are operational. During the turn on/off sequence, there are 4 operational states: standby, pre-charge, mute and play. The pre-charge and mute states are two internal transient states to set up the normal operating condition and to reduce the speaker pop noise. Table 6. Mode setting Mode selection Logic level on pin STANDBY Standby Low Play High Note: An internal pull-down resistor on pin STANDBY ensures that the default mode is Standby. 5.2 Gain setting The close loop gain is set by pins GAIN0 and GAIN1 as shown below in Table 7. The gain setting is implemented by changing the feedback resistors of the amplifiers. Table 7. Note: 8/19 Gain selection GAIN0 GAIN0 Gv (dB) 0 0 6 0 1 12 1 0 15.6 1 1 18 Internal pull-down resistors on pins GAIN0 and GAIN1 ensure that the default gain is 6 dB. TDA7493 5.3 Application information Input resistance and capacitance The input impedance is set by an internal resistor, Ri, of value 60 kΩ. An input coupling capacitor, Ci, is required on each input line. These two components together form a high-pass filter whose cutoff frequency is: fc = 1 / 2 * π * Ri * Ci Figure 4. Input high-pass RC filter The value of Ci is chosen depending on the application and the speaker system. For a cut-off frequency less than 20 Hz then the input capacitors could be 220 nF each. If a polarized capacitor is used, it is important to connect the positive side of the capacitor to the terminal with higher DC voltage. Figure 5. Input structure of TDA7493 9/19 Application information 5.4 TDA7493 Filterless modulation The modulation scheme of BTL is called unipolar PWM output. The differential output voltage changes between zero and +Vcc or between zero and -Vcc, as opposed to the traditional bipolar PWM output between +Vcc and -Vcc. The other advantage of this scheme effectively doubles the switching frequency of the differential output waveform. Signals on OUTP and OUTN are in the same phase when the input is zero, thus the switching current is greatly reduced and the loss in the load is small. A little delay between OUTP and OUTN is introduced to avoid high transient currents which could occur if both outputs switched at the same time. TDA7493 can be used without a filter between the PWM output and the speaker, since the switching frequency of the output is beyond the audible range. The audio signal can be recovered by the inherent inductance of the speaker and natural filter of the human ear. Figure 6. 5.5 Unipolar PWM output Internal clock and external clock The switching clock of the class-D amplifier can be generated internally or it can be synchronous with the external clock. If two or more class-D amplifiers are used in the same system, it is better that all devices work at the same switching frequency. This is realized by using one TDA7493 as clock master and the others as slaves. All SYNCLK pins are connected together as shown in Figure 7. In master mode or with a single TDA7493, the output switching frequency is controlled by the resistor connected to pin ROSC. The switching frequency is: fSW = 106 / (ROSC * 64 + 840) where ROSC is in kΩ and fSW is in kHz. In this configuration pin SYNCLK is an output whose frequency is also determined by ROSC: fSYNCLK = 106 / (ROSC * 32 + 410) = 2 * fSW Note: 10/19 ROSC should be lower than 60 kΩ in master mode to avoid operation in error mode. TDA7493 Application information In slave mode, pin ROSC can be floating to force pin SYNCLK as input in order to accept the master clock. The switching frequency in this mode is: fSW = fSYNCLK / 2 Table 8. Master and slave mode Mode ROSC SYNCLK Master ROSC < 60 kΩ Output Slave Floating Input Figure 7. Master and slave modes Master Slave TDA7493 ROSC TDA7493 SYNCLK output COSC ROSC 100 nF 39 kΩ SYNCLK ROSC input 11/19 Application information 5.6 TDA7493 Output low-pass filter To avoid EMI problems, a low-pass filter can be inserted before the speaker. The cut-off frequency of the filter should be higher than 22 kHz and much lower than switching frequency. The component values of the filter will vary according to the speaker impedance. A typical LC output filter for a speaker impedance of 8 Ω and with a cut-off frequency of 27 kHz is shown in Figure 8. Figure 8. Typical LC filter for 8 Ω speaker A similar filter for a speaker impedance of 4 Ω and also with a cut-off frequency of 27 kHz is shown in Figure 9: Figure 9. 12/19 Typical LC filter for 4 Ω speaker TDA7493 5.7 Application information Protection function The TDA7493 has four types of protection: over voltage (OV), under voltage (UV), thermal (OT) and short circuit (SC) are integrated in . " over voltage protection (OV) for the supply VCC > 6 V " under voltage protection (UV) for the supply VCC < 3 V " thermal protection (OT) for the junction temperature Tj > 155ºC " short circuit protection (SC) for output short circuit (each output shorted to ground or supply, or the negative branch shorted to the positive branch in each BTL channel). When any of the above protection becomes active, the output goes to a high-impedance state. The device remains in this state until the condition is cleared or rectified; when the circuit restarts again. Differential input The TDA7493 can be used with either differential or single-ended inputs. In either case, the device must be AC coupled to the audio source. To use the device with a differential source, connect the positive lead from the audio source to the INP input and the negative lead to the INN input. The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To use the device with a single-ended source, one input is AC connected to ground (via a capacitor) and the other input is connected to the audio signal. For best performance the grounded input should be grounded at the audio source. The input schemes are shown in Figure 10: Figure 10. TDA7493 input application mode Audio Source V549 OUTP INP OUTN INN + Input stage A. Differential Input Mode V549 Audio Source 5.8 OUT INP GND INN + Input stage B. Single-ended Input Mode 13/19 Electrical characteristics curves 6 14/19 Electrical characteristics curves TDA7493 TDA7493 7 Package information Package information The TDA7493 comes in a 24-pin HTSSOP exposed-pad-down package. The outline is shown in Figure 11 and the dimensions are given in Table 9. The package code is YO and the JEDEC/EIAJ reference number is JEDEC MO-153-ADT. Figure 11. TSSOP24 EP outline 15/19 Package information Table 9. TDA7493 TSSOP24 EP dimensions mm inch Reference Notes Min Typ Max Min Typ Max A 1.20 0.047 A1 0.15 0.006 A2 0.80 b 1.05 0.031 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.008 D 7.70 7.90 0.303 D1 2.7 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.177 E2 1.50 e L 7.80 0.45 0.311 0.60 (1) (2) (3) (2) 0.026 0.75 0.018 0.024 0.030 0.039 0.10 0 0.307 0.041 0.059 1.00 aaa 0.039 0.106 0.65 L1 k 1.00 8 0.004 0 8 degrees 1. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm (0.006 inch) per side. 2. The size of the exposed pad depends on the leadframe design pad size. Please verify dimensions D1 and E2 for each device application. 3. Dimension E1 does not include interlead flash or protrusions. Intelead flash or protrusions shall not exceed 0.25mm (0.010 inch) per side. In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 16/19 TDA7493 8 Heatsink provision Heatsink provision With the exposed-pad packages it is possible to use the printed circuit board as a heatsink. Using a PCB copper ground area of 3 x 3 cm2 with 16 via holes to make contact with the exposed pad, a thermal resistance of 37° C/W can be achieved. The amount of power dissipated within the device depends primarily on the supply voltage, load impedance and output modulation level. However the maximum estimated power dissipation for the TDA7493 is around 1.1 W. With the suggested copper area of 9 cm2 a maximum junction temperature increase of less than 40° C above ambient can be expected, thus giving a maximum junction temperature, Tj, of approximately 90° C in consumer environments where 50° C is specified as the maximum ambient temperature. This provides a comfortable safety margin to the thermal protection threshold at Tj = 150° C. 17/19 Revision history 9 TDA7493 Revision history Table 10. 18/19 Document revision history Date Revision Oct-2007 1 Changes Initial release TDA7493 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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