SEMICONDUCTOR TECHNICAL DATA The MC100EP111 is a low skew 1–to–10 differential driver, designed with clock distribution in mind. It accepts two clock sources into an input multiplexer. The input signals can be either differential or single–ended if the VBB output is used. The selected signal is fanned out to 10 identical differential outputs. • • • • • • • LOW–VOLTAGE 1:10 DIFFERENTIAL ECL/PECL CLOCK DRIVER 100ps Part–to–Part Skew 35ps Output–to–Output Skew Differential Design VBB Output Voltage and Temperature Compensated Outputs Low Voltage VEE Range of –2.375 to –3.8V 75kΩ Input Pulldown Resistors The EP111 is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate– to–gate skew within a device, and empirical modeling is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. FA SUFFIX 32–LEAD TQFP PACKAGE CASE 873A–02 To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into 50Ω, even if only one side is being used. In most applications, all ten differential pairs will be used and therefore terminated. In the case where fewer than ten pairs are used, it is necessary to terminate at least the output pairs on the same package side as the pair(s) being used on that side, in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10–20ps) of the output(s) being used which, while not being catastrophic to most designs, will mean a loss of skew margin. The MC100EP111, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the EP111 to be used for high performance clock distribution in +3.3V or +2.5V systems. Designers can take advantage of the EP111’s performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For more information on using PECL, designers should refer to Motorola Application Note AN1406/D. This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. 2/97 Motorola, Inc. 1997 1 REV 0.1 MC100EP111 Pinout: 32–Lead TQFP (Top View) PIN NAMES Pins CLKn, CLKn Q0:9, Q0:9 CLK_SEL VBB Function Differential Input Pairs Differential Outputs Active Clock Select Input VBB Output FUNCTION Q3 Q3 Q4 Q4 Q5 Q5 Q6 Q6 24 23 22 21 20 19 18 17 VCCO 25 16 VCCO Q2 26 15 Q7 Q2 27 14 Q7 Q1 28 13 Q8 MC100EP111 Q1 29 12 Q8 CLK_SEL Active Input Q0 30 11 Q9 0 1 CLK0, CLK0 CLK1, CLK1 Q0 31 10 Q9 VCCO 32 2 VCC CLK_SEL 9 1 3 4 5 6 7 VCCO 8 CLK0 CLK0 VBB CLK1 CLK1 VEE LOGIC SYMBOL Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 CLK0 CLK0 CLK1 0 Q4 1 Q4 CLK1 Q5 Q5 CLK_SEL Q6 Q6 Q7 Q7 Q8 Q8 Q9 VBB MOTOROLA Q9 2 TIMING SOLUTIONS BR1333 — Rev 6 MC100EP111 ECL DC CHARACTERISTICS –40°C Symbol 0°C 25°C 85°C Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit VOH Output HIGH Voltage –1.025 –0.955 –0.880 –1.025 –0.955 –0.880 –1.025 –0.955 –0.880 –1.025 –0.955 –0.880 V VOL Output LOW Voltage –1.810 –1.705 –1.620 –1.810 –1.705 –1.620 –1.810 –1.705 –1.620 –1.810 –1.705 –1.620 V VIH Input HIGH Voltage –1.165 –0.880 –1.165 –0.880 –1.165 –0.880 –1.165 –0.880 V VIL Input LOW Voltage –1.810 –1.475 –1.810 –1.475 –1.810 –1.475 –1.810 –1.475 V VBB Output Reference Voltage –1.38 –1.26 –1.38 –1.26 –1.38 –1.26 –1.38 –1.26 V VEE Power Supply Voltage –2.375 –3.8 –2.375 –3.8 –2.375 –3.8 –2.375 –3.8 V IIH Input HIGH Current 150 µA IEE Power Supply Current 150 150 150 mA PECL DC CHARACTERISTICS –40°C Symbol 0°C 25°C 85°C Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit VOH Output HIGH Voltage (1.) 2.275 2.345 2.420 2.275 2.345 2.420 2.275 2.345 2.420 2.275 2.345 2.420 V VOL Output LOW Voltage (1.) 1.490 1.595 1.680 1.490 1.595 1.680 1.490 1.595 1.680 1.490 1.595 1.680 V VIH Input HIGH Voltage (1.) 2.135 2.420 2.135 2.420 2.135 2.420 2.135 2.420 V VIL Input LOW Voltage (1.) 1.490 1.825 1.490 1.825 1.490 1.825 1.490 1.825 V VBB Output Reference Voltage (Note 1.) 1.92 2.04 1.92 2.04 1.92 2.04 1.92 2.04 V VCC Power Supply Voltage 2.375 3.8 2.375 3.8 2.375 3.8 2.375 3.8 V IIH Input HIGH Current IEE Power Supply Current 150 150 150 150 µA mA 1. These values are for VCC = 3.3V. Level Specifications will vary 1:1 with VCC. AC CHARACTERISTICS (VEE = VEE (min) to VEE (max); VCC = VCCO = GND) –40°C Symbol Characteristic Min Typ 0°C Max Min 25°C Typ Max Min Typ 85°C Max Min Typ Max Unit tPLH tPHL Propagation Delay to Output IN (differential) IN (single–ended) tskew Within–Device Skew Part–to–Part Skew (Diff) 35 100 35 100 35 100 35 100 ps fmax Maximum Input Frequency 1.5 1.5 1.5 1.5 GHz VPP Minimum Input Swing VCMR Common Mode Range tr/tf Output Rise/Fall Time TIMING SOLUTIONS BR1333 — Rev 6 Condition ps 400 400 500 500 500 500 mV V 200 200 200 3 200 ps 20%–80% MOTOROLA MC100EP111 OUTLINE DIMENSIONS A –T–, –U–, –Z– FA SUFFIX PLASTIC TQFP PACKAGE CASE 873A–02 ISSUE A 4X A1 32 0.20 (0.008) AB T–U Z 25 1 –U– –T– B V AE P B1 DETAIL Y 17 8 V1 AE DETAIL Y 9 4X –Z– 9 0.20 (0.008) AC T–U Z S1 S DETAIL AD G –AB– 0.10 (0.004) AC AC T–U Z –AC– BASE METAL ÉÉ ÉÉ ÉÉ ÉÉ F 8X M_ R J D SECTION AE–AE W K X DETAIL AD Q_ GAUGE PLANE H 0.250 (0.010) C E MOTOROLA M N 0.20 (0.008) SEATING PLANE 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE –AB– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS –T–, –U–, AND –Z– TO BE DETERMINED AT DATUM PLANE –AB–. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE –AC–. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE –AB–. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.500 0.700 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.020 0.028 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF TIMING SOLUTIONS BR1333 — Rev 6 MC100EP111 Motorola reserves the right to make changes without further notice to any products herein. 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How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405; Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 Mfax: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://www.mot.com/sps/ ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 TIMING SOLUTIONS BR1333 — Rev 6 ◊ 5 *MC100EP111/D* MC100EP111/D MOTOROLA