CGY 21 GaAs MMIC ● ● ● ● ● ● ● ● ● CGY 21 Two-stage monolithic microwave IC (MMIC amplifier) All gold metallization Chip fully passivated Operating voltage range: 3 to 6 V 50 Ω input/output; RLIN RLOUT > 10 dB Gain: 21 dB at 500 MHz Low noise figure: 3.9 dB at 500 MHz Bandwidth: 2 GHz Hermetically sealed package ESD: Electrostatic discharge sensitive device, observe handling precautions! Type Ordering Code Circuit Diagram (Pin Configuration) CGY 21 Q68000-A5953 TO-12 1 2 3 4 1) RF output, VS Interstage, VS RF input RF and DC ground, case For detailed information see chapter Package Outlines. Semiconductor Group Package1) 1 CGY 21 Maximum Ratings Parameter Symbol Values Unit Supply voltage, TC ≤ 80 ˚C VS 6 V Total power dissipation, TC ≤ 50 ˚C Ptot 2 W Channel temperature Tch 150 ˚C Storage temperature range Tstg – 55 … + 150 RthchC 50 Thermal Resistance Channel - case K/W Note: Exceeding any of the maximum ratings may cause permanent damage to the device. Appropriate handling procedures are required to protect the electrostatic sensitive IC against degradation due to excess voltage or excess current spikes. Excellent ground connection of lead 4 and the package (e. g. soldered on microstripline laminate) is required to achieve guaranteed RF performance and stable operation conditions and provides adequate heat sink. Low parasitic capacitance of the bias network to port 2 gives optimum gain and flatness. Input and output connections must be DC isolated by coupling capacitors. Semiconductor Group 2 CGY 21 Electrical Characteristics at TA = 25 ˚C, VS = 4.5 V, RS = RL = 50 Ω, unless otherwise specified, (for application circuit see next page). Parameter Symbol Values Unit min. typ. max. Operating current Iop – 160 200 mA Power gain f = 100 MHz to 900 MHz G 19 21 – dB Gain flatness f = 100 MHz to 900 MHz ∆G – 1.5 2 Noise figure f = 100 MHz to 900 MHz F – 3.9 5.5 Input return loss f = 100 MHz to 900 MHz RLIN – 12 9.5 Output return loss f = 100 MHz to 900 MHz RLOUT – 12 9.5 Third order intercept point two-tone intermodulation test f1= 806 MHz, f2= 810 MHz, Po = 10 dBm (both carriers) IP3 31 32.5 – 1 dB gain compression f = 100 MHz to 900 MHz P1dB – 19 – Semiconductor Group 3 dBm CGY 21 Application Circuit f = 100 MHz to 900 MHz Legend of components C1, C2, C3 1 nF chip capacitors L1, L2 1 µH inductance (B 78108 - T 1102K) D 6 V2 Zener diode (BZW 22C6V2) Semiconductor Group 4 CGY 21 Total power dissipation Ptot = f (TC) Max. supply voltage VSmax = f (TC) Operating current Iop = f (VS) Semiconductor Group 5 CGY 21 Power gain G = f (f) VS = 4.5 V, RS = RL = 50 Ω Power gain G = f (VS) RS = RL = 50 Ω Power gain G = f (Pout) VS = 4.5 V, RS = RL = 50 Ω f = 0.8 GHz Semiconductor Group 6 CGY 21 Third order intercept point IP3 = f (VS) f = 800 MHz, RS = RL = 50 Ω Noise figure F = f (VS) RS = RL = 50 Ω Noise figure F = f (f) VS = 4.5 V, RS = RL = 50 Ω Semiconductor Group 7 CGY 21 S Parameters f S11 GHz MAG S21 S12 S22 ANG MAG ANG MAG ANG MAG ANG 49 55 34 17 0 – 15 – 28 – 39 13.82 13.63 13.03 12.1 10.93 9.48 7.91 6.29 – 10 – 34 – 58 – 81 – 104 – 127 – 149 – 171 0.012 0.012 0.012 0.011 0.011 0.01 0.009 0.008 – 2 – 7 – 13 – 19 – 24 – 29 – 31 – 32 0.11 0.13 0.15 0.19 0.24 0.29 0.33 0.36 3 11 18 20 20 16 12 5 VS = 4.5 V, Z0 = 50 Ω 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 0.02 0.08 0.14 0.18 0.23 0.27 0.28 0.25 S11 = f (f) VS = 4.5 V, Z0 = 50 Ω Semiconductor Group S12 = f (f) VS = 4.5 V, Z0 = 50 Ω 8 CGY 21 S Parameters (continued) S21 = f (f) VS = 4.5 V, Z0 = 50 Ω Semiconductor Group S22 = f (f) VS = 4.5 V, Z0 = 50 Ω 9