ROHM BU9794KV

TECHNICAL NOTE
LCD Segment Driver series
For 200 Segment type LCD
LCD Segment Driver
BU9794KV, BU9799KV
● Outline
This is LCD segment driver for 200 segment type display. There is a lineup which is suitable for multi
function display and is integrated display RAM and power supply circuit for LCD driving with 4 common
output type: BU9794KV and BU9799KV.
○ 200Segment (50SEG×4COM) Driver BU9794KV
○ 200Segment (50SEG×4COM) Driver BU9799KV
BU9794KV
・・・・・・・P.1
・・・・・・・P.11
200Segment (50SEG×4COM) Driver
● Feature (BU9794KV)
1) 3wire serial interface (CSB, SD, SCL)
2) Integrated RAM for display data (DDRAM) ： 50 × 4bit (Max 200 Segment)
3) LCD driving port： 4 Common output, 50 Segment output
4) Display duty： 1/4 duty
5) Integrated Buffer AMP for LCD driving power supply
6) 1/2bias, 1/3bias selectable
7) No external components
8) Low power/ Ultra low power consumption design： +2.5～5.5V
9) Independent power supply circuit for LCD driving
● Uses (BU9794KV)
Telephone, FAX, Portable equipment (POS, ECR, PDA etc.),
DSC, DVC, Car audio, Home electrical appliance, Meter equipment etc.
● Absolute Maximum Ratings （Ta=25degree, VSS=0V） (BU9794KV)
Parameter
Symbol
Limits
Unit
Remarks
Power Supply Voltage1
VDD
-0.5 ～ +7.0
V
Power supply
Power Supply Voltage2
VLCD
-0.5 ～ +7.0
V
LCD drive voltage
Pd
0.75
W
When use more than Ta=25C, subtract
7.5mW per degree.
Input voltage range
VIN
-0.5 ～ VDD+0.5
V
Operational
range
Topr
-40 ～ +85
degree
Tstg
-55 ～ +125
degree
Allowable loss
temperature
Storage temperature range
*This product is not designed against radioactive ray.
● Recommend operating conditions (Ta=25degree, VSS=0V) (BU9794KV)
Parameter
Symbol
MIN
TYP
MAX
Unit
Remarks
Power Supply Voltage1
VDD
2.5
5.5
V
Power supply
Power Supply Voltage2
VLCD
2.5
5.5
V
LCD drive voltage
This document is not delivery specifications.
Jun. 2008
● Electrical Characteristics (BU9794KV)
DC Characteristics (VDD=2.5～5.5V, VLCD=2.5～5.5V, VSS=0V, Ta=-40～85degree, unless otherwise specified)
Symb
ol
MIN
VIH 0.8VDD
VIL
VSS
IIH
IIL
-1
RON
RON
Ist
-
Parameter
“H” level input voltage
“L” level input voltage
“H” level input current
“L” level input current
LCD Driver on SEG
resistance
COM
Standby current
Limit
TYP
3.5
3.5
-
MAX
VDD
0.2VDD
1
5
Unit
V
V
uA
uA
kΩ
kΩ
uA
Power consumption 1
IDD
-
5
15
uA
Power consumption 2
ILCD
-
10
20
uA
Condition
SD,SCL,CSB
SD,SCL,CSB
SD,SCL,CSB
SD,SCL,CSB
Iload=±10uA
Display off, Oscillation off
VDD=3.3V,
VLCD=5V,
Ta=25degree
Power save mode1, FR=70Hz
1/3 bias, Frame inverse
VDD=3.3V,
VLCD=5V,
Ta=25degree
Power save mode1, FR=70Hz
1/3 bias, Frame inverse
Oscillation Characteristics (VDD=2.5～5.5V, VLCD=2.5～5.5V, VSS=0V, Ta=-40～85degree, unless otherwise specified)
Limit
Symbo
Parameter
Unit
Condition
l
MIN
TYP
MAX
FR = 80Hz setting
Frame frequency
fCLK
68
80
92
Hz
VDD=3.3V
MPU interface Characteristics (VDD=2.5 ～ 5.5V, VLCD=2.5 ～ 5.5V, VSS=0V, Ta=-40 ～ 85degree, unless otherwise
specified)
Symbo
l
tr
tf
tSCYC
tSHW
tSLW
tSDS
tSDH
tCSS
tCSH
tCHW
Parameter
Input rise time
Input fall time
SCL cycle time
“H” SCL pulse width
“L” SCL pulse width
SD setup time
SD hold time
CSB setup time
CSB hold time
“H” CSB pulse time
MIN.
400
100
100
20
50
50
50
50
Limit
TYP.
-
MAX.
80
80
-
Unit
Condition
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCHW
CSB
tCSS
tCSH
tr
tf
tSCYC
tSLW
tSHW
SCL
tSDS
tSDH
SD
Fig. BU9794KV-1 Interface Timing
2/22
● Block Diagram （BU9794KV）
●Pin Arrangement （BU9794KV）
LCD voltage generator
common
driver
Segment
driver
＋
－
LCD
BIAS
SELECTOR
common
counter
＋
－
blink timing
generator
DDRAM
SEG38
SEG23
SEG22
33
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
VLCD
SEG36
SEG0……SEG49
48
SEG37
COM0……COM3
49
32
SEG21
SEG39
SEG20
SEG40
SEG19
SEG41
SEG18
SEG42
SEG17
SEG43
SEG16
SEG44
SEG15
SEG45
SEG14
SEG46
SEG13
SEG47
SEG12
SEG48
SEG11
SEG49
SEG10
COM0
SEG9
COM1
SEG8
COM2
VSS
OSCILLATOR
Power On Reset
SEG4
SEG3
SEG2
SEG1
SEG0
TEST2
TEST1
INHb
SD
SCL
CSB
OSCIO
VSS
VDD
Command
Data Decoder
Command
register
OSCIN
VLCD
1
INHb
SEG7
SEG6
17
64
SEG5
16
COM3
serial inter face
VDD
IF FILTER
VSS
TEST2
TEST1
CSB
SD
SCL
Fig. BU9794KV-2 Block diagram
Fig. BU9794KV-3 Pin arrangement
● Terminal description （BU9794KV）
Terminal
Terminal
I/O
No.
INHb
8
I
TEST1
9
I
TEST2
10
I
OSCIO
4
I
7
6
5
3
2
1
11-60
61-64
I
I
I
SD
SCL
CSB
VSS
VDD
VLCD
SEG0-49
COM0-3
O
O
Function
Input terminal for turn off display
H: turn on display L: turn off display
Test input (ROHM use only)
Must be connect to VSS
Test input (ROHM use only)
Must be connect to VSS
External clock input
Ex clock and Int clock can be changed by command.
Must be connect to VSS when use internal oscillation circuit.
serial data input
serial data transfer clock
Chip select : “L” active
GND
Power supply
Power supply for LCD driving
SEGMENT output for LCD driving
COMMON output for LCD driving
3/22
●Command Description （BU9794KV）
D7 (MSB) is bit for command or data judgment.
Refer to Command and data transfer method.
C： 0： Next byte is RAM write data.
1： Next byte is command.
○ Mode Set (MODE SET)
MSB
D7
D6
D5
D4
C
1
0
0
D3
P3
Set display ON and OFF
Setting
P3
Display OFF
0
Display ON
1
D2
P2
D1
P1
LSB
D0
P0
Reset initialize condition
○
Set LCD drive waveform
Setup
P2
Line inversion
0
Frame inversion
1
Reset initialize condition
○
Set Power save mode
Setup
P1
P0 Reset initialize condition
Power save mode 1
0
0
Power save mode 2
0
1
Normal mode
1
0
○
High power mode
1
1
＊ Please use in VLCD≧3.0V condition in High power mode.
○ Address set (ADSET)
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
C
0
P5
P4
P3
P2
P1
P0
The range of address can be set as 00h to 31h.
Don’t set out of range address, otherwise address will be set 00h.
In reset condition, it will be set 00h.
○ Display control (DISCTL)
MSB
D7
D6
D5
D4
C
1
0
1
Set bias level
setup
1/3 Bias
1/2 Bias
Set oscillator mode
setup
Internal oscillation
External clock input
D3
P3
D2
P2
D1
P1
LSB
D0
P0
P3
0
1
Reset initialize condition
P2
0
1
Reset initialize condition
○
○
4/22
Set Frame frequency
setup
80Hz
71Hz
64Hz
53Hz
P1
0
0
1
1
P0
0
1
0
1
Reset initialize condition
○
○ Software Reset(SWRST)
MSB
D7
D6
D5
D4
D3
D2
D1
C
1
1
0
1
0
1
This command will be set initialize condition.
○ Blink control (BLKCTL)
MSB
D7
D6
D5
D4
C
1
1
1
Set blink mode
Blink mode (Hz)
OFF
0.5
1
2
D3
0
P1
0
0
1
1
○ All Pixel control (APCTL)
MSB
D7
D6
D5
D4
C
1
1
1
D3
1
All display set ON, OFF
APON
P1
Normal
0
All pixel ON
1
APOFF
Normal
All pixel OFF
P0
0
1
D2
*
P0
0
1
0
1
LSB
D0
1
LSB
D1
D0
P1
P0
(Don’t care)
Reset initialize condition
○
D2
1
D1
P1
LSB
D0
P0
Reset initialize condition
○
Reset initialize condition
○
5/22
●Function description （BU9794KV）
○SPI (3wire Serial Interface)
This device is controlled by 3-wire signal (CSB, SCL, and SD).
First, Interface counter is initialized with CSB=“H", and CSB=”L” makes SD and SCL input enable.
The protocol of 3-SPI transfer is as follows.
Each command starts with Command or Data judgment bit (D/C) as MSB data, and continuously
in order of D6 – D0 are followed after CSB =”L”. (Internal data is latched at the rising edge of SCL,
it converted to 8bits parallel data at the rising edge of 8th CLK.)
Command/Data
Command
CSB
SCL
SD
D/C D6
D5
D4
D3
D2
D1
D0
D/C
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D/C = “H” : Command
D0
D7
D6
D5
D/C = “L” : Data
Fig. BU9794KV-4 3-SPI Command/Data Transfer format
○ Write display data and transfer method
This device has Display Data RAM (DDRAM) of 50×4=200bit.
The relationship between data input and display data, DDRAM data and address are as follows;
Command
0000000
a
b
c d
e
f
g
h
i
j k
l m
n
o p
…
Display Data transfer
8 bit data will be stored in DDRAM. The address to be written is specified by Address set
command, and the address is automatically incremented in every 4bit data.
Data can be continuously written in DDRAM by transmitting Data continuously.
(When RAM data is written successively after writing RAM data to 31h (SEG49), the address is
returned to 00h (SEG0) by the auto-increment function
DDRAM address
BIT
00
01
02
03
04
0
a
e
i
m
COM0
1
b
f
j
n
COM1
2
c
g
k
o
COM2
3
d
h
l
p
COM3
SEG0
SEG1
SEG2
SEG3
SEG4
05
SEG5
06
SEG6
07
SEG7
・・・
2Fh
SEG47
As data transfer to DDRAM is done every 4bit data,
it will be cancelled if it changes CSB=”L”→”H” before 4bits data transfer.
○ Reset initialize condition
Initial condition after execute Software Reset is as follows.
・ Display is OFF.
・ DDRAM address is initialized (DDRAM Data is not initialized).
・ Refer to Command Description about initialize value of register.
6/22
30h
SEG48
31h
SEG49
● Cautions in Power ON/OFF (BU9794KV)
○ Power supply sequence
Please keep Power ON/OFF sequence as below waveform.
VLCD
VDD
FigBU9794KV-5 Power supply sequence
○ Caution in P.O.R circuit use
This device has “P.O.R” (Power-On Reset) circuit and Software Reset function.
Please keep the following recommended Power-On conditions in order to power up properly.
Please set power up conditions to meet the recommended tR, tF, tOFF, and Vbot spec
below in order to ensure P.O.R operation
VDD
tF
Recommendation condition of tR, tF, tOFF, Vbot (Ta=25℃)
tR
tOFF
tR
tF
tOFF
Vbot
Less than 5ms
Less than 5ms
More than
Less than 0.3V
20ms
Vbot
Fig. BU9794KV-6 Power ON/OFF waveform
If it is difficult to meet above conditions, execute the following sequence after Power-On.
But it is not able to accept Command input in Power off status, it has to take care that
software reset is not perfectly alternative method of POR function.
(1)
CSB “L” “H”
VDD
CSB
Fig. BU9794KV-7 CSB timing
(2)
CSB “L” , execute Software Reset command.
7/22
● IO Equivalent Circuit (BU9794KV)
VDD
VSS
VDD
CSB, SD, SCL
INHb,TEST1
VSS
VDD
OSCIN
VSS
VLCD
VSS
VLCD
SEG/COM
TEST2
VLCD
Fig. BU9794KV-8 I/O equivalent circuit
8/22
● Cautions on use
(1) Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices,
thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings
is assumed, consideration should be given to take physical safety measures including the use of fuses, etc.
(2) Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed
under the conditions of each parameter.
(3) Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection,
such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4) Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, or the digital block power
supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for
the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from
impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use
an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of
capacity dropout at a low temperature, thus determining the constant.
(5) GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure
no terminals are at a potential lower than the GND voltage including an actual electric transient.
(6) Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore,
if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal,
the ICs can break down.
(7) Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8) Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge
from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF
the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount
it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the
transportation and the storage of the set PCB.
(9) Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can
cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention
not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will
operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power
supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of
electrical characteristics.
(10) Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal
GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to
a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of
external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance
due to DC bias and changes in the capacitance due to temperature, etc.
(12) No Connecting input terminals
In terms of extremely high impedance of CMOS gate, to open the input terminals causes unstable state. And unstable state brings the inside
gate voltage of p-channel or n-channel transistor into active. As a result, battery current may increase. And unstable state can also causes
unexpected operation of IC. So unless otherwise specified, input terminals not being used should be connected to the power supply or GND line.
(13) Rush current
When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may flow
instantaneously. Therefore, give special condition to power coupling capacitance, power wiring, width of GND wiring, and routing of connections.
9/22
● Order form name selection
B U
9
7
ROHM form name
9
Part No.
4
K V
E
－
Package type
KV=VQFP
2
Packaging and forming specification
E2 =Reel-shaped emboss taping
VQFP64
<Dimension>
<Packing information>
12.0 ± 0.2
10.0 ± 0.1
33
49
17
64
1.6Max.
1.4 ± 0.05
0.1 ± 0.05
1
1.25
0.5 ± 0.15
1.0 ± 0.2
32
1.25
12.0 ± 0.2
10.0 ± 0.1
48
16
Tape
Embossed carrier tape(with dry pack)
Quantity
1000pcs
Direction
of feed
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.145 +0.05
−0.03
+6
4° −4
0.08 S
°
°
0.5 ± 0.1
+
0.2 −0.04
0.05
0.08 M
1Pin
（Unit:mm)
Direction of
Reel
※When you order , please order in times the amount of package quantity.
10/22
BU9799KV
200Segment (50SEG×4COM) Driver
● Feature (BU9799KV)
1) LCD driving port： 4 Common output, 50 Segment output
2) Integrated RAM for display data (DDRAM) ： 50 × 4bit (Max 200 Segment)
3) 2wire serial interface (SCL,SDA)
4) Integrated Oscillation circuit
5) Integrated Power supply circuit for LCD driving
1/2 ,1/3 Bias 1/4 Duty
Integrated Buffer AMP
6) No external components
7) Low power consumption design
8) Support standby mode （Controlled by INHb terminal or command）
9) Integrated Power-on Reset circuit
10) Integrated Electrical volume register (EVR) function
11) Support Blink function
12) Operation power supply: 2.5～5.5V
13) Power supply for LCD driving: 2.5～5.5V
● Uses (BU9799KV)
Telephone, FAX, Portable equipments （POS, ECR, PDA etc.）,
DSC, DVC, Car audio, Home electrical appliance, Meter equipment etc.
● Absolute Maximum Ratings （Ta=25degree, VSS=0V） (BU9799KV)
Parameter
Symbol
Limits
Unit
Remarks
Power Supply Voltage1
VDD
-0.5 ～ +7.0
V
Power supply
Power Supply Voltage2
VLCD
-0.5 ～ +7.0
V
LCD drive voltage
Allowable loss
Pd
0.75
W
When use more than Ta=25C, subtract
7.5mW per degree.
Input voltage range
VIN
-0.5 ～ VDD+0.5
V
Operational temperature
range
Topr
-40 ～ +85
degree
Storage
range
Tstg
-55 ～ +125
degree
temperature
*This product is not designed against radioactive ray.
● Recommend operating conditions (Ta=25degree, VSS=0V) (BU9799KV)
Parameter
Symbol
MIN
TYP
MAX
Unit
Remarks
Power Supply Voltage1
VDD
2.5
5.5
V
Power supply
Power Supply Voltage2
VLCD
2.5
5.5
V
LCD drive voltage
11/22
● Electrical Characteristics (BU9799KV)
DC Characteristics (VDD=2.5～5.5V, VLCD=2.5～5.5V, VSS=0V, Ta=-40～85degree, unless otherwise specified)
Parameter
Symbol
“H” level input voltage
“L” level input voltage
“H” level input current
“L” level input current
LCD Driver on SEG
resistance
COM
Standby current
VIH
VIL
IIH
IIL
RON
RON
Ist
Limit
TYP
3.5
3.5
-
MIN
0.8VDD
VSS
-1
-
Unit
MAX
VDD
0.2VDD
1
5
V
V
uA
uA
kΩ
kΩ
uA
Condition
SDA,SCL
SDA,SCL
SDA,SCL
SDA,SCL
Iload=±10uA
Display off, Oscillation off
Power consumption 1
IDD
-
2.5
15
uA
VDD=3.3V, VLCD=5V, Ta=25degree
Power save mode1, FR=70Hz
1/3 bias, Frame inverse
Power consumption 2
ILCD
-
10
20
uA
VDD=3.3V, VLCD=5V, Ta=25degree
Power save mode1, FR=70Hz
1/3 bias, Frame inverse
Oscillation Characteristics (VDD=2.5～5.5V, VLCD=2.5～5.5V, VSS=0V, Ta=-40～85degree, unless otherwise specified)
Limit
Parameter
Symbol
Unit
Condition
MIN
TYP
MAX
FR = 80Hz setting
56
80
104
Frame frequency
fCLK
Hz
VDD=3.3V
MPU interface Characteristics (VDD=2.5～5.5V, VLCD=2.5～5.5V, VSS=0V, Ta=-40～85degree, unless otherwise specified)
Limit
Parameter
Symbol
Unit
Condition
MIN.
TYP.
MAX.
0.3
Input rise time
tr
us
0.3
Input fall time
tf
us
2.5
SCL cycle time
tSCYC
us
0.6
“H” SCL pulse width
tSHW
us
1.3
“L” SCL pulse width
tSLW
us
SDA setup time
tSDS
100
ns
SDA hold time
tSDH
100
ns
1.3
Buss free time
tBUF
us
0.6
START condition hold time tHD;STA
us
0.6
START condition setup time tSU;STA
us
0.6
STOP condition setup time tSU;STO
us
Noise cancel width
tsp
50
us
SDA
tr
tLW
tBUF
tcyc
SCL
tSP
tHD;STA
tr
tSDH
tHW
tSDS
SDA
tSU;STO
tSU;STA
Fig. BU9799KV-1 interface timing
12/22
●Block Diagram （BU9799KV）
● Pin Arrangement （BU9799KV）
COM0……COM3
SEG0……SEG49
SEG38
＋
－
LCD
BIAS
SELECTOR
＋
－
common
counter
＋
blink timing
generator
DDRAM
－
VSS
SEG23
SEG22
33
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
Segment
driver
SEG34
common
driver
SEG35
LCD voltage generator
SEG36
48
SEG37
VLCD
49
32
SEG21
SEG39
SEG20
SEG40
SEG19
SEG41
SEG18
SEG42
SEG17
SEG43
SEG16
SEG44
SEG15
SEG45
SEG14
SEG46
SEG13
SEG47
SEG12
SEG48
SEG11
SEG49
SEG10
COM0
SEG9
COM1
SEG8
COM2
OSCILLATOR
Power On Reset
SEG4
SEG3
SEG2
SEG1
SEG0
TEST2
TEST1
SDA
INHb
SCL
TEST3
OSCIO
VSS
VLCD
1
Command
Data Decoder
Command
register
OSCIN
SEG7
SEG6
17
64
VDD
INHb
SEG5
16
COM3
serial interface
VDD
IF FILTER
VSS
TEST3
TEST2
TEST1
SDA
SCL
Fig. BU9799KV-2 block diagram
Fig. BU9799KV-3
●Terminal description （BU9799KV）
Terminal
Terminal
I/O
No.
INHb
8
I
TEST1
9
I
TEST2
10
I
TEST3
5
I
OSCIO
4
I
7
6
3
2
1
11-60
61-64
I
I
SDA
SCL
VSS
VDD
VLCD
SEG0-49
COM0-3
O
O
Pin arrangement
Function
Input terminal for turn off display
H: turn on display L: turn off display
Test input (ROHM use only)
TEST1=”L”: POR circuit enable
TEST1=”H”: POR circuit disenable,
refer to “Cautions in Power ON/OFF”
Test input (ROHM use only)
Must be connect to VSS
Test input (ROHM use only)
Must be connect to VSS
External clock input
Ex clock and Int clock can be changed by command.
Must be connect to VSS when use internal oscillation circuit.
serial data input
serial data transfer clock
GND
Power supply
Power supply for LCD driving
SEGMENT output for LCD driving
COMMON output for LCD driving
13/22
● Command Description （BU9799KV）
D7 (MSB) is bit for command or data judgment.
Refer to Command and data transfer method.
C： 0： Next byte is RAM write data.
1： Next byte is command.
○ Mode Set (MODE SET)
MSB
D7
D6
D5
D4
C
1
0
0
D3
P3
Set display ON and OFF
Setting
P3
Display OFF
0
Display ON
1
Set bias level
setup
1/3 Bias
1/2 Bias
D1
*
LSB
D0
*
Reset initialize condition
○
P3
0
1
○ Address set (ADSET)
MSB
D7
D6
D5
D4
D3
C
0
0
P4
P3
It is set address as follows;
Internal register
command
D2
P2
Reset initialize condition
○
D2
P2
MSB
Address [5]
ICSET [P2]
D1
P1
LSB
D0
P0
Address [4]
ADSET [P4]
・・・
・・・
LSB
Address [0]
ADSET [P0]
The range of address can be set as 00000 to 10001(2).
Don’t set out of range address, otherwise address will be set 00000.
ICSET command is only define MSB bit of address, not set the address of DDRAM.
If want to set the address of DDRAM, it has to be input ADSET command.
14/22
○ Display control (DISCTL)
MSB
D7
D6
D5
D4
C
0
1
P4
D3
P3
D2
P2
D1
P1
LSB
D0
P0
Set Power save mode FR
Power save mode FR
Normal mode
Power save mode1
Power save mode2
Power save mode3
P4
0
0
1
1
P3
0
1
0
1
Set LCD drive waveform
Setup
Line inversion
Frame inversion
P2
0
1
Reset initialize condition
Set Power save mode SR
Setup
Power save mode1
Power save mode2
Normal mode
High power mode
P1
0
0
1
1
P0
0
1
0
1
Reset initialize condition
○
○
Reset initialize condition
○
○ Set IC Operation (ICSET)
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
C
1
1
0
1
P2
P1
P0
P2： Define the MSB bit of address of DDRAM. Refer to ADSET command.
Set software reset execution
Setup
P1
No operation
0
Software Reset execute
1
This command will be set initialize condition.
When executed Software reset, P1 and P0 will be ignored.
Set oscillator mode
setup
Internal oscillation
External clock input
○ Blink control (BLKCTL)
MSB
D7
D6
D5
D4
C
1
1
1
Set blink mode
Blink mode (Hz)
OFF
0.5
1
2
P0
0
1
D3
0
P1
0
0
1
1
D2
*
P0
0
1
0
1
Reset initialize condition
○
D1
P1
LSB
D0
P0
Reset initialize condition
○
15/22
○ All Pixel control (APCTL)
MSB
D7
D6
D5
D4
C
1
1
1
D3
1
All display set ON, OFF
APON
P1
Normal
0
All pixel ON
1
APOFF
Normal
All pixel OFF
P0
0
1
D2
1
D1
P1
LSB
D0
P0
Reset initialize condition
○
Reset initialize condition
○
○ EVR Set 1(EVRSET1)
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
C
1
1
0
0
P2
P1
P0
It is able to control 32-step electrical volume register (EVR).
It is able to set V0 voltage level (the max level voltage of LCD driving voltage).
It is set electrical volume register as follows;
MSB
LSB
EVR4
EVR3
EVR2
EVR1
EVR0
EVRSET1 EVRSET1 EVRSET1 EVRSET2 EVRSET2
P2
P1
P0
P1
P0
0
0
0
0
0
Reset initialize condition
Electrical volume register (EVR) is set “00000” in reset initialize condition
In “00000” condition, V0 voltage output VLCD voltage.
Please refer to next page about V0 output voltage.
It is prohibited the EVR setting that V0 voltage will be under 2.5V.
EVRSET1 is defined the upper 3bit of electrical volume register.
It will be set the electrical volume register by this command (EVRSET1) input.
○ EVR Set 2(EVRSET2)
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
C
1
1
1
1
0
P1
P0
EVRSET2 is defined the lower 2bit of electrical volume register.
It will be set the electrical volume register by this command (EVRSET2) input.
16/22
○ The relationship of electrical volume register(EVR) setting and V0 voltage
EVR
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Calculation formula VLCD= 5.500 VLCD= 5.000 VLCD= 4.000 VLCD= 3.500 VLCD= 3.000 VLCD= 2.500
VLCD
V0= 5.500
V0= 5.000 V0= 4.000 V0= 3.500 V0= 3.000 V0= 2.500
0.967*VLCD
V0= 5.323
V0= 4.839 V0= 3.871 V0= 3.387 V0= 2.903 V0= 2.419
0.937*VLCD
V0= 5.156
V0= 4.688 V0= 3.750 V0= 3.281 V0= 2.813 V0= 2.344
0.909*VLCD
V0= 5.000
V0= 4.545 V0= 3.636 V0= 3.182 V0= 2.727 V0= 2.273
0.882*VLCD
V0= 4.853
V0= 4.412 V0= 3.529 V0= 3.088 V0= 2.647 V0= 2.206
0.857*VLCD
V0= 4.714
V0= 4.286 V0= 3.429 V0= 3.000 V0= 2.571 V0= 2.143
0.833*VLCD
V0= 4.583
V0= 4.167 V0= 3.333 V0= 2.917 V0= 2.500 V0= 2.083
0.810*VLCD
V0= 4.459
V0= 4.054 V0= 3.243 V0= 2.838 V0= 2.432 V0= 2.027
0.789*VLCD
V0= 4.342
V0= 3.947 V0= 3.158 V0= 2.763 V0= 2.368 V0= 1.974
0.769*VLCD
V0= 4.231
V0= 3.846 V0= 3.077 V0= 2.692 V0= 2.308 V0= 1.923
0.750*VLCD
V0= 4.125
V0= 3.750 V0= 3.000 V0= 2.625 V0= 2.250 V0= 1.875
0.731*VLCD
V0= 4.024
V0= 3.659 V0= 2.927 V0= 2.561 V0= 2.195 V0= 1.829
0.714*VLCD
V0= 3.929
V0= 3.571 V0= 2.857 V0= 2.500 V0= 2.143 V0= 1.786
0.697*VLCD
V0= 3.837
V0= 3.488 V0= 2.791 V0= 2.442 V0= 2.093 V0= 1.744
0.681*VLCD
V0= 3.750
V0= 3.409 V0= 2.727 V0= 2.386 V0= 2.045 V0= 1.705
0.666*VLCD
V0= 3.667
V0= 3.333 V0= 2.667 V0= 2.333 V0= 2.000 V0= 1.667
0.652*VLCD
V0= 3.587
V0= 3.261 V0= 2.609 V0= 2.283 V0= 1.957 V0= 1.630
0.638*VLCD
V0= 3.511
V0= 3.191 V0= 2.553 V0= 2.234 V0= 1.915 V0= 1.596
0.625*VLCD
V0= 3.438
V0= 3.125 V0= 2.500 V0= 2.188 V0= 1.875 V0= 1.563
0.612*VLCD
V0= 3.367
V0= 3.061 V0= 2.449 V0= 2.143 V0= 1.837 V0= 1.531
0.600*VLCD
V0= 3.300
V0= 3.000 V0= 2.400 V0= 2.100 V0= 1.800 V0= 1.500
0.588*VLCD
V0= 3.235
V0= 2.941 V0= 2.353 V0= 2.059 V0= 1.765 V0= 1.471
0.576*VLCD
V0= 3.173
V0= 2.885 V0= 2.308 V0= 2.019 V0= 1.731 V0= 1.442
0.566*VLCD
V0= 3.113
V0= 2.830 V0= 2.264 V0= 1.981 V0= 1.698 V0= 1.415
0.555*VLCD
V0= 3.056
V0= 2.778 V0= 2.222 V0= 1.944 V0= 1.667 V0= 1.389
0.545*VLCD
V0= 3.000
V0= 2.727 V0= 2.182 V0= 1.909 V0= 1.636 V0= 1.364
0.535*VLCD
V0= 2.946
V0= 2.679 V0= 2.143 V0= 1.875 V0= 1.607 V0= 1.339
0.526*VLCD
V0= 2.895
V0= 2.632 V0= 2.105 V0= 1.842 V0= 1.579 V0= 1.316
0.517*VLCD
V0= 2.845
V0= 2.586 V0= 2.069 V0= 1.810 V0= 1.552 V0= 1.293
0.508*VLCD
V0= 2.797
V0= 2.542 V0= 2.034 V0= 1.780 V0= 1.525 V0= 1.271
0.500*VLCD
V0= 2.750
V0= 2.500 V0= 2.000 V0= 1.750 V0= 1.500 V0= 1.250
0.491*VLCD
V0= 2.705
V0= 2.459 V0= 1.967 V0= 1.721 V0= 1.475 V0= 1.230
Prohibit setting
17/22
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
[V]
● Function description （BU9799KV）
○ Command transfer method
Issue Slave Address (“01111100”) after generate “START condition”.
1byte after Slave Address always becomes command input.
MSB (“command or data judge bit”) of command decide to next data is command or display data.
When set “command or data judge bit”=‘1’, next byte will be command.
When set “command or data judge bit”=‘0’, next byte data is display data.
S Slave address A 1 Command
A 1 Command
A 1 Command
A 0 Command
A Display Data
…
P
Once it becomes display data transfer condition, it cannot input command.
When want to input command again, please generate “START condition” once.
○ Write display and transfer method
This device has Display Data RAM (DDRAM) of 50×4=200bit.
The relationship between data input and display data, DDRAM data and address are as follows;
Slave address
S
Command
01111100
A 0
0000000
A a
b
c
d
e
f
g
h
A i
j
k
l
m
n o
p
A …
P
Display Data
DDRAM address
BIT
00
01
02
03
04
0
a
e
i
m
COM0
1
b
f
j
n
COM1
2
c
g
k
o
COM2
3
d
h
l
p
COM3
SEG0
SEG1
SEG2
SEG3
SEG4
05
SEG5
06
SEG6
07
SEG7
・・・
2Fh
SEG47
Data transfer to DDRAM happens every 4bit data.
So It will be finished to transfer with no need to wait ACK.
○ Reset initialize condition
Initial condition after execute Software Reset is as follows.
・ Display is OFF.
・ DDRAM address is initialized (DDRAM Data is not initialized).
・ Refer to Command Description about initialize value of register.
18/22
30h
SEG48
31h
SEG49
● Cautions in Power ON/OFF (BU9799KV)
○ Power supply sequence
Please keep Power ON/OFF sequence as below waveform.
VLCD
VDD
Fig. BU9799KV-4 Power supply sequence
○ Caution in P.O.R circuit use
This device has “P.O.R” (Power-On Reset) circuit and Software Reset function.
Please keep the following recommended Power-On conditions in order to power up properly.
Please set power up conditions to meet the recommended tR, tF, tOFF, and Vbot spec
below in order to ensure P.O.R operation
* It has to set TEST1=”L” to be valid in POR circuit.
tF
VDD
Recommendation condition of tR, tF, tOFF, Vbot (Ta=25℃)
tR
tOFF
tR
tF
tOFF
Vbot
Less than 5ms
Less than 5ms
More than
Less than 0.3V
20ms
Vbot
Fig. BU9799KV-5 Power ON/OFF waveform
If it is difficult to meet above conditions, execute the following sequence after Power-On.
* It has to keep the following sequence in the case of TEST1=”H”. As POR circuit is
invalid status.
(1)
TEST1 =”H”
VDD
SDA
SCL
STOP condition
Fig. BU9799KV-6
(2)
Stop condition
After send STOP condition, execute Software Reset (ICSET) command.
19/22
● IO Equivalent Circuit
(BU9799KV)
VDD
VSS
VLCD
VSS
SDA
VSS
SCL
VSS
VDD
OSCIO
VSS
VLCD
SEG/COM
VSS
VDD
TEST3
VSS
Fig. BU9799KV-7
I/O equivalent circuit
20/22
● Cautions on use
(1)
Absolute Maximum Ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices,
thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings
is assumed, consideration should be given to take physical safety measures including the use of fuses, etc.
(2)
Operating conditions
These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed
under the conditions of each parameter.
(3)
Reverse connection of power supply connector
The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection,
such as mounting an external diode between the power supply and the IC’s power supply terminal.
(4)
Power supply line
Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, or the digital block power
supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for
the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from
impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner.
Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use
an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of
capacity dropout at a low temperature, thus determining the constant.
(5)
GND voltage
Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure
no terminals are at a potential lower than the GND voltage including an actual electric transient.
(6)
Short circuit between terminals and erroneous mounting
In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore,
if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal,
the ICs can break down.
(7)
Operation in strong electromagnetic field
Be noted that using ICs in the strong electromagnetic field can malfunction them.
(8)
Inspection with set PCB
On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge
from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF
the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount
it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the
transportation and the storage of the set PCB.
(9)
Input terminals
In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can
cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention
not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will
operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power
supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of
electrical characteristics.
(10)
Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal
GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to
a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of
external parts as well.
(11) External capacitor
In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance
due to DC bias and changes in the capacitance due to temperature, etc.
(12) No Connecting input terminals
In terms of extremely high impedance of CMOS gate, to open the input terminals causes unstable state. And unstable state brings the inside
gate voltage of p-channel or n-channel transistor into active. As a result, battery current may increase. And unstable state can also causes
unexpected operation of IC. So unless otherwise specified, input terminals not being used should be connected to the power supply or GND line.
(13) Rush current
When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may flow
instantaneously. Therefore, give special condition to power coupling capacitance, power wiring, width of GND wiring, and routing of connections.
21/22
● Order form name selection
B U
9
7
ROHM form name
9
Part No.
9
K V
E
－
Package type
KV=VQFP
2
Packaging and forming specification
E2 =Reel-shaped emboss taping
VQFP64
<Dimension>
<Packing information>
12.0 ± 0.2
10.0 ± 0.1
33
49
17
64
1.6Max.
1.4 ± 0.05
0.1 ± 0.05
1
1.25
0.5 ± 0.15
1.0 ± 0.2
32
1.25
12.0 ± 0.2
10.0 ± 0.1
48
16
Tape
Embossed carrier tape(with dry pack)
Quantity
1000pcs
Direction
of feed
E2
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
0.145 +0.05
−0.03
+6
4° −4
0.08 S
°
°
0.5 ± 0.1
+
0.2 −0.04
0.05
0.08 M
1Pin
（Unit:mm)
Direction of
Reel
※When you order , please order in times the amount of package quantity.
22/22
Catalog No.08T184A '08.6 ROHM ©
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account
when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples
of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to
use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment
or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear
no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2009 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster @ rohm.co. jp
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TEL : +81-75-311-2121
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Appendix-Rev4.0