HCS74T Data Sheet July 1999 Radiation Hardened Dual-D Flip-Flop with Set and Reset Intersil’s Satellite Applications FlowTM (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of reliability. The Intersil HCS74T is a Radiation Hardened Positive Edge Triggered Flip-Flop with set and reset. The HCS74T utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. Specifications Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. • QML Class T, Per MIL-PRF-38535 • Radiation Performance - Gamma Dose (γ) 1 x 105 RAD(Si) - Latch-Up Free Under Any Conditions, SOS Process - SEP Effective LET No Upsets: >100 MEV-cm2/mg - Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) • 3 Micron Radiation Hardened SOS CMOS • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.5V • Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min • Input Current Levels Ii ≤ 5µA at VOL, VOH Pinouts HCS74T (SBDIP), CDIP2-T14 TOP VIEW Intersil’s Quality Management Plan (QM Plan), listing all Class T screening operations, is also available on our website. www.intersil.com/quality/manuals.asp Ordering Information PART NUMBER HCS74DTR -55 to 125 5962R9578201TXC HCS74KTR -55 to 125 NOTE: Minimum order quantity for -T is 150 units through 1 R1 1 14 VCC D1 2 13 R2N CP1 3 12 D2 S1N 4 11 CP2 Q1 5 10 S2N Q1N 6 9 Q2 GND 7 8 Q2N TEMP. RANGE (oC) 5962R9578201TCC distribution, or 450 units direct. 4615.1 Features Detailed Electrical Specifications for the HCS74T are contained in SMD 5962-95782. A “hot-link” is provided from our website for downloading. www.intersil.com/spacedefense/newsafclasst.asp ORDERING INFORMATION File Number HCS74T (FLATPACK), CDFP3-F14 TOP VIEW R1 1 14 VCC D1 2 13 R2 CP1 3 12 D2 S1 4 11 CP2 Q1 5 10 S2 Q1 6 9 Q2 GND 7 8 Q2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation. HCS74T Functional Diagram S CL 4(10) P N CL D CL P N 2(12) CL CL P N CL CL P N Q CL R 6(8) 1(13) Q 5(9) CP 3(11) CL CL TRUTH TABLE INPUTS OUTPUTS SET RESET CP D Q Q L H X X H L H L X X L H L L X X H† H† H H H H L H H L L H H H X Q0 Q0 L NOTE: L = Logic Level Low, H = Logic Level High, X = Don’t Care = Transition from Low to High Level Q0 = The level of Q before the indicated input conditions were established. † This configuration is non-stable, that is, it will not persist when set and reset inputs return to their inactive (High) level. 2 HCS74T Die Characteristics DIE DIMENSIONS: PASSIVATION: (2261µm x 2235µm x 533µm ±51µm) Type: Silox (SiO2) 89 x 88 x 21mils ±2mil Thickness: 13kÅ ±2.6kÅ METALLIZATION: WORST CASE CURRENT DENSITY: < 2.0e5 A/cm2 Type: Al Si Thickness: 11kÅ ±1kÅ TRANSISTOR COUNT: SUBSTRATE POTENTIAL: 192 Unbiased (Silicon on Sapphire) PROCESS: BACKSIDE FINISH: CMOS SOS Sapphire Metallization Mask Layout HCS74T D1 R1 VCC (2) (1) (14) CP1 (3) (13) R2 NC (12) D2 S1 (4) NC (11) CP2 Q1 (5) (10) S2 Q1 (6) (7) GND (8) Q2 (9) Q2 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com 3