HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS 14A, 360V N-Channel, Logic Level, Voltage Clamping IGBTs September 2001 Features Packages JEDEC TO-220AB • Logic Level Gate Drive EMITTER COLLECTOR GATE • Internal Voltage Clamp • ESD Gate Protection COLLECTOR (FLANGE) o • TJ = 175 C • Ignition Energy Capable JEDEC TO-262AA Description EMITTER COLLECTOR GATE COLLECTOR (FLANGE) A This N-Channel IGBT is a MOS gated, logic level device which is intended to be used as an ignition coil driver in automotive ignition circuits. Unique features include an active voltage clamp between the collector and the gate which provides Self Clamped Inductive Switching (SCIS) capability in ignition circuits. Internal diodes provide ESD protection for the logic level gate. Both a series resistor and a shunt resister are provided in the gate circuit. JEDEC TO-263AB M COLLECTOR (FLANGE) A A PACKAGING AVAILABILITY PART NUMBER PACKAGE GATE BRAND HGTP14N36G3VL TO-220AB 14N36GVL HGT1S14N36G3VL TO-262AA 14N36GVL HGT1S14N36G3VLS TO-263AB 14N36GVL EMITTER Terminal Diagram NOTE: When ordering, use the entire part number. To obtain the TO263AB in tape and reel, drop the S and add the suffix T; i.e., HGT1S14N36G3VLT. N-CHANNEL ENHANCEMENT MODE COLLECTOR The development type number for this device is TA49021. R1 GATE R2 EMITTER Absolute Maximum Ratings TC = +25oC, Unless Otherwise Specified Collector-Emitter Bkdn Voltage at 10mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCER Emitter-Collector Bkdn Voltage at 10mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVECS Collector Current Continuous at VGE = 5V, TC = +25oC. . . . . . . . . . . . . . . . . . . . . . . IC25 at VGE = 5V, TC = +100oC . . . . . . . . . . . . . . . . . . . . . .IC100 Gate-Emitter Voltage (Note) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Inductive Switching Current at L = 2.3mH, TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . ISCIS at L = 2.3mH, TC = + 175oC . . . . . . . . . . . . . . . . . . . . . . ISCIS Collector to Emitter Avalanche Energy at L = 2.3mH, TC = +25oC. . . . . . . . . . . . . . . EAS Power Dissipation Total at TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Power Dissipation Derating TC > +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL Electrostatic Voltage at 100pF, 1500Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESD HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS 390 24 18 14 ±10 17 12 332 100 0.67 -40 to +175 260 6 UNITS V V A A V A A mJ W W/oC o C o C KV NOTE: May be exceeded if IGEM is limited to 10mA. ©2001 Fairchild Semiconductor Corporation HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 Specifications HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Electrical Specifications TC = +25oC, Unless Otherwise Specified LIMITS PARAMETERS Collector-Emitter Breakdown Voltage Gate-Emitter Plateau Voltage Gate Charge SYMBOL BVCER MAX UNITS TC = +175oC 320 355 400 V TC = +25oC 330 360 390 V TC = -40oC 320 350 385 V TC = +25oC - 2.7 - V QG(ON) IC = 7A, VCE = 12V TC = +25oC - 24 - nC IC = 7A RG = 1000Ω TC = +175oC 350 380 410 V IC = 10mA TC = +25oC 24 28 - V VCE = 250V RGE = 1kΩ TC = +25oC - - 25 µA TC = +175oC - - 250 µA TC = +25oC - 1.25 1.45 V TC = +175oC - 1.15 1.6 V TC = +25oC - 1.6 2.2 V TC = +175oC - 1.7 2.9 V TC = +25oC 1.3 1.8 2.2 V Emitter-Collector Breakdown Voltage BVECS ICER VCE(SAT) IC = 7A VGE = 4.5V IC = 14A VGE = 5V Gate-Emitter Threshold Voltage TYP IC = 7A, VCE = 12V BVCE(CL) Collector-Emitter Saturation Voltage IC = 10mA, VGE = 0V RGE = 1kΩ MIN VGEP Collector-Emitter Clamp Breakdown Voltage Collector-Emitter Leakage Current TEST CONDITIONS VGE(TH) IC = 1mA VCE = VGE Gate Series Resistance R1 TC = +25oC - 75 - Ω Gate-Emitter Resistance R2 TC = +25oC 10 20 30 kΩ Gate-Emitter Leakage Current Gate-Emitter Breakdown Voltage Current Turn-Off Time-Inductive Load Inductive Use Test Thermal Resistance ©2001 Fairchild Semiconductor Corporation IGES VGE = ±10V ±330 ±500 ±1000 µA BVGES IGES = ±2mA ±12 ±14 - V - 7 - µs TC = +175oC 12 - - A TC = +25oC 17 - - A - - 1.5 tD(OFF)I + tF(OFF)I ISCIS RθJC IC = 7A, RL = 28Ω RG = 25Ω, L = 550µH, VCL = 300V, VGE = 5V, TC = +175oC L = 2.3mH, VG = 5V, o C/W HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Typical Performance Curves PULSE DURATION = 250µs, DUTY CYCLE <0.5%, VCE = 10V PULSE DURATION = 250µs, DUTY CYCLE <0.5%, TC = +25oC 40 ICE, COLLECTOR-EMITTER CURRENT (A) ICE, COLLECTOR-EMITTER CURRENT (A) 25 20 15 10 +25oC +175oC 5 -40oC 10V 30 4.5V 20 4.0V 3.5V 10 3.0V 2.5V 0 0 1 2 3 4 0 5 2 4 6 8 VCE, COLLECTOR-TO-EMITTER VOLTAGE (V) VGE, GATE-TO-EMITTER VOLTAGE (V) 35 VGE = 5.0V TC = +175oC 30 25 10 FIGURE 2. SATURATION CHARACTERISTICS VGE = 4.5V 20 VGE = 4.0V 15 10 5 ICE , COLLECTOR EMITTER CURRENT (A) FIGURE 1. TRANSFER CHARACTERISTICS ICE , COLLECTOR EMITTER CURRENT (A) 5.0V 35 -40oC VGE = 4.5V 30 +25oC 25 +175oC 20 15 10 5 0 0 4 1 2 3 VCE(SAT) , SATURATION VOLTAGE (V) 0 5 0 1 2 3 4 5 VCE(SAT) , SATURATION VOLTAGE (V) FIGURE 3. COLLECTOR-EMITTER CURRENT AS A FUNCTION OF SATURATION VOLTAGE FIGURE 4. COLLECTOR-EMITTER CURRENT AS A FUNCTION OF SATURATION VOLTAGE 2.25 1.35 VGE = 4.0V 1.25 VGE = 4.5V 1.15 VGE = 5.0V 1.05 -25 +25 +75 +125 TJ , JUNCTION TEMPERATURE (oC) FIGURE 5. SATURATION VOLTAGE AS A FUNCTION OF JUNCTION TEMPERATURE ©2001 Fairchild Semiconductor Corporation ICE = 14A VCE(SAT) , SATURATION VOLTAGE (V) VCE(SAT) , SATURATION VOLTAGE (V) ICE = 7A VGE = 4.0V 2.00 1.75 VGE = 4.5V VGE = 5.0V 1.50 +175 -25 +25 +75 +125 +175 TJ , JUNCTION TEMPERATURE (oC) FIGURE 6. SATURATION VOLTAGE AS A FUNCTION OF JUNCTION TEMPERATURE HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS ICE, COLLECTOR-EMITTER CURRENT (A) 20 VGE = 5V 18 16 14 12 10 8 6 4 2 0 +25 +50 +75 +125 +100 TC, CASE TEMPERATURE (oC) +150 +175 FIGURE 7. COLLECTOR-EMITTER CURRENT AS A FUNCTION OF CASE TEMPERATURE VGE(TH), NORMALIZED THRESHOLD VOLTAGE Typical Performance Curves (Continued) 1.2 ICE = 1ma 1.1 1.0 0.9 0.8 0.7 0.6 +25 +75 +125 TJ , JUNCTION TEMPERATURE (oC) -25 +175 FIGURE 8. NORMALIZED THRESHOLD VOLTAGE AS A FUNCTION OF JUNCTION TEMPERATURE 7.0 VCE = 300V, VGE = 5V VECS = 20V 6.5 t(OFF)I, TURN OFF TIME (µs) LEAKAGE CURRENT (µA) 1E4 1E3 1E2 1E1 VCES = 250V RGE = 25Ω, L = 550µH RL = 37Ω, ICE = 7A 6.0 5.5 5.0 4.5 4.0 1E0 3.5 3.0 1E-1 +20 +60 +100 +140 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. LEAKAGE CURRENT AS A FUNCTION OF JUNCTION TEMPERATURE ©2001 Fairchild Semiconductor Corporation +180 +25 +50 + 75 +100 +125 +150 +175 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. TURN-OFF TIME AS A FUNCTION OF JUNCTION TEMPERATURE HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Typical Performance Curves (Continued) 650 VGE = 5V +25oC VGE = 5V 600 550 20 +175 EAS , ENERGY (mJ) oC 15 +25oC 500 450 400 350 300 10 +175oC 250 200 5 0 2 6 4 8 10 150 2 0 L, INDUCTANCE (mH) FIGURE 11. SELF CLAMPED INDUCTIVE SWITCHING CURRENT AS A FUNCTION OF INDUCTANCE 10 8 FIGURE 12. SELF CLAMPED INDUCTIVE SWITCHING ENERGY AS A FUNCTION OF INDUCTANCE REF IG = 1mA, RL = 1.7Ω, TC = +25oC FREQUENCY = 1MHz 1800 1600 CIES 1400 1200 1000 800 600 400 COES 200 CRES 0 0 5 10 15 20 25 VCE, COLLECTOR-TO-EMITTER VOLTAGE (V) FIGURE 13. CAPACITANCE AS A FUNCTION OF COLLECTOREMITTER VOLTAGE ©2001 Fairchild Semiconductor Corporation VCE, COLLECTOR-EMITTER VOLTAGE (V) 2000 C, CAPACITANCE (pF) 4 6 L , INDUCTANCE (mH) 12 6 10 5 8 4 VCE = 12V 3 6 VCE = 4V 4 2 VCE = 8V 2 1 0 VGE, GATE-EMITTER VOLTAGE (V) IC , INDUCTIVE SWITCHING CURRENT (A) 25 0 0 5 10 15 20 25 30 QG, GATE CHARGE (nC) FIGURE 14. GATE CHARGE WAVEFORMS HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS 355 100 BVCER, COLLECTOR-EMITTER BKDN VOLTAGE (V) ZθJC , NORMALIZED THERMAL RESPONSE Typical Performance Curves (Continued) 0.5 0.2 t1 10-1 0.1 PD 0.05 t2 0.02 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZθJC X RθJC) + TC 0.01 10-2 10-5 350 345 340 25oC 335 175oC 330 SINGLE PULSE 325 10-4 10-3 10-2 10-1 101 100 0 2000 4000 6000 8000 10000 RGE, GATE-TO- EMITTER RESISTANCE (Ω) t1 , RECTANGULAR PULSE DURATION (s) FIGURE 15. NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE FIGURE 16. BREAKDOWN VOLTAGE AS A FUNCTION OF GATE-EMITTER RESISTANCE Test Circuits RL 2.3mH VDD L = 550µH C RGEN = 25Ω RG DUT 5V C 1/RG = 1/RGEN + 1/RGE RGEN = 50Ω G E G DUT + - 10V VCC 300V RGE = 50Ω E FIGURE 17. SELF CLAMPED INDUCTIVE SWITCHING CURRENT TEST CIRCUIT ©2001 Fairchild Semiconductor Corporation FIGURE 18. CLAMPED INDUCTIVE SWITCHING TIME TEST CIRCUIT HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Handling Precautions for IGBT’s Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler’s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBT’s are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBT’s can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as †“ECCOSORBD LD26” or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating -The gate-voltage rating of VGEM may be exceeded if IGEM is limited to 10mA. † Trademark Emerson and Cumming, Inc . INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS: 4,364,073 4,587,713 4,641,162 4,794,432 4,860,080 4,969,027 4,417,385 4,598,461 4,644,637 4,801,986 4,883,767 ©2001 Fairchild Semiconductor Corporation 4,430,792 4,605,948 4,682,195 4,803,533 4,888,627 4,443,931 4,618,872 4,684,413 4,809,045 4,890,143 4,466,176 4,620,211 4,694,313 4,809,047 4,901,127 4,516,143 4,631,564 4,717,679 4,810,665 4,904,609 4,532,534 4,639,754 4,743,952 4,823,176 4,933,740 4,567,641 4,639,762 4,783,690 4,837,606 4,963,951 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS TO-220AB (Alternate Version) 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE A E ØP INCHES A1 Q H1 TERM. 4 D L1 b1 c 1 2 3 e e1 J1 MAX MILLIMETERS MIN MAX NOTES A 0.170 0.180 4.32 4.57 - 0.048 0.052 1.22 1.32 2, 4 b 0.030 0.034 0.77 0.86 2, 4 b1 0.045 0.055 1.15 1.39 2, 4 c 0.018 0.022 0.46 0.55 2, 4 D 0.590 0.610 14.99 15.49 - E 0.395 0.405 10.04 10.28 e1 60o MIN A1 e b L SYMBOL 0.100 TYP 0.200 BSC H1 0.235 0.255 J1 0.095 0.105 L 0.530 0.550 - 2.54 TYP 5 5.08 BSC 5 5.97 6.47 - 2.42 2.66 6 13.47 13.97 - L1 0.110 0.130 2.80 3.30 3 ØP 0.149 0.153 3.79 3.88 - Q 0.105 0.115 2.66 2.92 - NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Dimension (without solder). 3. Solder finish uncontrolled in this area. 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 3 dated 7-97. ©2001 Fairchild Semiconductor Corporation HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS TO-262AA 3 LEAD JEDEC TO-262AA PLASTIC PACKAGE fq E INCHES A 15o A1 H1 TERM. 4 D L1 b1 c o 60 2 3 e e1 ©2001 Fairchild Semiconductor Corporation J1 MAX MILLIMETERS MIN MAX NOTES A 0.170 0.180 4.32 4.57 - 0.048 0.052 1.22 1.32 3, 4 b 0.030 0.034 0.77 0.86 3, 4 b1 0.045 0.055 1.15 1.39 3, 4 c 0.018 0.022 0.46 0.55 3, 4 D 0.405 0.425 10.29 10.79 - E 0.395 0.405 10.04 10.28 e1 L MIN A1 e b 1 SYMBOL 0.100 TYP 0.200 BSC - 2.54 TYP 5 5.08 BSC 5 H1 0.045 0.055 1.15 1.39 - J1 0.095 0.105 L 0.530 0.550 2.42 2.66 6 13.47 13.97 - L1 0.110 0.130 2.80 3.30 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. A of JEDEC TO-262AA outline dated 6-90. 2. Solder finish uncontrolled in this area. 3. Dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder plating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 5 dated 7-97. HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE E A INCHES A1 H1 MIN MAX MIN MAX A 0.170 0.180 4.32 4.57 - A1 0.048 0.052 1.22 1.32 4, 5 TERM. 4 D L2 L1 L 1 3 b e c TERM. 4 0.450 (11.43) L3 0.350 (8.89) b2 0.700 (17.78) 3 0.150 (3.81) 1 b 0.030 0.034 0.77 0.86 4, 5 0.045 0.055 1.15 1.39 4, 5 b2 0.310 - 7.88 - 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 - E 0.395 0.405 10.04 10.28 e1 J1 e1 0.080 TYP (2.03) 0.062 TYP (1.58) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS 1.5mm DIA. HOLE NOTES b1 e b1 MILLIMETERS SYMBOL 0.100 TYP 0.200 BSC - 2.54 TYP 7 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 - J1 0.095 0.105 2.42 2.66 - L 0.175 0.195 4.45 4.95 - L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 - 8.01 - 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 10 dated 5-99. 4.0mm USER DIRECTION OF FEED 2.0mm TO-263AB 1.75mm C L 24mm TAPE AND REEL 24mm 16mm COVER TAPE 40mm MIN. ACCESS HOLE 30.4mm 13mm 330mm 100mm GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. ©2001 Fairchild Semiconductor Corporation 24.4mm HGTP14N36G3VL, HGT1S14N36G3VL, HGT1S14N36G3VLS Rev. A1 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS™ Ensigna™ FACT™ FACT QuietSerie™ FAST® FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER® SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET® VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2001 Fairchild Semiconductor Corporation Rev. H4