OKI ML9203-XX

E2C0041-19-64
Pr
el
ar
This version: ML9203-xx
Jun. 1999
in
y
¡ Semiconductor
ML9203-xx
im
¡ Semiconductor
5 ¥ 7 Dot Character ¥ 16-Digit ¥ 2-Line Display Controller/Driver with Character RAM
GENERAL DESCRIPTION
The ML9203-xx is a 5 ¥ 7 dot matrix type vacuum fluorescent display tube controller driver IC
which displays characters, numerics and symbols of a maximum of 16 digits ¥ 2 lines.
Dot matrix vacuum fluorescent display tube drive signals are generated by serial data sent from
a micro-controller. A display system is easily realized by internal ROM and RAM for character
display.
The ML9203-xx has low power consumption since it is made by CMOS process technology.
-01 is available as a general-purpose code.
Custom codes are provided on customer's request.
FEATURES
• Logic power supply (VDD)
: 3.3 V±10% or 5.0 V±10%
• VFD tube drive power supply (VDISP)
: 20 to 60 V
• VFD driver output current
(VFD driver output can be connected directly to the VFD tube. No pull-down resistor is
required.)
- Segment driver (SEGA1 to A35, SEGB1 to B35)
Only one driver output is high
: –5 mA (VDISP=60V)
All the driver outputs are high
: –350 mA (VDISP=60V)
- Segment driver (ADA, ADB)
: –20 mA (VDISP=60V)
- Grid driver (COM1 to 16)
: –50 mA (VDISP=60V)
• Content of display
SEGA1 to SEGA35 and ADA
- CGROM_A 5¥7 dots
: 240 types (character data)
- CGRAM_A 5¥7 dots
: 16 types (character data)
- ADRAM_A 16 (display digit) ¥ 1 bit (symbol data; can be used for a cursor.)
- DCRAM_A 16 (display digit) ¥ 8 bits (register for character data display)
SEGB1 to SEGB35 and ADB
- CGROM_B 5¥7 dots
: 240 types (character data)
- CGRAM_B 5¥7 dots
: 16 types (character data)
- ADRAM_B 16 (display digit) ¥ 1 bit (symbol data; can be used for a cursor.)
- DCRAM_B 16 (display digit) ¥ 8 bits (register for character data display)
• Display control function
- Display digit
: 1 to 16 digits
- Display duty (brightness adjustment)
: 0 to 1024 stages
- All lights ON/OFF
• 3 interfaces with microcontroller
: DA, CS, CP (4 interfaces when RESET is added)
• Built-in oscillation circuit
Crystal oscillation or ceralock oscillation : 4.0 MHz (Typ)
• Package options:
100-pin plastic QFP (QFP100-P-1420-0.65-BK) (Product name: ML9203-xxGA)
1/30
¡ Semiconductor
ML9203-xx
BLOCK DIAGRAM
VDISP
VDD
D-GND
L-GND
DCRAM_A
16w ¥ 8b
Segment
Driver
CGRAM_A
16w ¥ 35b
RESET
DA
CP
CS
SEGA1
CGROM_A
240w ¥ 35b
ADRAM_B
16w ¥ 1b
8bit
Shift
Register
DCRAM_B
16w ¥ 8b
SEGA35
Segment
Driver
ADA
SEGB1
CGROM_B
240w ¥ 35b
Segment
Driver
CGRAM_B
16w ¥ 35b
Command
Decoder
ADRAM_B
16w ¥ 1b
SEGB35
Segment
Driver
ADB
Control
Circuit
Address
Selector
Write
Address
Counter
Timing
Generator 2
Timing
Generator 1
Read
Address
Counter
Digit
Control
Duty
Control
COM1
Grid
Driver
COM16
OSC0
OSC1
Oscillator
2/30
¡ Semiconductor
ML9203-xx
INPUT AND OUTPUT CONFIGURATION
Schematic Diagram of Logic Portion Input Circuit
VDD
VDD
INPUT
L-GND
L-GND
Schematic Diagram of Driver Output Circuit
VDISP
VDISP
OUTPUT
D-GND
D-GND
3/30
¡ Semiconductor
ML9203-xx
SEGA35
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
SEGA16
SEGA17
SEGA18
SEGA19
SEGA20
SEGA21
SEGA22
SEGA23
SEGA24
SEGA25
SEGA26
SEGA27
SEGA28
SEGA29
SEGA30
SEGA31
SEGA32
SEGA33
SEGA34
PIN CONFIGURATION (TOP VIEW)
SEGA4
SEGA3
SEGA2
SEGA1
SEGB1
SEGB2
SEGB3
SEGB4
SEGB5
SEGB6
SEGB7
SEGB8
SEGB9
SEGB10
SEGB11
SEGB12
SEGB13
SEGB14
SEGB15
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
VDISP
ADA
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
D-GND
VDD
DA
CP
CS
RESET
OSC1
OSC0
L-GND
D-GND
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
ADB
VDISP
SEGB35
SEGA10
SEGA9
SEGA8
SEGA7
SEGA6
SEGA5
80
79
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
SEGA14
SEGA13
SEGA12
SEGA11
SEGB16
SEGB17
SEGB18
SEGB19
SEGB20
SEGB21
SEGB22
SEGB23
SEGB24
SEGB25
SEGB26
SEGB27
SEGB28
SEGB29
SEGB30
SEGB31
SEGB32
SEGB33
SEGB34
SEGA15
100-Pin Plastic QFP
4/30
¡ Semiconductor
ML9203-xx
PIN DESCRIPTION
Pin
Symbol
1 to 15,
81 to 100
SEGA1 to A35
16 to 50
SEGB1 to B35
53 to 60
71 to 78
Type Connects to
Description
O
VFD tube
anode
electrode
VFD tube anode electrode drive output.
Directly connected to fluorescent display tube and a pull-down
resistor is not necessary. IOH>–5 mA
COM1 to 16
O
VFD tube
grid
electrode
VFD tube grid electrode drive output.
Directly connected to fluorescent display tube and a pull-down
resistor is not necessary. IOH>–50 mA
52, 79
ADA, ADB
O
VFD tube
anode
electrode
VFD tube anode electrode drive output.
Directly connected to fluorescent display tube and a pull-down
resistor is not necessary. IOH>–20 mA
69
VDD
62
L-GND
51, 80
VDISP
—
Power
supply
61, 70
D-GND
VDD-L-GND are power supplies for internal logic.
VDISP-D-GND are power supplies for driving fluorescent tubes.
Apply VDISP after VDD is applied.
Use the same power supply for L-GND and D-GND.
68
DA
I
Microcontroller
Serial data input (positive logic).
Input from LSB.
67
CP
I
Microcontroller
Shift clock input.
Serial data is shifted on the rising edge of CP.
66
CS
I
Microcontroller
Chip select input.
Serial data transfer is disabled when CS pin is "H" level.
Microcontroller
or
C, R
Reset input.
"Low" initializes all the functions.
Initial status is as follows.
address "00"H
• Address of each RAM
Content is undefined
• Data of each RAM
16 digits
• Display digit
0/1024
• Brightness adjusment
OFF mode
• All lights ON or OFF
For a circuit when R and C are connected externally,
see Application Circuit.
Crystal or
ceralock
resonator
Pins for oscillation.
Connect crystal and capacitors or ceralock resonator and
capacitors. (Use a built-in feedback resistor.)
Set the target oscillation frequency to 4 MHz.
For an external circuit, see APPLICATION CIRCUIT.
65
RESET
I
63
OSC0
I
64
OSC1
O
5/30
¡ Semiconductor
ML9203-xx
ABSOLUTE MAXIMUM RATINGS
Symbol
Condition
Rating
Unit
Supply Voltage (1)
Parameter
VDD
—
–0.3 to 6.5
V
Supply Voltage (2)
VDISP
—
–0.3 to 70
V
VIN
—
–0.3 to VDD+0.3
V
Input Voltage
Power Dissipation
Storage Temperature
Output Current
PD
Ta≥25°C
764
mW
TSTG
—
–55 to 150
°C
IO1
COM1 to COM16
–60 to 0.0
mA
IO2
ADA, ADB
–30 to 0.0
mA
–10 to 0.0
mA
IO3
SEGA1 to SEGA35,
SEGB1 to SEGB35
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage (1)
Symbol
VDD
Condition
Min.
Typ.
Max.
Unit
When the power supply
voltage is 5V (typ.)
4.5
5.0
5.5
V
When the power supply
voltage is 3.3V (typ.)
3.0
3.3
3.6
V
—
20
—
60
V
Supply Voltage (2)
VDISP
Operating Frequency
fOSC
Oscillation
3.5
4.0
4.5
MHz
Frame Frequency
fFR
DIGIT=1 to 16, oscillation
213
244
275
Hz
Operating Temperature
Top
—
–40
—
85
°C
6/30
¡ Semiconductor
ML9203-xx
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VDD=5.0V±10%, or VDD=3.3V±10%, VDISP=20 to 60V, Ta=–40 to +85°C, unless otherwise specified)
Parameter
High Level Input Voltage
Symbol
VIH
Applied pin
*1
Condition
Min.
Max.
Unit
VDD=5.0V±10%
0.7VDD
—
V
VDD=3.3V±10%
0.8VDD
—
V
VDD=5.0V±10%
—
0.3VDD
V
VDD=3.3V±10%
—
0.2VDD
V
Low Level Input Voltage
VIL
*1
High Level Input Current
IIH
*1
VIH=VDD
–1.0
1.0
µA
Low Level Input Current
IIL
*1
VIL=0.0V
–1.0
1.0
µA
High Level Output
Voltage
Low Level Output
Voltage
VOH1
COM1 to 16
VDISP=60V, IOH1=–50mA
VDISP–1.5
—
V
VOH2
ADA, ADB
VDISP=60V, IOH2=–20mA
VDISP–1.5
—
V
VOH3
SEG1 to 35
VDISP=60V, IOH3=–5mA
VDISP–1.5
—
V
VOL1
*2
—
—
1.0
V
VDD=5.0V±10%, fOSC=4.0MHz
—
6
mA
VDD=3.3V±10%, fOSC=4.0MHz
—
4
mA
fOSC=4.0MHz, All output lights ON
—
1
mA
—
T.B.D
mA
IDD1
Current Consumption
IDD2
IDISP1
IDISP2
VDD
VDISP
no load
All output lights OFF
*1) CS, CP, DA RESET
*2) SEGA1 to A35, SEGB1 to B35, ADA, COM1 to 16
7/30
¡ Semiconductor
ML9203-xx
AC Characteristics
(VDD=5.0V±10%, or VDD=3.3V±10%, VDISP=20 to 60V, Ta=–40 to +85°C, unless otherwise specified)
Parameter
CP Frequency
Symbol
Condition
Min.
Max.
Unit
fC
—
—
1.0
MHz
tCW
—
300
—
ns
DA Setup Time
tDS
—
300
—
ns
DA Hold Time
tDH
—
300
—
ns
CS Setup Time
tCSS
—
300
—
ns
CS Hold Time
tCSH
Oscillating state
8
—
ms
CS Wait Time
tCSW
—
300
—
ns
Data Processing Time
tDOFF
Oscillating state
4
—
ms
RESET Pulse Width
tWRES
When RESET signal is input from
microcontroller etc. externally
300
—
ns
RESET Time
tRSON
—
300
—
ns
DA Wait Time
tRSOFF
—
300
—
ns
tR=20% to 80%
—
2.0
ms
tF=80% to 20%
—
2.0
ms
CP Pulse Width
All Output Slew Rate
tR
tF
Cl=100pF
VDD Rise Time
tPRZ
When mounted in the unit
—
100
ms
VDD Off Time
tPOF
When mounted in the unit, VDD=0.0V
5.0
—
ms
8/30
¡ Semiconductor
ML9203-xx
TIMING DIAGRAM
Symbol
VDD=3.3V±10%
VDD=5.0V±10%
VIH
0.8 VDD
0.7 VDD
VIL
0.2 VDD
0.3 VDD
• Data Timing
tCSS
tCSW
CS
tCSH
1/fC
tDOFF
CP
VIH
VIL
tCW
tDH
tDS
DA
tCW
VIH
VIL
VALID
VALID
VALID
VIH
VIL
VALID
• Reset Timing
VDD
tPRZ
tRSON
When input externally
tWRES
tRSOFF
=
RESET
tPOF
When external
R and C are
connected
tRSOFF
DA
0.8 VDD
0.0 V
VIH
0.5 VDD
VIL
VIH
VIL
• Output Timing
All outputs
tR
tF
0.8 VDISP
0.2 VDISP
9/30
¡ Semiconductor
ML9203-xx
• Digit Output Timing (for 16-digit display, at a duty of 976/1024)
T=16/ fOSC
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
ADA, ADB,
SEGA1 to A35,
SEGB1 to B35
Frame cycle
t1=1024T
Display timing t2=61T
Blank timing t3=3T
(t1=4.096 ms when fosc=4.0 MHz)
(t2=240 ms when fosc=4.0 MHz)
(t3=16 ms when fosc=4.0 MHz)
VDISP
D-GND
VDISP
D-GND
10/30
¡ Semiconductor
ML9203-xx
FUNCTIONAL DESCRIPTION
Commands List
1st byte
LSB
2nd byte
MSB
LSB
B0
B1
B2
B3
B4
B5
B6
B7
B0
B1
B2
B3
B4
B5
B6
B7
1 DCRAM_A data write X0
X1
X2
X3
1
0
0
0
C0
C1
C2
C3
C4
C5
C6
C7
Command
2 CGRAM_A data write X0
3 ADRAM_A data write X0
4
X1
X1
X2
X2
X3
X3
0
1
1
0
0
C0
C5 C10 C15 C20 C25 C30
C1
C6 C11 C16 C21 C26 C31
C2
C7 C12 C17 C22 C27 C32
C3
C8 C13 C18 C23 C28 C33
C4
C9 C14 C19 C24 C29 C34
*
*
*
*
*
1
0
0
C0
*
*
*
*
*
*
*
D2
D3
D4
D5
D6
D7
D8
D9
C0
C1
C2
C3
C4
C5
C6
C7
C0
C5 C10 C15 C20 C25 C30
C1
C6 C11 C16 C21 C26 C31
C2
C7 C12 C17 C22 C27 C32
C3
C8 C13 C18 C23 C28 C33
C4
C9 C14 C19 C24 C29 C34
*
*
*
*
*
C0
*
*
2nd byte
3rd byte
4th byte
5th byte
6th byte
—
5 Display duty set
D0
D1
*
*
1
0
1
0
6 Number of digits set
K0
K1
K2
K3
0
1
1
0
7 All lights ON/OFF
L
H
*
*
1
1
1
0
9 DCRAM_B data write X0
X1
X2
X3
1
0
0
1
8
MSB
—
A CGRAM_B data write X0
B ADRAM_B data write X0
C
—
D
—
E
—
F
—
X1
X1
X2
X2
X3
X3
0
1
1
1
0
0
1
1
0 Test mode
When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously,
addresses are internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data
for the 2nd and later bytes.
*
Xn
Cn
Dn
Kn
H
L
:
:
:
:
:
:
:
*
*
*
*
*
2nd byte
3rd byte
4th byte
5th byte
6th byte
Don't care
Address specification for each RAM
Character code specification for each RAM
Display duty specification
Number of digits specification
All lights ON instruction
All lights OFF instruction
Note: The test mode is used for inspection before shipment.
It is not a user function.
11/30
¡ Semiconductor
ML9203-xx
Positional Relationship Between SEGn and ADn (one digit)
C0
Corresponds to the 2nd byte of the ADRAM_A data write command.
ADA
C0
C1
C2
C3
C4
SEGA1
SEGA2
SEGA3
SEGA4
SEGA5
C5
C6
C7
C8
C9
SEGA6
SEGA7
SEGA8
SEGA9
SEGA10
C10
C11
C12
C13
C14
SEGA11
SEGA12
SEGA13
SEGA14
SEGA15
C15
C16
C17
C18
C19
SEGA16
SEGA17
SEGA18
SEGA19
SEGA20
C20
C21
C22
C23
C24
SEGA21
SEGA22
SEGA23
SEGA24
SEGA25
C25
C26
C27
C28
C29
SEGA26
SEGA27
SEGA28
SEGA29
SEGA30
C30
C31
C32
C33
C34
SEGA31
SEGA32
SEGA33
SEGA34
SEGA35
Corresponds to the 6th byte of the CGRAM_A data write command.
Corresponds to the 5th byte of the CGRAM_A data write command.
Corresponds to the 4th byte of the CGRAM_A data write command.
Corresponds to the 3rd byte of the CGRAM_A data write command.
Corresponds to the 2nd byte of the CGRAM_A data write command.
C0
Corresponds to the 2nd byte of the ADRAM_B data write command.
ADB
C0
C1
C2
C3
C4
SEGB1
SEGB2
SEGB3
SEGB4
SEGB5
C5
C6
C7
C8
C9
SEGB6
SEGB7
SEGB8
SEGB9
SEGB10
C10
C11
C12
C13
C14
SEGB11
SEGB12
SEGB13
SEGB14
SEGB15
C15
C16
C17
C18
C19
SEGB16
SEGB17
SEGB18
SEGB19
SEGB20
C20
C21
C22
C23
C24
SEGB21
SEGB22
SEGB23
SEGB24
SEGB25
C25
C26
C27
C28
C29
SEGB26
SEGB27
SEGB28
SEGB29
SEGB30
C30
C31
C32
C33
C34
SEGB31
SEGB32
SEGB33
SEGB34
SEGB35
Corresponds to the 6th byte of the CGRAM_B data write command.
Corresponds to the 5th byte of the CGRAM_B data write command.
Corresponds to the 4th byte of the CGRAM_B data write command.
Corresponds to the 3rd byte of the CGRAM_B data write command.
Corresponds to the 2nd byte of the CGRAM_B data write command.
COMn
12/30
¡ Semiconductor
ML9203-xx
Data Transfer Method and Command Write Method
Display control command and data are written by an 8-bit serial transfer.
Write timing is shown in the figure below.
Setting the CS pin to "Low" level enables a data transfer.
Data is 8 bits and is sequentially input into the DA pin from LSB (LSB first).
As shown in the figure below, data is read by the shift register at the rising edge of the shift clock,
which is input into the CP pin. If 8-bit data is input, internal load signals are automatically
generated and data is written to each register and RAM.
Therefore it is not necessary to input load signals from the outside.
Setting the CS pin to "High" disables data transfer. Data input from the point when the CS pin
changes from "High" to "Low" is recognized in 8-bit units.
tDOFF
CS
tCSH
CP
DA
B0 B1 B2 B3 B4 B5 B6 B7
LSB
1st byte
MSB
When data is written to DCRAM* Command and address data
*
B0 B1 B2 B3 B4 B5 B6 B7
B0 B1 B2 B3 B4 B5 B6 B7
LSB
LSB
2nd byte
MSB
Character code data
2nd byte
MSB
Character code data of the
next address
When data is written to RAM (DCRAM, ADRAM, CGRAM) continuously, addresses are
internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later
bytes.
Reset Function
Reset is executed when the RESET pin is set to "L", (when turning power on, for example) and
initializes all functions.
Initial status is as follows.
• Address of each RAM .................. address "00"H
• Data of each RAM ........................ All contents are undefined
• Display digit .................................. 16 digits
• Brightness adjustment ................. 0/1024
• All display lights ON or OFF ..... OFF mode
• Segment output ............................ All segment outputs go "Low"
• AD output ..................................... All AD outputs go "Low"
Please set again according to "Setting Flowchart" after reset.
13/30
¡ Semiconductor
ML9203-xx
Description of Commands and Functions
1. DCRAM data write
(Specifies the address of DCRAM and writes the character code of CGROM and CGRAM.)
DCRAM (Data Control RAM) has a 4-bit address to store character code of CGROM and
CGRAM.
The character code specified by DCRAM is converted to a 5¥7 dot matrix character pattern via
CGROM or CGRAM.
(The DCRAM can store 16 characters.)
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
X0 X1 X2 X3
LSB
1
0
0
0/1
MSB
0: Select DCRAM_A
1: Select DCRAM_B
: selects DCRAM data write mode and specifies DCRAM
address
(Ex: Specifies DCRAM address 0H)
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
C0 C1 C2 C3 C4 C5 C6 C7
: specifies character code of CGROM and CGRAM
(written into DCRAM address 0H)
To specify the character code of CGROM and CGRAM continuously to the next address, specify
only character code as follows.
The addresses of DCRAM are automatically incremented. Specification of an address is
unnecessary.
14/30
¡ Semiconductor
ML9203-xx
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(3rd)
C0 C1 C2 C3 C4 C5 C6 C7
LSB
: specifies character code of CGROM and CGRAM
(written into DCRAM address 1H)
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(4th)
: specifies character code of CGROM and CGRAM
(written into DCRAM address 2H)
C0 C1 C2 C3 C4 C5 C6 C7
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(17th)
C0 C1 C2 C3 C4 C5 C6 C7
LSB
: specifies character code of CGROM and CGRAM
(written into DCRAM address FH)
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(18th)
: specifies character code of CGROM and CGRAM
(DCRAM address 0H is rewritten)
C0 C1 C2 C3 C4 C5 C6 C7
X0 (LSB) to X3 (MSB): DCRAM addresses (4 bits: 16 characters)
C0 (LSB) to C7 (MSB): Character code of CGROM and CGRAM (8 bits: 256 characters)
[COM positions and set DCRAM addresses]
HEX X0 X1 X2 X3
COM
position
0
0
0
0
0
COM1
1
1
0
0
0
COM2
2
0
1
0
0
COM3
3
1
1
1
0
COM4
4
0
0
1
0
COM5
5
1
0
1
0
COM6
6
0
1
1
0
COM7
7
1
1
1
0
COM8
8
0
0
0
1
COM9
9
1
0
0
1
COM10
A
0
1
0
1
COM11
B
1
1
0
1
COM12
C
0
0
1
1
COM13
D
1
0
1
1
COM14
E
0
1
1
1
COM15
F
1
1
1
1
COM16
15/30
¡ Semiconductor
ML9203-xx
2. CGRAM data write
(Specifies the addresses of CGRAM and writes character pattern data.)
CGRAM (Character Generator RAM) has a 4-bit address to store 5¥7 dot matrix character
patterns.
A character pattern stored in CGRAM can be displayed by specifying the character code
(address) by DCROM.
The address of CGRAM is assigned to 00H to 0FH. (All the other addresses are the CGROM
addresses.)
(The CGRAM can store 16 types of character patterns.)
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
X0 X1 X2 X3
0
1
0
LSB
0/1
MSB
0: Select CGRAM_A
1: Select CGRAM_B
: selects CGRAM data write mode and specifies
CGRAM address.
(Ex: specifies CGRAM address 00H)
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
C0 C5 C10 C15 C20 C25 C30
LSB
*
: specifies 1st column data
(rewritten into CGRAM address 00H)
MSB
B0 B1 B2 B3 B4 B5 B6 B7
3rd byte
(3rd)
C1 C6 C11 C16 C21 C26 C31
LSB
*
: specifies 2nd column data
(rewritten into CGRAM address 00H)
MSB
B0 B1 B2 B3 B4 B5 B6 B7
4th byte
(4th)
C2 C7 C12 C17 C22 C27 C32
LSB
*
: specifies 3rd column data
(rewritten into CGRAM address 00H)
MSB
B0 B1 B2 B3 B4 B5 B6 B7
5th byte
(5th)
C3 C8 C13 C18 C23 C28 C33
LSB
*
: specifies 4th column data
(rewritten into CGRAM address 00H)
MSB
B0 B1 B2 B3 B4 B5 B6 B7
6th byte
(6th)
C4 C9 C14 C19 C24 C29 C34
*
: specifies 5th column data
(rewritten into CGRAM address 00H)
To specify character pattern data continuously to the next address, specify only character pattern
data as follows.
The addresses of CGRAM are automatically incremented. Specification of an address is
unnecessary.
The 2nd to 6th byte (character pattern data) are regarded as one data item, so 300 ns is sufficient
for tDOFF time between bytes.
16/30
¡ Semiconductor
ML9203-xx
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(7th)
C0 C5 C10 C15 C20 C25 C30
LSB
: specifies 1st column data
(rewritten into CGRAM address 01H)
*
MSB
B0 B1 B2 B3 B4 B5 B6 B7
6th byte
(11th)
C4 C9 C14 C19 C24 C29 C34
: specifies 5th column data
(rewritten into CGRAM address 01H)
*
X0 (LSB) to X3 (MSB): CGRAM addresses (3 bits: 8 characters)
C0 (LSB) to C34 (MSB) : Character pattern data (35 bits: 35 outputs per digit)
* : Don't care
[CGROM addresses and set CGRAM addresses]
Refer to ROM code tables.
HEX X0 X1 X2 X3
0
0
0
0
0
CGROM address
RAM00(00000000B)
HEX X0 X1 X2 X3
8
0
0
0
1
CGROM address
RAM08(00001000B)
1
1
0
0
0
RAM01(00000001B)
9
1
0
0
1
RAM09(00001001B)
2
0
1
0
0
RAM02(00000010B)
A
0
1
0
1
RAM0A(00001010B)
3
1
1
0
0
RAM30(00000011B)
B
1
1
0
1
RAM0B(00001011B)
4
0
0
1
0
RAM04(00000100B)
C
0
0
1
1
RAM0C(00001100B)
5
1
0
1
0
RAM05(00000101B)
D
1
0
1
1
RAM0D(00001101B)
6
0
1
1
0
RAM06(00000110B)
E
0
1
1
1
RAM0E(00001110B)
7
1
1
1
0
RAM70(00000111B)
F
1
1
1
1
RAM0F(00001111B)
17/30
¡ Semiconductor
ML9203-xx
Positional relationship between the output area of CGRAM
C0
C1
C2
C3
C4
SEGn1
SEGn2
SEGn3
SEGn4
SEGn5
C5
C6
C7
C8
C9
C5
C7
C8
SEGn6
SEGn7
SEGn8
SEGn9
SEGn10
SEGn6
SEGn8
SEGn9
C10
C11
C12
C13
C14
C10
C11
C13
C14
SEGn11
SEGn12
SEGn13
SEGn14
SEGn15
SEGn11
SEGn12
SEGn14
SEGn15
C15
C16
C17
C18
C19
C15
C16
C17
C19
SEGn16
SEGn17
SEGn18
SEGn19
SEGn20
SEGn16
SEGn17
SEGn18
SEGn20
C20
C21
C22
C23
C24
C20
C21
C23
C24
SEGn21
SEGn22
SEGn23
SEGn24
SEGn25
SEGn21
SEGn22
SEGn24
SEGn25
C25
C26
C27
C28
C29
C25
C27
C28
SEGn26
SEGn27
SEGn28
SEGn29
SEGn30
SEGn26
SEGn28
SEGn29
C30
C31
C32
C33
C34
SEGn31
SEGn32
SEGn33
SEGn34
SEGn35
area that corresponds to 2nd byte (1st column)
(Input 1000001*B)
area that corresponds to 3rd byte (2nd column)
(Input 1100011*B)
area that corresponds to 4th byte (3rd column)
(Input 1010101*B)
area that corresponds to 5th byte (4th column)
(Input 1001001*B)
area that corresponds to 6th byte (5th column)
(Input 1100011*B)
Note: CGROM_A and CGROM_B (Character Generator ROM A, B) have an 8-bit address to
generate 5¥7 dot matrix character patterns.
Each of CGROM_A and CGROM_B can store 240 types of character patterns.
The contents of CGROM_A and CGROM_B can be set separately.
General-purpose code -01 is available (see ROM code tables) and custom codes are
provided on customer's request.
18/30
¡ Semiconductor
ML9203-xx
3. ADRAM data write
(specifies address of ADRAM and writes symbol data)
ADRAM (Additional Data RAM) has a 1-bit address to store symbol data.
Symbol data specified by ADRAM is directly output without CGROM and CGRAM.
(The ADRAM can store 1 type of symbol patterns for each digit.)
The terminal to which the contents of ADRAM are output can be used as a cursor.
[Command format]
LSB
0: Select ADRAM_A
1: Select ADRAM_B
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
X0 X1 X2 X3
1
1
0
LSB
0/1
MSB
: selects ADRAM data write mode and specifies ADRAM
address
(Ex: specifies ADRAM address 0H)
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
C0
*
*
*
*
*
*
*
: sets symbol data
(written into ADRAM address 0H)
To specify symbol data continuously to the next address, specify only character data as follows.
The address of ADRAM is automatically incremented. Specification of addresses is unnecessary.
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(3rd)
C0
*
*
*
*
*
*
LSB
*
MSB
: sets symbol data
(written into ADRAM address 1H)
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(4th)
C0
*
*
*
*
*
*
LSB
*
: sets symbol data
(written into ADRAM address 2H)
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(17th)
C0
*
*
*
*
*
*
LSB
*
MSB
: sets symbol data
(written into ADRAM address FH)
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(18th)
C0
*
*
*
*
*
*
*
: sets symbol data
(ADRAM address 0H is rewritten.)
X0 (LSB) to X3 (MSB) : ADRAM addresses (4 bits: 16 characters)
C0 : Symbol data (1 bit: 1-symbol data per digit)
* : Don't care
19/30
¡ Semiconductor
ML9203-xx
[COM positions and ADRAM addresses]
HEX X0 X1 X2 X3
COM
position
0
0
0
0
0
COM1
1
1
0
0
0
COM2
2
0
1
0
0
COM3
3
1
1
0
0
COM4
4
0
0
1
0
COM5
5
1
0
1
0
COM6
6
0
1
1
0
COM7
7
1
1
1
0
COM8
8
0
0
0
1
COM9
9
1
0
0
1
COM10
A
0
1
0
1
COM11
B
1
1
0
1
COM12
C
0
0
1
1
COM13
D
1
0
1
1
COM14
E
0
1
1
1
COM15
F
1
1
1
1
COM16
20/30
¡ Semiconductor
ML9203-xx
5. Display duty set
(writes display duty value to duty cycle register)
Display duty adjusts brightness in 1024 stages using 10-bit data.
When power is turned on or when the RESET signal is input, the duty cycle register value is
"0". Always execute this instruction before turning the display on, then set a desired duty
value.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
D0 D1
*
*
1
0
1
: selects display duty set mode and sets duty value (lower 2 bits)
0
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
: sets duty value (upper 8 bits)
D2 D3 D4 D5 D6 D7 D8 D9
D0 (LSB) to D9 (MSB) : Display duty data (10 bits: 1024 stages)
* : Don't care
[Relation between setup data and controlled COM duty]
HEX
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
COM duty
000
0
0
0
0
0
0
0
0
0
0
0/1024
001
1
0
0
0
0
0
0
0
0
0
1/1024
002
0
1
0
0
0
0
0
0
0
0
2/1024
3CE
0
1
1
1
0
0
1
1
1
1
974/1024
3CF
1
1
1
1
0
0
1
1
1
1
975/1024
3D0
0
0
0
0
1
0
1
1
1
1
976/1024
3D1
1
0
0
0
1
0
1
1
1
1
976/1024
3FF
1
1
1
1
1
1
1
1
1
1
976/1024
The state when power is turned on or when RESET signal is input.
21/30
¡ Semiconductor
ML9203-xx
6. Number of digits set
(writes the number of display digits to the display digit register)
The number of digits set can display 1 to 16 digits using 4-bit data.
When power is turned on or when a RESET signal is input, the number of digit register value
is "0". Always execute this instruction to change the number of digits before turning the
dispaly on.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
K0 K1 K2 K3
0
1
1
0
: selects the number of digit set mode and specifies
the number of digit value
K0 (LSB) to K3 (MSB) : Number of digit data (4 bits: 16 digits)
* : Don't care
[Relation between setup data and controlled COM]
HEX
K0
K1
K2
K3
0
0
0
0
0
1
1
0
0
2
0
1
0
3
1
1
4
0
0
5
1
6
7
Number of
Number of
HEX
K0
K1
K2
K3
COM1 to 16
0
0
0
0
1
COM1 to 8
0
COM1
1
1
0
0
1
COM1 to 9
0
COM1 to 2
2
0
1
0
1
COM1 to 10
0
0
COM1 to 3
3
1
1
0
1
COM1 to 11
1
0
COM1 to 4
4
0
0
1
1
COM1 to 12
0
1
0
COM1 to 5
5
1
0
1
1
COM1 to 13
0
1
1
0
COM1 to 6
6
0
1
1
1
COM1 to 14
1
1
1
0
COM1 to 7
7
1
1
1
1
COM1 to 15
digits of COM
digits of COM
The state when power is turned on or when RESET signal is input.
22/30
¡ Semiconductor
ML9203-xx
7. All display lights ON/OFF set
(turns all dispaly lights ON or OFF)
All display lights ON is used primarily for display testing.
All display lights OFF is primarily used for display blink and to prevent malfunction when
power is turned on.
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
L
H
*
*
1
1
1
0
: selects all display lights ON or OFF mode
L, H: display operation data
*: Don't care
[Set data and display state of SEG and AD]
L
H
0
0
Normal display
Display state of SEG and AD
1
0
Sets all outputs to Low
0
1
Sets all outputs to High
1
1
Sets all outputs to High
(The state when power is applied or when RESET is input.)
23/30
¡ Semiconductor
ML9203-xx
Setting Flowchart
(Power applying included)
Apply VDD
Apply VDISP
All display lights OFF
Status of all outputs by RESET
signal input
Number of digits setting
Display duty setting
Select a RAM to be used
DCRAM_A or B
CGRAM_A or B
ADRAM_A or B
Data write mode
Data write mode
Data write mode
(with address setting)
(with address setting)
(with address setting)
Address is automatically
incremented
Address is automatically
incremented
CGRAM_A or B
Character code
DCRAM_A or B
Character code
NO
DCRAM
Is character code
write ended?
Address is automatically
incremented
NO
YES
CGRAM
Is character code
write ended?
YES
YES
ADRAM_A or B
Character code
NO
ADRAM
Is character code
write ended?
YES
Another RAM to
be set?
NO
Releases all display lights
OFF mode
End of setting
Display operation mode
24/30
¡ Semiconductor
ML9203-xx
Power-off Flowchart
Display operation mode
Turn off VDISP
Turn off VDD
25/30
¡ Semiconductor
ML9203-xx
APPLICATION CIRCUIT
5¥7-dot matrix fluorescent display tube
ANODE
ANODE
ANODE
GRID
(SEGMENT) (SEGMENT) (SEGMENT) (DIGIT)
2
VDD
VDD
Output Ports
CS
CP
DA
VDD
MCU
35
35
16
ADA,ADB SEGB1-B35 SEGA1-A35 COM1-16 VDISP
R2
VDISP
MSM9203-xx
R
ZD
RESET
GND
C
OSC0 OSC1
L-GND
D-GND
Crystal oscillator or ceraloc oscillator
Notes: 1. The VDD value depends on the power supply voltage of the microcontroller used.
Adjust the values of the constants and C input to RESET to the power supply voltage
used.
2. The VDISP value depends on the fluorescent display tube used. Adjust the values of
the constants R2 and ZD to the power supply voltage used.
26/30
¡ Semiconductor
ML9203-xx
Reference data
The figure below shows the relationship between the VDISP voltage and the output current of
each driver.
Take care that the total power consumption to be used does not exceed the power dissipation.
(mA)
–60
[VDISP Voltage-Output Current of Each Driver]
[Output Current]
–50
–40
T.B.D
–30
–20
–10
0
0
10
20
30
40
[VDISP Voltage]
50
60
70 (V)
27/30
¡ Semiconductor
ML9203-xx
ML9203-01 CGROM_A Code
00000000B (00H) to 00000111B (0FH) are the CGRAM_A addresses.
MSB
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
LSB
0000 RAM00
0001 RAM01
0010 RAM02
0011 RAM03
0100 RAM04
0101 RAM05
0110 RAM06
0111 RAM07
1000 RAM08
1001 RAM09
1010 RAM0A
1011 RAM0B
1100 RAM0C
1101 RAM0D
1110 RAM0E
1111 RAM0F
28/30
¡ Semiconductor
ML9203-xx
ML9203-01 CGROM_B Code
00000000B (00H) to 00000111B (0FH) are the CGRAM_B addresses.
MSB
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
LSB
0000 RAM00
0001 RAM01
0010 RAM02
0011 RAM03
0100 RAM04
0101 RAM05
0110 RAM06
0111 RAM07
1000 RAM08
1001 RAM09
1010 RAM0A
1011 RAM0B
1100 RAM0C
1101 RAM0D
1110 RAM0E
1111 RAM0F
29/30
¡ Semiconductor
ML9203-xx
PACKAGE DIMENSIONS
(Unit : mm)
QFP100-P-1420-0.65-BK
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
1.29 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type
packages, which are very susceptible to heat in reflow mounting and humidity absorbed in
storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person
on the product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
30/30
E2Y0002-29-11
NOTICE
1.
The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.
2.
The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.
3.
When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.
4.
Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.
5.
Neither indemnity against nor license of a third party’s industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party’s right which may result from the use thereof.
6.
The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.
7.
Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
the legality of export of these products and will take appropriate and necessary steps at their
own expense for these.
8.
No part of the contents cotained herein may be reprinted or reproduced without our prior
permission.
9.
MS-DOS is a registered trademark of Microsoft Corporation.
Copyright 1999 Oki Electric Industry Co., Ltd.
Printed in Japan