[ /Title
(RFD16
N06,
RFD16
N06SM)
/Subject
(16A,
60V,
0.047
Ohm,
N-Channel
Power
MOSFET)
/Author
()
/Keywords
(Harris
Semiconductor, NChannel
Power
MOSFET,
TO251AA,
TO252AA)
/Cre-
RFD16N06,
RFD16N06SM
Semiconductor
16A, 60V, 0.047 Ohm,
N-Channel Power MOSFET
September 1998
Features
Description
• 16A, 60V
These N-Channel power MOSFETs are manufactured using
the MegaFET process. This process which uses feature
sizes approaching those of LSI integrated circuits, gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as
switching regulators, switching converters, motor drivers,
and relay drivers. These transistors can be operated directly
from integrated circuits.
• rDS(ON) = 0.047Ω
• Temperature Compensating PSPICE Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
Formerly developmental type TA09771.
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Ordering Information
PART NUMBER
PACKAGE
DRAIN
BRAND
RFD16N06
TO-251AA
F16N06
RFD16N06SM
TO-252AA
F16N06
GATE
NOTE: When ordering, use the entire part number. Add suffix 9A to obtain the TO-252AA variant in tape and reel, i.e., RFD16N06SM9A.
SOURCE
Packaging
JEDEC TO-251AA
DRAIN
(FLANGE)
JEDEC TO-252AA
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
GATE
SOURCE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
© Harris Corporation 1998
5-1
File Number
4087.1
RFD16N06, RFD16N06SM
Absolute Maximum Ratings
TC = 25oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
RFD16N06, RFD16N06SM
60
60
16
Refer to Peak Current Curve
±20
Refer to UIS Curve
72
0.48
-55 to 175
UNITS
V
V
A
300
260
oC
oC
V
W
W/oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
BVDSS
ID = 250µA, VGS = 0V
60
-
-
V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250µA
2
-
4
V
VDS = Rated BVDSS, VGS = 0V
-
-
1
µA
VDS = 0.8 x Rated BVDSS,
TC = 150oC
-
-
25
µA
VGS = ±20V
-
-
±100
nA
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Turn-On Time
Turn-On Delay Time
SYMBOL
IDSS
IGSS
rDS(ON)
tON
td(ON)
Rise Time
Turn-Off Delay Time
Total Gate Charge
ID = 16A, VGS = 10V (Figure 9)
-
-
0.047
Ω
VDD = 30V, ID ≈ 8A, RL = 3.75Ω,
VGS = 10V, RG = 25Ω
(Figures 13, 16, 17)
-
-
65
ns
-
14
-
ns
tr
-
30
-
ns
td(OFF)
-
55
-
ns
tf
-
30
-
ns
Fall Time
Turn-Off Time
TEST CONDITIONS
tOFF
Qg(TOT)
VGS = 0V to 20V
VDD = 48V, ID = 16A,
RL = 3Ω, IG(REF) = 0.8mA
(Figures 18, 19)
Gate Charge at 10V
Qg(10)
VGS = 0V to 10V
Threshold Gate Charge
Qg(TH)
VGS = 0V to 2V
VDS = 25V, VGS = 0V, f = 1MHz
-
-
125
ns
-
-
80
nC
-
-
45
nC
-
-
2.2
nC
-
900
-
pF
pF
Input Capacitance
CISS
Output Capacitance
COSS
-
325
-
Reverse Transfer Capacitance
CRSS
-
100
-
pF
Thermal Resistance Junction to Case
RθJC
Thermal Resistance Junction to Ambient
RθJA
-
-
2.083
oC/W
-
-
100
oC/W
MIN
TYP
MAX
UNITS
ISD = 16A
-
-
1.5
V
ISD = 16A, dISD/dt = 100A/µs
-
-
125
ns
TO-251 and TO-252
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Source to Drain Diode Voltage
VSD
Diode Reverse Recovery Time
trr
TEST CONDITIONS
NOTES:
2. Pulse test: pulse width ≤ 300ms, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
5-2
RFD16N06, RFD16N06SM
Typical Performance Curves
20
POWER DISSIPATION MULTIPLIER
1.2
ID, DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
16
12
8
4
0.2
0
0
0
25
50
75
100
125
TC , CASE TEMPERATURE (oC)
150
175
25
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
50
75
100
125
TC, CASE TEMPERATURE (oC)
175
150
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
ZθJC, NORMALIZED
THERMAL IMPEDANCE
1
0.5
0.2
PDM
0.1
0.1
0.05
t1
t2
0.02
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (s)
100
101
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
200
IDM, PEAK CURRENT (A)
100
ID, DRAIN CURRENT (A)
300
TC = 25oC
TJ = MAX RATED
100µs
10
1ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
1
1
10ms
100ms
DC
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 20V
VGS = 10V
100
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
I = I25
175 - TC
150
TC = 25oC
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
10-5
100
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
10-4
10-3
10-2
10-1
t, PULSE WIDTH (s)
100
FIGURE 5. PEAK CURRENT CAPABILITY
5-3
101
RFD16N06, RFD16N06SM
Typical Performance Curves
(Continued)
50
VGS = 20V
STARTING TJ = 25oC
Idm
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
100
10
STARTING TJ = 150oC
If R = 0
tAV = (L)(IAS)/(1.3 RATED BVDSS - VDD)
NOTE:
VGS = 7V
30
VGS = 6V
20
PULSE DURATION = 250µs, TC = 25oC
10
VGS = 5V
VGS = 4.5V
0
0.1
1
tAV, TIME IN AVALANCHE (ms)
10
4
Refer to Harris Application Notes AN9321 and AN9322.
50
VDD = 15V
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
40
FIGURE 7. SATURATION CHARACTERISTICS
2.5
175oC
-55oC
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
IDS(ON), DRAIN TO SOURCE CURRENT (A)
1
2
3
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
25oC
30
20
10
2
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 250µs, VGS = 10V, ID = 16A
2.0
1.5
1.0
0.5
0
-80
0
0
10
-40
0
40
80
120
160
200
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
2.0
2.0
VGS = VDS, ID = 250µA
ID = 250µA
NORMALIZED GATE
THRESHOLD VOLTAGE
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
VGS = 8V
40
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3 RATED BVDSS - VDD) +1]
1
0.01
VGS = 10V
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
1.5
1.0
0.5
0
-80
200
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
5-4
RFD16N06, RFD16N06SM
Typical Performance Curves
(Continued)
60
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
1200
CISS
800
COSS
400
CRSS
10
VDD = BVDSS
7.5
45
5.0
30
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
15
5
10
15
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
2.5
RL = 3.75Ω
IG(REF) = 0.8mA
VGS = 10V
0
0
I G ( REF )
20 ---------------------I G ( AC T )
0
0
VDD = BVDSS
25
t, TIME (µs)
VGS , GATE TO SOURCE VOLTAGE (V)
VDS , DRAIN TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
1600
I G ( REF )
80 ---------------------I G ( AC T )
NOTE: Refer to Harris Application Notes AN7254 and AN7260.
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
BVDSS
L
tP
VARY tP TO OBTAIN
REQUIRED PEAK IAS
+
RG
VDS
IAS
VDD
VDD
-
VGS
DUT
tP
0V
IAS
0
0.01Ω
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
tON
VDS
tOFF
td(ON)
td(OFF)
VDS
+
DUT
tf
tr
RL
VGS
-
90%
90%
VDD
10%
10%
0
RGS
90%
VGS
VGS
0
FIGURE 16. SWITCHING TIME TEST CIRCUIT
10%
50%
50%
PULSE WIDTH
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
5-5
RFD16N06, RFD16N06SM
Test Circuits and Waveforms
(Continued)
VDS
VDD
RL
Qg(TOT)
VDS
VGS = 20V
VGS
Qg(10)
+
VDD
VGS = 10V
VGS
-
VGS = 2V
DUT
0
Ig(REF)
Qg(TH)
Ig(REF)
0
FIGURE 18. GATE CHARGE TEST CIRCUIT
FIGURE 19. GATE CHARGE WAVEFORM
5-6
RFD16N06, RFD16N06SM
PSPICE Electrical Model
.SUBCKT RFD16N06 2 1 3 ;
CA 12 8 1.788e-10
CB 15 14 1.875e-10
CIN 6 8 8.33e-10
rev 10/31/94
DPLCAP
LDRAIN
RSCL2
ESG
+
GATE
1
+ 51
5
ESCL
51
50
6
8
RDRAIN
16
VTO
IT 8 17 1
EVTO
9
20 +
18
8
LGATE RGATE
+
21
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 0.4e-3
RGATE 9 20 3.0
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 21.5e-3
RVTO 18 19 RVTOMOD 1
11
+
DBODY
EBREAK 17
18
MOS2
MOS1
RIN
CIN
8
RSOURCE
7
LSOURCE
3
SOURCE
S2A
S1A
12
DBREAK
6
MOS1 16 6 8 8 MOSMOD M = 0.99
MOS2 16 21 8 8 MOSMOD M = 0.01
S1A
S1B
S2A
S2B
DRAIN
2
RSCL1
EBREAK 11 7 17 18 64.89
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
LDRAIN 2 5 1e-9
LGATE 1 9 4.56e-9
LSOURCE 3 7 4.13e-9
5
10
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
13
8
S1B
RBREAK
15
14
13
17
18
S2B
RVTO
13
CA
CB
+
EGS
6
8
EDS
+ 14
5
8
IT
19
VBAT
+
6 12 13 8 S1AMOD
13 12 13 8 S1BMOD
6 15 14 13 S2AMOD
13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.82
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/94,7))}
.MODEL DBDMOD D (IS = 2.5e-13 RS = 7.1e-3 TRS1 = 3.04e-3 TRS2 = -10e-6 CJO = 1.12e-9 TT = 5.6e-8)
.MODEL DBKMOD D (RS = 2.51e-1 TRS1 = -6.57e-4 TRS2 = 1.66e-6)
.MODEL DPLCAPMOD D (CJO = 6.1e-10 IS = 1e-30 N = 10)
.MODEL MOSMOD NMOS (VTO = 3.96 KP = 16.68 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 1.07e-3 TC2 = -7.19e-7)
.MODEL RDSMOD RES (TC1 = 5.45e-3 TC2 = 1.66e-5)
.MODEL RSCLMOD RES (TC1 = 1.25e-3 TC2 = 17e-6)
.MODEL RVTOMOD RES (TC1 = -5.15e-3 TC2 = -4.83e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -5.25 VOFF= -3.25)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.25 VOFF= -5.25)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.56 VOFF= 5.56)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 5.56 VOFF= 0.56)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; authored by William J. Hepp and C. Frank Wheatley.
5-7