STP180NS04ZC N-channel clamped 3.5 mΩ - 120 A TO-220 fully protected SAFeFET™ Power MOSFET Features Type VDSS RDS(on) max ID STP180NS04ZC Clamped < 4.2 mΩ 120 A ■ Low capacitance and gate charge ■ 100% avalanche tested ■ 3 1 175°C maximum junction temperature 2 TO-220 Applications ■ Switching application Description This fully clamped Power MOSFET is produced by using the latest advanced company’s mesh OVERLAY process which is based on a novel strip layout. The inherent benefits of the new technology coupled with the extra clamping capabilities make this product particularly suitable for the harshest operation conditions such as those encountered in the automotive environment. Any other application requiring extra ruggedness is also recommended. Table 1. Figure 1. Internal schematic diagram Device summary Order code Marking Package Packaging STP180NS04ZC P180NS04ZC TO-220 Tube April 2008 Rev 1 1/12 www.st.com 12 Contents STP180NS04ZC Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ........................... 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 ................................................ 9 STP180NS04ZC 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol VDS VDG Parameter Drain-source voltage (VGS = 0) Drain-gate voltage Value Unit 33 (1) V (1) V 33 VGS Gate-source voltage ID (2) Drain current (continuous) at TC = 25 °C 120 A (2) Drain current (continuous) at TC=100 °C 120 A IDG Drain gate current (continuous) ±50 mA IGS Gate-source current (continuous) ±50 mA IDM (3) Drain current (pulsed) 480 A PTOT Total dissipation at TC = 25 °C 300 W 2 W/°C ID Derating factor ± 20 (1) V VESD(G-S) Gate-source ESD (HBM-C=100 pF, R=1.5 kΩ) ±8 kV VESD(G-D) Gate-drain ESD (HBM-C=100 pF, R=1.5 kΩ) ±8 kV VESD(D-S) Drain-source ESD (HBM-C=100 pF, R=1.5 kΩ) ±8 kV -55 to 175 °C Value Unit TJ Tstg Operating junction temperature Storage temperature 1. Voltage is limited by zener diodes 2. Current limited by wire bonding 3. Pulse width limited by safe operating area Table 3. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case max 0.50 °C/W Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W Tl Maximum lead temperature for soldering purpose 300 °C Table 4. Avalanche data Symbol Parameter Value Unit IAS Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax δ < 1%) 80 A EAS Single pulse avalanche energy (starting Tj=25 °C, ID=IAS, VDD=21 V) (see Figure 17, Figure 14.) 1000 mJ 3/12 Electrical characteristics 2 STP180NS04ZC Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. Symbol On/off states Parameter Test conditions Min. Typ. Max. Unit 41 V V(BR)DG Clamped voltage ID = 1 mA, VGS = 0 -40 < Tj < 175 °C VDSR(CL) Drain-source clamping voltage (DC) IGS(CL) = -2 mA, ID = 1 A IDSS Zero gate voltage drain current (VGS = 0) VDS = 16 V VDS = 16 V, Tj = 150 °C VDS = 16 V, Tj = 175 °C 1 50 100 µA µA µA IGSS (1) Gate-body leakage current (VDS = 0) VGS = ±10 V VGS = ±10 V,Tj = 175 °C VGS = ±16 V,Tj = 175 °C 2 50 150 µA µA µA VGSS Gate-source breakdown voltage IGS = ±100 µA 18 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 1 mA 2 3 4 V RDS(on) Static drain-source on resistance VGS = 10 V, ID = 40 A 3.5 4.2 mΩ RG Internal gate resistor 33 41 V Ω 14 1. Gate Oxide, without zener diodes, tested at wafer sorting (IGSS < ± 100 nA @ ± 20 V Tj=25°). Figure 17.: Unclamped Inductive load test circuit for electrical schematics Table 6. Symbol gfs (1) Ciss Coss Crss tr(Voff) tf tc Qg Qgs Qgd Dynamic Parameter Test conditions Forward transconductance VDS =15 V, ID = 40 A Input capacitance Output capacitance Reverse transfer capacitance VDS =25 V, f=1 MHz, VGS=0 Off voltage rise time Fall time Cross-over time VCLAMP=30 V, ID=80 A, VGS=10 V, RG=4.7 Ω Total gate charge Gate-source charge Gate-drain charge VDD=20 V, ID = 120 A (see Figure 16) VGS =10 V (see Figure 15) 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 4/12 Min. Typ. Max. Unit 95 S 4560 1700 550 pF pF pF 250 115 290 ns ns ns 110 29 40 nC nC nC STP180NS04ZC Electrical characteristics Table 7. Symbol ISD ISDM (1) VSD(2) trr Qrr IRRM Source drain diode Parameter Test conditions Min. Typ. Source-drain current Source-drain current (pulsed) Forward on voltage ISD=120 A, VGS=0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD=120 A, di/dt = 100 A/µs, VDD= 32 V, Tj=150 °C (see Figure 16) 56 70 12 Max. Unit 120 480 A A 1.5 V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300 µs, duty cycle 1.5% 5/12 Electrical characteristics STP180NS04ZC 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Transconductance Figure 7. Static drain-source on resistance 6/12 STP180NS04ZC Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. Capacitance variations Figure 10. Normalized gate threshold voltage vs temperature Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristics Figure 13. Normalized BVDSS vs temperature 7/12 Test circuit 3 STP180NS04ZC Test circuit Figure 14. Unclamped inductive waveform Figure 15. Gate charge test circuit Figure 16. Test circuit for inductive load Figure 17. Unclamped Inductive load test switching and diode recovery times circuit 8/12 STP180NS04ZC 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/12 Package mechanical data STP180NS04ZC TO-220 mechanical data mm inch Dim Min A b b1 c D D1 E e e1 F H1 J1 L L1 L20 L30 ∅P Q 10/12 Typ 4.40 0.61 1.14 0.48 15.25 Max Min 4.60 0.88 1.70 0.70 15.75 0.173 0.024 0.044 0.019 0.6 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 1.27 10 2.40 4.95 1.23 6.20 2.40 13 3.50 Max 0.181 0.034 0.066 0.027 0.62 0.050 16.40 28.90 3.75 2.65 Typ 0.409 0.106 0.202 0.051 0.256 0.107 0.551 0.154 0.645 1.137 3.85 2.95 0.147 0.104 0.151 0.116 STP180NS04ZC 5 Revision history Revision history Table 8. Document revision history Date Revision 03-Apr-2008 1 Changes First release 11/12 STP180NS04ZC Please Read Carefully: Information in this document is provided solely in connection with ST products. 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