DATA SHEET MOS INTEGRATED CIRCUIT µPD16805 MONOLITHIC H BRIDGE DRIVER CIRCUIT µPD16805 is the monolithic and H bridge driver IC which consists of a CMOS control circuit and a MOS output stage. As compared with the driver of a MOS process using the conventional bipolar transistor, reduction of consumption current and power consumption is possible. With this product, clockwise and the inversion, and the brake function are built in, and it is the best for the drive circuit of the motor for film winding up of a camera, and the motor for auto focus/zooms. The package has adopted the 16 pin SOP and the 24 pin TSSOP, and corresponds to reduction of mounting area and mounting height. This product corresponds to the drive current to 1.0 A (DC). FEATURES • High drive current ID(pulse) = 4.2 A MAX. at PW ≤ 200 ms (single pulse) ID(DC) = 1.0 A (DC) • Low-ON resistance (sum of the upper and lower sides MOS FET) RON = 0.4 Ω TYP. at ID = 1.0 A • Standby function that turns OFF charge pump circuit • Compact surface mount package 16-pin plastic SOP (1.27 mm pitch) 24-pin plastic TSSOP (0.5 mm pitch) ORDERING INFORMATION Part Number Package µPD16805GS 16-pin plastic SOP (7.64 mm (300)) µPD16805MA-6A5 24-pin plastic TSSOP (5.72 mm (225)) The information in this document is subject to change without notice. Document No. S11032EJ4V0DS00 (4th edition) Date Published July 2001 N CP(K) Printed in Japan © 1997 µPD16805 ABSOLUTE MAXIMUM RATINGS (TA = 25°°C, Glass epoxy substrate 100 mm × 100 mm × 1 mm, 15% copper foil) Parameter Supply voltage VG pin applied voltage Symbol VDD VM Conditions Rating Unit Control section −0.5 to +6.5/+8.0Note Motor section −0.5 to +6.5/+8.0 Note VG 15 V V V Input voltage VIN −0.5 to VDD +0.5 V H bridge drive current ID(DC) DC 1.0 A H bridge drive current ID(pulse) PW ≤ 200 ms (single pulse) 4.2 A/ch PT GS 1.0 W MA-6A5 0.7 W Power consumption Peak junction temperature TCH(MAX) Storage temperature Tstg 150 °C −55 to +150 °C Note When the charge pump is used/when VG power-source supply from the exterior. RECOMMENDED OPERATING CONDITIONS (TA = 25°°C, Glass epoxy substrate 100 mm × 100 mm × 1 mm, 15% copper foil) Parameter Supply voltage Symbol VDD Conditions MIN. During normal operation 3.0 All input pins are low 2.5 VM TYP. MAX. 6.0/7.5Note 2 0.5 Unit V V µF Charge pump capacitance C1 to C3 0.01 VG pin applied voltageNote 1 VG At the time of external input 11 14 V Operating temperature TA Ambient temperature −30 60 °C Notes 1. When voltage is impressed to VG terminal from the exterior 2. When the charge pump is used/when VG power-source supply from the exterior. ELECTRICAL SPECIFICATIONS (Unless otherwise specified, VDD = recommended operating condition, VM = 0.5 to 6.0 V) Parameter Symbol TYP. MAX. Unit IDD1 VDD = 5 V, TA = Recommended conditions Control pins at high level 0.6 2.0 mA IDD2 VDD = 5 V, TA = Recommended conditions Control pins at low level 0.3 10 µA IM1 TA = Reommended conditions Control pins at low level 0.1 10 µA IM2 Control pins at low level 1.0 µA H bridge ON resistance RON ID = 1 A, VDD = VM = 5 V C1 = C2 = C3 = 0.01 µF sum of the upper and lower sides MOSFET 0.6 Ω High-level input voltage VIH TA = Recommended conditions Low-level input voltage VIL TA = Recommended conditions Charge pump circuit turn-ON time tONG H bridge output circuit turn-ON time tONH H bridge output circuit turn-OFF time tOFFH VDD = VM = 5 V, TA = Recommended conditions C1 = C2 = C3 = 0.01 µF ID = 1 A Control pin input pull-down resistor RIND VDD pin current VM pin current 2 Conditions MIN. 0.4 0.6 × VDD 0.5 35 TA = Recommended conditions Data Sheet S11032EJ4V0DS V 25 50 0.2 × VDD V 1.0 ms 10 µs 5.0 µs 65 kΩ 75 kΩ µPD16805 FUNCTION TABLE Input Signal Function IN1 IN2 INC STB H H H H Brake mode H L H H Forward mode L H H H Reverse mode L L H H Stop mode X X L H Stop mode X X X L Standby mode Forward mode Reverse mode VM VM ON OFF OUT2 OUT1 OFF OFF OUT1 ON ON OFF ON OUT2 OUT1 ON OFF Brake mode Stop mode VM VM OFF OUT2 ON OFF OUT1 OFF Data Sheet S11032EJ4V0DS OFF OUT2 OFF 3 µPD16805 Terminal function • µPD16805GS Package: 16 pin plastic SOP Terminal No. 4 C2L 1 16 C2H C1H 2 15 VG C1L 3 14 STBY VM 4 13 OUT2 VDD 5 12 PGND IN1 6 11 OUT1 IN2 7 10 VM INC 8 9 Terminal name DGND Terminal function 1 C2L The capacitor connection terminal for charge pumps 2 C1H The capacitor connection terminal for charge pumps 3 C1L The capacitor connection terminal for charge pumps 4 VM Motor block supply voltage input terminal 5 VDD Control block supply voltage input terminal 6 IN1 Input terminal 7 IN2 Input terminal 8 INC 9 DGND 10 VM Input terminal Control block GND terminal Motor block supply voltage input terminal 11 OUT1 Output terminal 12 PGND Output block GND terminal 13 OUT2 Output terminal 14 STBY Standby terminal 15 VG Gate input terminal 16 C2H The capacitor connection terminal for charge pumps Data Sheet S11032EJ4V0DS µPD16805 Terminal function • µPD16805MA-6A5 Package: 24 pin plastic TSSOP Terminal No. C2L 1 24 C2H C1H 2 23 VG C1L 3 22 STBY VM 4 21 OUT2 VM 5 20 OUT2 NC 6 19 PGND NC 7 18 PGND NC 8 17 OUT1 VDD 9 16 OUT1 IN1 10 15 VM IN2 11 14 VM INC 12 13 DGND Terminal name Terminal function 1 C2L The capacitor connection terminal for charge pumps 2 C1H The capacitor connection terminal for charge pumps 3 C1L The capacitor connection terminal for charge pumps 4 VM Motor block supply voltage input terminal 5 VM Motor block supply voltage input terminal 6 NC no used terminal 7 NC no used terminal 8 NC no used terminal 9 VDD Control block supply voltage input terminal 10 IN1 Input terminal 11 IN2 Input terminal 12 INC Input terminal 13 DGND 14 VM Control block GND terminal Motor block supply voltage input terminal 15 VM 16 OUT1 Output terminal Motor block supply voltage input terminal 17 OUT1 Output terminal 18 PGND Output block GND terminal 19 PGND Output block GND terminal 20 OUT2 Output terminal 21 OUT2 Output terminal 22 STBY Standby terminal 23 VG Gate input terminal 24 C2H The capacitor connection terminal for charge pumps Notice Please connect all the terminals that have plural. (VM, OUT1, OUT2, PGND) No used terminals are connected to ground. Data Sheet S11032EJ4V0DS 5 µPD16805 BLOCK DIAGRAM C2L 1 24 C2H C1H 2 23 VG C1L 3 22 STBY VM 4 21 OUT2 VM 5 20 OUT2 NC 6 19 PGND NC 7 18 PGND 17 OUT1 16 OUT1 15 VM Charge-pump circuit NC H-bridge circuit 8 Level shift circuit VDD 9 IN1 10 IN2 11 14 VM INC 12 13 DGND Control circuit The connection diagram of µPD16805MA-6A5 shows the block diagram. It of µPD16805GS does not change, except that there are not NC and plural terminals. The plural terminal should connect all terminals. 6 Data Sheet S11032EJ4V0DS µPD16805 The example of standard connection (1) using charge pump circuit 0.01 µ F C2L 1 24 C2H Charge-pump circuit 0.01 µF C1H 2 23 VG C1L 3 22 STBY VM 4 21 OUT2 VM 5 20 OUT2 NC 6 19 PGND NC 7 18 PGND NC 8 17 OUT1 16 OUT1 15 VM 0.01 µ F 0.5 to 6.0 V 10 µ F CPU M 3.0 to 6.0 V REG H-bridge circuit Level shift circuit VDD 9 CPU IN1 10 CPU IN2 11 14 VM CPU INC 12 13 DGND Control circuit (2) unusing charge pump circuit C2L 1 24 C2H Charge-pump circuit 0.5 to 7.5 V 10 µF C1H 2 23 VG C1L 3 22 STBY VM 4 21 OUT2 VM 5 20 OUT2 NC 6 19 PGND NC 7 18 PGND NC 8 17 OUT1 16 OUT1 15 VM 11 to 14 V CPU M 3.0 to 7.5 V REG Level shift circuit H-bridge circuit VDD 9 CPU IN1 10 CPU IN2 11 14 VM CPU INC 12 13 DGND Control circuit The connection diagram of µPD16805MA-6A5 is shown by the inside of a figure. This circuit diagrams are an example of connection, and are not intended for use in actual design-ins. Moreover, it recommendeds inserting an about several µF capacitor between VM-GND for surge voltage protection of the output stage. Data Sheet S11032EJ4V0DS 7 µPD16805 TYPICAL CHARACTERISTICS (TA = 25°°C) PT-TA characteristics RON-TA characteristics H-bridge ON resistance RON (Ω) Total power dissipation PT (W) 1.4 1.2 1.0 µ PD16805GS 0.8 0.6 µ PD16805MA-6A5 0.4 0.2 0 10 20 30 40 50 60 70 IDR = 0.5 A VDD = VM = 5 V 1.2 1.0 0.8 0.6 0.4 0.2 0 –50 80 –25 Ambient temperature TA (°C) 0 25 50 75 Ambient temperature TA (°C) VG-IG characteristics VG-RON characteristics VDD = 5 V H-bridge ON resistance RON (Ω) VDD = 5 V Gate current IG ( µ A) 60 50 40 30 20 10 0 5 10 15 20 1.2 1.0 0.8 0.6 0.4 0.2 0 Gate supply voltage VG (V) 8 100 5 10 15 Gate supply voltage VG (V) Data Sheet S11032EJ4V0DS 20 µPD16805 PACKAGE DIMENSION (µPD16805GS) 16-PIN PLASTIC SOP (7.62 mm (300)) 16 9 detail of lead end P 1 8 A H F I G J S B N S L K C D M M E NOTE Each lead centerline is located within 0.12 mm of its true position (T.P.) at maximum material condition. ITEM A MILLIMETERS 10.2±0.2 B 0.78 MAX. C 1.27 (T.P.) D 0.42 +0.08 −0.07 E 0.1±0.1 F 1.65±0.15 G 1.55 H 7.7±0.3 I 5.6±0.2 J 1.1±0.2 K 0.22 +0.08 −0.07 L 0.6±0.2 M 0.12 N 0.10 P 3° +7° −3° P16GM-50-300B-6 Data Sheet S11032EJ4V0DS 9 µPD16805 PACKAGE DIMENSION (µPD16805MA-6A5) 24-PIN PLASTIC TSSOP (5.72 mm (225)) 13 24 detail of lead end F G R P L S 12 1 E A H A' I J S D M N K C M S B NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition. ITEM MILLIMETERS A 6.65±0.10 A' 6.5±0.1 B 0.575 C 0.5 (T.P.) D E 0.22±0.05 0.1±0.05 F 1.2 MAX. G 1.0±0.05 H I J K L M 6.4±0.1 4.4±0.1 1.0±0.1 0.17±0.025 0.5 0.10 N 0.08 P 3°+5° −3° R 0.25 S 0.6±0.15 P24MA-50-6A5 10 Data Sheet S11032EJ4V0DS µPD16805 RECOMMENDED SOLDERING CONDITIONS It is recommended to solder this under the conditions described below. For soldering methods and conditions other than those listed below, consult NEC. For details of the recommended soldering conditions, refer to information document “Semiconductor Device Mounting Technology Manual”. µPD16805GS Soldering Method Soldering Conditions Recommended Conditions Symbol Infrared reflow Peak package temperature: 235°C, Time: 30 seconds MAX. (210°C MIN.), Number of times: 2 MAX. IR35-00-2 VPS Peak package temperature: 215°C, Time: 40 seconds MAX. (200°C MIN.), Number of times: 2 MAX. VP15-00-2 The number of storage days at 25°C, 65% RH after the dry pack has been opened µPD16805MA-6A5 Soldering Method Soldering Conditions Recommended Conditions Symbol Infrared reflow Package peak temperature: 235°C; Duration: 30 sec. max. (210°C or above): Number of times: Max. 3; Time limit: NoneNote Flux: Rosin type flux with reduced chlorine content (chlorine 0.2 Wt% or less) is recommended. IR35-00-3 VPS Package peak temperature: 215°C; Duration: 40 sec. max. (200°C or above): Number of times:3; Time limit: NoneNote Flux: Rosin type flux with reduced chlorine content (chlorine 0.2 Wt% or less) is recommended. VP15-00-3 Wave soldering Package peak temperature: 260°C or less, Duration: 10 sec. Max.,. Preparatory heating temperature: 120°C or less; Number of times: 1 Flux: Rosin type flux with reduced chlorine content (chlorine 0.2 Wt% or less) is recommended. WS60-00-1 Note The number of storage days at 25°C, 65% RH after the dry pack has been opened Caution Use of more than one soldering method should be avoided. Data Sheet S11032EJ4V0DS 11 µPD16805 [MEMO] 12 Data Sheet S11032EJ4V0DS µPD16805 [MEMO] Data Sheet S11032EJ4V0DS 13 µPD16805 [MEMO] 14 Data Sheet S11032EJ4V0DS µPD16805 NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to V DD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function. Data Sheet S11032EJ4V0DS 15 µPD16805 • The information in this document is current as of June, 2001. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. • NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. 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(Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above). M8E 00. 4