MTE040N20P3

Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 1/8
CYStech Electronics Corp.
N-Channel Enhancement Mode Power MOSFET
MTE040N20P3
BVDSS
ID
RDS(ON)@VGS=10V, ID=28A
RDS(ON)@VGS=6V, ID=10A
200V
50A
30.2mΩ(typ)
29.3mΩ(typ)
Features
 Low Gate Charge
 Simple Drive Requirement
 Pb-free lead plating package
Equivalent Circuit
Outline
MTE040N20P3
TO-247
G：Gate D：Drain
S：Source
G
D
S
Ordering Information
Device
MTE040N20P3-0-UE-S
Package
TO-247
(Pb-free lead plating package)
Shipping
30 pcs / tube, 10 tubes/ box ,
10 boxes/carton
Environment friendly grade : S for RoHS compliant products, G for RoHS
compliant and green compound products
Packing spec, UE : 30 pcs / tube, 10 tubes/box, 10 boxes/carton
Product rank, zero for no rank products
Product name
MTE040N20P3
CYStek Product Specification
Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 2/8
CYStech Electronics Corp.
Absolute Maximum Ratings (TC=25C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TC=25C
Continuous Drain Current @ TC=100C
Pulsed Drain Current *1
Avalanche Current
Avalanche Energy @ L=2mH, IAS=14A, RG=25Ω
Repetitive Avalanche Energy @ L=0.05mH *2
Total Power Dissipation @TC=25℃
Total Power Dissipation @TC=100℃
Operating Junction and Storage Temperature Range
Note : *1. Pulse width limited by maximum junction temperature
Symbol
Limits
VDS
VGS
ID
ID
IDM
IAS
EAS
EAR
200
±20
50
35
200
14
196
30
300
150
-55~+175
Pd
Tj, Tstg
Unit
V
A
mJ
W
C
*2. Duty cycle ≤ 1%
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max
Symbol
Rth,j-c
Rth,j-a
Value
0.5
40
Unit
C/W
C/W
Characteristics (Tc=25C, unless otherwise specified)
Symbol
Static
BVDSS
VGS(th)
IGSS
IDSS
RDS(ON)
*1
GFS *1
Dynamic
Qg *1, 2
Qgs *1, 2
Qgd *1, 2
td(ON) *1, 2
tr *1, 2
td(OFF) *1, 2
tf *1, 2
MTE040N20P3
Min.
Typ.
Max.
Unit
200
2.0
-
30.2
29.3
44
4.0
±100
1
25
40
46
-
V
V
nA
-
98.5
14.3
38.4
32
29
70
17
-
μA
mΩ
S
Test Conditions
VGS=0V, ID=250μA
VDS =VGS, ID=250μA
VGS=±20V, VDS=0V
VDS =200V, VGS =0V
VDS =160V, VGS =0V, TJ=125C
VGS =10V, ID=28A
VGS =6V, ID=10A
VDS =15V, ID=28A
nC
ID=28A, VDS=160V, VGS=10V
ns
VDS=100V, ID=28A, VGS=10V,
RG=1.8Ω
CYStek Product Specification
CYStech Electronics Corp.
Ciss
Coss
Crss
Rg
Source-Drain Diode
IS *1
ISM *3
VSD *1
trr
Qrr
-
4467
392
341
0.6
-
-
0.81
79
300
50
200
1.2
-
Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 3/8
pF
VGS=0V, VDS=25V, f=1MHz
Ω
f=1MHz
A
V
ns
nC
IS=28A, VGS=0V
IF=28A, dIF/dt=100A/μs
Note : *1.Pulse Test : Pulse Width 300μs, Duty Cycle2%
*2.Independent of operating temperature
*3.Pulse width limited by maximum junction temperature.
MTE040N20P3
CYStek Product Specification
Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 4/8
CYStech Electronics Corp.
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
10V
9V
8V
7V
6V
120
90
BVDSS, Normalized Drain-Source
Breakdown Voltage
ID, Drain Current (A)
150
VGS=5V
60
VGS=4.5V
30
1.2
1
0.8
0.6
ID=250μA,
VGS=0V
VGS=4V
0.4
0
0
3
6
9
12
VDS, Drain-Source Voltage(V)
-75 -50 -25
15
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1000
VGS=4.5V
VSD, Source-Drain Voltage(V)
R DS(on), Static Drain-Source On-State
Resistance(mΩ)
1.2
100
VGS=6V
VGS=10V
VGS=0V
1
Tj=25°C
0.8
0.6
Tj=150°C
0.4
0.2
10
0.01
0.1
1
10
ID, Drain Current(A)
0
100
5
10
15
20
25
IDR, Reverse Drain Current(A)
30
Drain-Source On-State Resistance vs Junction Tempearture
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
2.8
200
R DS(on), Normalized Static DrainSource On-State Resistance
ID=28A
R DS(on), Static Drain-Source OnState Resistance(mΩ)
0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
160
120
80
40
2.4
VGS=10V, ID=28A
2
1.6
1.2
0.8
0.4
RDS(ON) @Tj=25°C : 30.2mΩ
0
0
0
MTE040N20P3
2
4
6
8
VGS, Gate-Source Voltage(V)
10
-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 5/8
Typical Characteristics (Cont.)
Threshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
1.4
VG S(th), Normalized Threshold Voltage
10000
Capacitance---(pF)
Ciss
Coss
1000
Crss
ID=250μA
1.2
1
0.8
0.6
0.4
100
0.1
1
10
VDS, Drain-Source Voltage(V)
-75 -50 -25 0 25 50 75 100 125 150 175
Tj, Junction Temperature(°C)
100
Forward Transfer Admittance vs Drain Current
Gate Charge Characteristics
10
VDS=100V
VGS, Gate-Source Voltage(V)
GFS, Forward Transfer Admittance(S)
100
10
1
VDS=10V
0.1
Ta=25°C
Pulsed
8
VDS=40V
6
VDS=160V
4
2
ID=28A
0
0.01
0.001
0.01
0.1
1
ID, Drain Current(A)
10
0
100
40
60
80
Qg, Total Gate Charge(nC)
100
Maximum Drain Current vs Case Temperature
Maximum Safe Operating Area
60
RDSON
Limited
100
10μs
100μs
10
1ms
1
TC=25°C, Tj=175°C
VGS=10V, θ JC=0.5°C/W
Single Pulse
10ms
DC
ID, Maximum Drain Current(A)
1000
ID, Drain Current(A)
20
50
40
30
20
10
VGS=10V, RθJC=0.5°C/W
0
0.1
0.1
MTE040N20P3
1
10
100
VDS, Drain-Source Voltage(V)
1000
25
50
75
100
125
150
TC, Case Temperature(°C)
175
200
CYStek Product Specification
Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 6/8
CYStech Electronics Corp.
Typical Characteristics (Cont.)
Power Derating Curve
Typical Transfer Characteristics
350
150
300
PD, Power Dissipation(W)
VDS=10V
ID, Drain Current(A)
120
90
60
30
250
200
150
100
50
0
0
0
2
4
6
8
VGS, Gate-Source Voltage(V)
10
0
25
50
75
100
125
150
175
200
TC, Case Temperature(℃)
Transient Thermal Response Curves
r(t), Normalized Effective Transient
Thermal Resistance
10
1
0.1
D=0.5
1.RθJC(t)=r(t)*RθJC
2.Duty Factor, D=t1/t2
3.TJM-TC=PDM*Rθ JC(t)
4.RθJC=0.5°C/W
0.2
0.1
0.05
0.02
0.01
Single Pulse
0.01
0.00001
MTE040N20P3
0.0001
0.001
0.01
t1, Square Wave Pulse Duration(s)
0.1
1
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 7/8
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
Pb-free devices
260 +0/-5 C
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5C of actual peak
temperature(tp)
Ramp down rate
Time 25 C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3C/second max.
3C/second max.
100C
150C
60-120 seconds
150C
200C
60-180 seconds
183C
60-150 seconds
240 +0/-5 C
217C
60-150 seconds
260 +0/-5 C
10-30 seconds
20-40 seconds
6C/second max.
6 minutes max.
6C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTE040N20P3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C872P3
Issued Date : 2014.08.13
Revised Date :
Page No. : 8/8
TO-247 Dimension
Marking:
E040N20
Device Name
Date Code
□□□□
1
2
3
Style: Pin 1.Gate 2.Drain 3.Source
3-Lead TO-247 Plastic Package
CYStek Package Code: P3
Inches
Min.
Max.
0.191
0.200
0.087
0.102
0.039
0.055
0.110
0.126
0.071
0.087
0.020
0.028
0.083
0.075
0.608
0.620
0.138 REF
DIM
A
A1
b
b1
b2
c
c1
D
E1
Millimeters
Min.
Max.
4.850
5.150
2.200
2.600
1.000
1.400
2.800
3.200
1.800
2.200
0.500
0.700
2.100
1.900
15.450 15.750
3.500 REF
DIM
E2
L
L1
L2
Φ
e
H
h
Inches
Min.
Max.
0.142 REF
1.610
1.626
0.976
0.988
0.799
0.811
0.280
0.287
0.215 REF
0.235 REF
0.000
0.012
Millimeters
Min.
Max.
3.600 REF
40.900 41.300
24.800 25.100
20.300 20.600
7.100
7.300
5.450 REF
5.980 REF
0.000
0.300
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
 Lead: Pure tin plated.
 Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
 CYStek reserves the right to make changes to its products without notice.
 CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
 CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTE040N20P3
CYStek Product Specification