QTP # 99202:LOW VOLTAGE SYNCHRONOUS/ASYNCHRONOUS RAM R52D-3 TECHNOLOGY AT FAB 4

Document No.001-87678 Rev. *B
ECN # 4394116
Cypress Semiconductor
Product Qualification Report
QTP# 99202 VERSION *B
May 2014
Low Voltage Synchronous/Asynchronous RAM
R52D-3 Technology at Fab 4
CY7C056V
CY7C057V
CY7C09569V
CY7C09579V
3.3V, 16K/32K x 36 FLEx36™ Asynchronous
Dual - Port Static RAM
3.3V, 16K/32K x 36 FLEx36™ Synchronous
Dual - Port Static RAM
FLEx36™ is a Trademark of Cypress Semiconductor Corporation
FOR ANY QUESTIONS ON THIS REPORT, PLEASE CONTACT
[email protected] or via a CYLINK CRM CASE
Prepared By:
Lorena R. Zapanta (ILZ)
Reliability Engineer
Reviewed By:
Rene Rodgers (RT)
Reliability Manager
Approved By:
Richard Oshiro(RGO)
Reliability Director
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 1 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
PRODUCT QUALIFICATION HISTORY
Qual
Report
Description of Qualification Purpose
Date
Comp
99202
CY7C09569V/CY7C09579V, R52D-3 Technology
Sep 99
040701
CY7C09579V GOOBI/Burn-In Reduction to 12hrs (144 TQFP)
May 04
042301
CY7C09579V Burn-In Reduction to 6hrs (172 BGA)
Nov 04
Company Confidential
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Page 2 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: Qualify CY7C09569V / CY7C09579V and its FLEx36 family in qualified R52D-3 Technology, Fab4.
Marketing Part #:
CY7C056V / CY7C057V / CY7C09569V / CY7C09579V
Device Description: 3.3V, Commercial and Industrial offered in 144-P TQFP and 172-B FBGA Package
Cypress Division:
Cypress Semiconductor Corporation – Data Com Division (DCD)
Overall Die (or Mask) REV Level (pre-requisite for qualification):
What ID markings on Die:
Rev. A
7C05793A
TECHNOLOGY/FAB PROCESS DESCRIPTION - R52D-3
Number of Metal Layers:
2
Metal
Composition:
Passivation Type and Materials:
Metal 1: 500 Å TiW/6000 Å Al-.5%Cu/300 Å
TiW Metal 2: 300Å CoTi/8000Å Al.5%Cu/300Å TiW
1000Å Oxide + 9000Å Nitride
Free Phosphorus contents in top glass layer(%):
0%
Number of Transistors in Device
29,066,890
Number of Gates in Device
4.8 million
Generic Process Technology/Design Rule (drawn):
Gate Oxide Material/Thickness (MOS):
CMOS, Double Metal /0.25 m
Name/Location of Die Fab (prime) Facility:
Cypress Semiconductor - Bloomington, MN
Die Fab Line ID/Wafer Process ID:
Fab4/R52D-3
SiO2 / 50 Å
PACKAGE AVAILABILITY
PACKAGE
ASSEMBLY FACILITY SITE
144-pin TQFP
TAIWN-G
256-ball FBGA
(extended qual to 172-ball)
TAIWN-G
Note: Package Qualification details upon request
Company Confidential
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Page 3 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
A144
144-pin Thin Quad Flat Pack (TQFP)
Sumitomo EME 7320
V-O per UL94
Oxygen Rating Index:
>28%
Lead Frame Material:
Copper
Lead Finish, Composition / Thickness:
Solder Plate, 85%Sn, 15%Pb
Die Backside Preparation Method/Metallization: N/A
Die Separation Method:
Wafer Saw
Die Attach Supplier:
Ablestik
Die Attach Material:
8361
Bond Diagram Designation
10-03561
Wire Bond Method:
Thermosonic
Wire Material/Size:
Gold/ 1.3mil
Thermal Resistance Theta JA °C/W:
42C/W
Package Cross Section Yes/No:
N/A
Name/Location of Assembly (prime) facility:
ASE Taiwan (TAIWN-G)
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
ASE Taiwan (TAIWN-G), KYEC
Fault Coverage:
100%
Company Confidential
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Page 4 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT
Stress/Test
Test Condition
(Temp/Bias
)
Dynamic Operating Condition, Vcc Max =3.8V, 125°C
Result
P/F
Dynamic Operating Condition, Vcc Max = 4.5V, 150°C
P
High Accelerated Saturation Test
(HAST)
130°C, 3.63V, 85%RH
Precondition: JESD22 Moisture Sensitivity MSL 3
192 Hrs, 30°C / 60%RH, 220C+5, -0C Reflow
P
Temperature Cycle
MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C
Precondition: JESD22 Moisture Sensitivity MSL 3
192 Hrs, 30°C / 60%RH, 220C+5, -0C Reflow
P
Pressure Cooker
121ºC, 100%RH, 15 Psig
Precondition: JESD22 Moisture Sensitivity MSL 3
192 Hrs, 30°C / 60%RH, 220C+5, -0C Reflow
P
High Temperature Operating Life
P
Early Failure Rate
High Temperature Operating Life
Latent Failure Rate
Electrostatic Discharge
Human Body Model (ESD-HBM)
2,200V, JESD22-A114
Electrostatic Discharge
Charge Device Model (ESD-CDM)
500V, JESD22-C101
High Temperature Steady State Life
Static Operating Condition, Vcc = 3.63V, 150C
P
High Temperature Storage
165C, No bias
P
Age Bond Pull
MIL-STD-883, Method 2011
P
Current Density
P
P
Meets the Technology Device Level Reliability Specifications
Static Latch-up
125°C ,  200mA, In accordance with JESD78
P
Acoustic Microscopy, MSL 3
J-STD-020
P
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Page 5 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
RELIABILITY FAILURE RATE SUMMARY
Stress/Test
High Temperature Operating Life
Early Failure Rate1 @125C
High Temperature Operating Life2,3
Long Term Failure Rate
1
2
3
4
# Fails
Activation
Energy
Thermal
AF4
Failure Rate
5850
0
N/A
N/A
0 PPM
387,780 DHRs
2
0.7
170
30 FIT
Device Tested/
Device Hours
A production burn-in of 48 Hrs at 150C, 3.8V is required for the product.
Assuming an ambient temperature of 55C and a junction temperature rise of 15C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
-5
k = Boltzmann's constant = 8.62x10 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the
device at use conditions.
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Page 6 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
Reliability Test Data
QTP # : 99202
Device
STRESS:
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 4V, Vcc Max
CY7C09579V-AC
4909273
619912249
TAIWN-G
48
773
0
CY7C09579V-AC
4922904
619920052
TAIWN-G
48
784
0
STRESS:
HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max
CY7C09579V-AC
4909273
619912249
TAIWN-G
80
396
0
CY7C09579V-AC
4909273
619912249
TAIWN-G
500
386
1
CY7C09579V-AC
4922904
619920052
TAIWN-G
80
393
0
CY7C09579V-AC
4922904
619920052
TAIWN-G
500
387
1
STRESS:
4909273
619912249
TAIWN-G
128
48
0
CY7C09579V-AC
4922904
619920052
TAIWN-G
128
48
0
4909273
619912249
TAIWN-G
168
48
0
CY7C09579V-AC
4922904
619920052
TAIWN-G
168
50
0
TAIWN-G
COMP
3
0
ESD-CHARGE DEVICE MODEL, 500V
CY7C09579V-AC
STRESS:
4909273
619912249
ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,800V
CY7C09579V-AC
4909273
619912249
TAIWN-G
COMP
3
0
CY7C09579V-AC
4909273
619912249
TAIWN-G
COMP
3
0
3
0
3
0
STRESS:
DYNAMIC LATCH-UP TESTING
CY7C057V-AC
STRESS:
4909273
619912249
TAIWAN-G
COMP
STATIC LATCH-UP TESTING, 125C, 9.5V, +/- 200mA
CY7C09579V-AC
STRESS:
Gate Oxide Defect
PRESSURE COOKER TEST, 121C, 100%RH, MSL3
CY7C09579V-AC
STRESS:
Particle Defect
HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.63V), PRE COND 192 HR 30C/60%RH, MSL3
CY7C09579V-AC
STRESS:
Failure Mechanism
4909273
619912249
TAIWN-G
COMP
TC COND. C -65C TO 150C, PRECONDITION 192 HRS 30C/60%RH, MSL3
CY7C09579V-AC
4909273
619912249
TAIWN-G
300
47
1
Failed ISB3
CY7C09579V-AC
4909273
619912249
TAIWN-G
500
46
1
Particle Defect
CY7C09579V-AC
4909273
619912249
TAIWN-G
1000
46
0
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Page 7 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
Reliability Test Data
QTP #: 040701
Device
STRESS:
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
Failure Mechanism
HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max
CY7C09579V (7C05793A)
4351632
610408280
TAIWN-G
48
1001
0
CY7C09579V (7C05793A)
4351632
610408280N
TAIWN-G
48
974
0
CY7C09579V (7C05793A)
4351704
610408279
TAIWN-G
48
1860
0
CY7C09579V (7C05793A)
4352920
610412218N
TAIWN-G
48
1028
0
Company Confidential
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Page 8 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
Reliability Test Data
QTP #: 042301
Device
STRESS:
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 3.8V, Vcc Max
CY7C09579V (7C05793A)
422508
CY7C09579V (7C05793A)
423864
CY7C09579V (7C05793A)
CY7C09579V (7C05793A)
610438476
TAIWN-G
96
492
0
610434477
TAIWN-G
96
160
0
423864
610434477N1
TAIWN-G
96
159
0
423864
610434477N1
TAIWN-G
96
177
0
Company Confidential
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Page 9 of 10
Document No.001-87678 Rev. *B
ECN # 4394116
Document History Page
Document Title:
QTP # 99202: LOW VOLTAGE SYNCHRONOUS/ASYNCHRONOUS RAM R52D-3
TECHNOLOGY AT FAB 4
001-87678
Document Number:
Rev. ECN
Orig. of
No.
Change
**
4007788 ILZ
*A
4392970 ILZ
Description of Change
Initial Spec Release
Qualification report published on Cypress.com is documented on
memo LGQ-144 and not in spec format.
Initiated spec for QTP 99202 and data from LGQ-144 was transferred
to qualification report spec template.
Sunset Review
Updated front page to reflect new qualification report template per
Spec 001-57716
Page 3 – Major package information table - Deleted Assembly process
flow - obsolete spec
Reliability tests performed per specification requirements
Deleted revision of the following standards:
Temperature Cycle, X-ray, Thermal Shock: Deleted Rev C,MIL-STD-883
ESD-HBM , Deleted Rev A., JESD22-A114
ESD-CDM : Deleted Rev C, JESD22-C101
Ball Shear: Ball shear, JESD22-B116
Thermal Shock: Deleted JESD22-A106
*B
4394116 ILZ
Correction on Page 1 Added this information “ FOR ANY QUESTIONS
ON THIS REPORT, PLEASE CONTACT [email protected] or via
a CYLINK CRM CASE
Distribution: WEB
Posting:
None
Company Confidential
A printed copy of this document is considered uncontrolled. Refer to online copy for latest revision.
Page 10 of 10