100321 Low Power 9-Bit Inverter General Description The 100321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output. All inputs have 50 kΩ pull-down resistors. n n n n 2000V ESD protection Pin/function compatible with 100121 Voltage compensated operating range = −4.2V to −5.7V Available to MIL-STD-883 Features n 30% power reduction of the 100121 Logic Symbol Pin Names Description D1–D9 Data Inputs O1–O9 Data Outputs DS100309-1 Connection Diagrams 24-Pin DIP 24-Pin Quad Cerpak DS100309-3 DS100309-2 © 1998 National Semiconductor Corporation DS100309 www.national.com 100321 Low Power 9-Bit Inverter August 1998 Absolute Maximum Ratings (Note 1) ≥2000V ESD (Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Recommended Operating Conditions Above which the useful life may be impaired −65˚C to +150˚C Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic +175˚C Plastic +150˚C −7.0V to +0.5V VEE Pin Potential to Ground Pin Input Voltage (DC) VEE to +0.5V Output Current (DC Output HIGH) −50 mA Case Temperature (TC) Military Supply Voltage (VEE) −55˚C to +125˚C −5.7V to −4.2V Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functonal operation under these conditions is not implied. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Military Version DC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C Symbol VOH Conditions Parameter Min Max Units TC Output HIGH Voltage −1025 −870 mV O˚C to −1085 −870 mV −55˚C VIN = VIH (Max) Loading with −1830 −1620 mV 0˚C to or VIL (Min) 50Ω to −2.0V −1830 −1555 mV −55˚C −1035 mV 0˚C to −1085 mV −55˚C VIN = VIH (Min) Loading with −1610 mV 0˚C to or VIL (Max) 50Ω to −2.0V −1555 mV −55˚C −870 mV −55˚C to Notes +125˚C VOL Output LOW Voltage (Notes 3, 4, 5) +125˚C VOHC Output HIGH Voltage +125˚C VOLC Output LOW Voltage (Notes 3, 4, 5) +125˚C VIH Input HIGH Voltage −1165 +125˚C VIL Input LOW Voltage −1830 −1475 mV −55˚C to +125˚C IIL Input LOW Current 0.50 µA −55˚C to +125˚C IIH Input HIGH Current 240 µA IEE Power Supply Current −70 µA −25 mA for All Inputs Guaranteed LOW Signal for All Inputs VEE = −4.2V VIN = VIL (Min) (Notes 3, 4, 5, 6) (Notes 3, 4, 5, 6) (Notes 3, 4, 5) 0˚C to +125˚C 340 Guaranteed HIGH Signal −55˚C −55˚C to VEE = −5.7V VIN = VIH (Max) Inputs Open (Notes 3, 4, 5) (Notes 3, 4, 5) +125˚C Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 4: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8. Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C and +125˚C, Subgroups A1, 2, 3, 7, and 8. Note 6: Guaranteed by applying specified input condition and testing VOH/VOL. www.national.com 2 AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol TC = −55˚C TC = +25˚C TC = +125˚C Min Max Min Max Min Max 0.30 1.80 0.40 1.60 0.40 1.80 ns 0.30 1.20 0.30 1.20 0.30 1.20 ns Parameter tPLH Propagation Delay tPHL Data to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% Units Conditions Notes (Notes 7, 8, 9, 11) Figures 1, 2 (Note 10) Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 8: Screen tested 100% on each device at +25˚C temperature only, Subgroup A9. Note 9: Sample tested (Method 5005, Table I) on each mfg. lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11. Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data). Note 11: The propagation delay specified is for single output switching. Delays may vary up to 200 ps with multiple outputs switching. Test Circuitry DS100309-5 Notes: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF FIGURE 1. AC Test Circuit Switching Waveforms DS100309-6 FIGURE 2. Propagation Delay and Transition Times 3 www.national.com 4 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Ceramic Dual-In-Line Package (D) NS Package Number J24E 24-Lead Quad Cerpak (F) NS Package Number W24B 5 www.national.com 100321 Low Power 9-Bit Inverter LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. 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