Order this document by MRF141/D SEMICONDUCTOR TECHNICAL DATA The RF MOSFET Line N–Channel Enhancement–Mode MOSFET Designed for broadband commercial and military applications at frequencies to 175 MHz. The high power, high gain and broadband performance of this device makes possible solid state transmitters for FM broadcast or TV channel frequency bands. • Guaranteed Performance at 30 MHz, 28 V: Output Power — 150 W Gain — 18 dB (22 dB Typ) Efficiency — 40% 150 W, 28 V, 175 MHz N–CHANNEL BROADBAND RF POWER MOSFET • Typical Performance at 175 MHz, 50 V: Output Power — 150 W Gain — 13 dB • Low Thermal Resistance • Ruggedness Tested at Rated Output Power • Nitride Passivated Die for Enhanced Reliability D G CASE 211–11, STYLE 2 S MAXIMUM RATINGS Rating Symbol Value Unit Drain–Source Voltage VDSS 65 Vdc Drain–Gate Voltage VDGO 65 Vdc VGS ± 40 Vdc Drain Current — Continuous ID 16 Adc Total Device Dissipation @ TC = 25°C Derate above 25°C PD 300 1.71 Watts W/°C Storage Temperature Range Tstg – 65 to +150 °C TJ 200 °C Symbol Max Unit RθJC 0.6 °C/W Gate–Source Voltage Operating Junction Temperature THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction to Case NOTE — CAUTION — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. REV 8 RF DEVICE DATA MOTOROLA Motorola, Inc. 1997 MRF141 1 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit V(BR)DSS IDSS 65 — — Vdc — — 5.0 mAdc IGSS — — 1.0 µAdc VGS(th) VDS(on) 1.0 3.0 5.0 Vdc 0.1 0.9 1.5 Vdc gfs 5.0 7.0 — mhos Ciss Coss — 350 — pF Output Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) — 420 — pF Reverse Transfer Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) Crss — 35 — pF Gps 16 — 20 10 — — dB η 40 45 — % IMD(d3) IMD(d11) ψ — — – 30 – 60 – 28 — OFF CHARACTERISTICS (1) Drain–Source Breakdown Voltage (VGS = 0, ID = 100 mA) Zero Gate Voltage Drain Current (VDS = 28 V, VGS = 0) Gate–Body Leakage Current (VGS = 20 V, VDS = 0) ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) Drain–Source On–Voltage (VGS = 10 V, ID = 10 A) Forward Transconductance (VDS = 10 V, ID = 5.0 A) DYNAMIC CHARACTERISTICS (1) Input Capacitance (VDS = 28 V, VGS = 0, f = 1.0 MHz) FUNCTIONAL TESTS Common Source Amplifier Power Gain, f = 30; 30.001 MHz (VDD = 28 V, Pout = 150 W (PEP), IDQ = 250 mA) f = 175 MHz Drain Efficiency (VDD = 28 V, Pout = 150 W (PEP), f = 30; 30.001 MHz, IDQ = 250 mA, ID (Max) = 5.95 A) Intermodulation Distortion (1) (VDD = 28 V, Pout = 150 W (PEP), f = 30 MHz, f2 = 30.001 MHz, IDQ = 250 mA) Load Mismatch (VDD = 28 V, Pout = 150 W (PEP), f1 = 30; 30.001 MHz, IDQ = 250 mA, VSWR 30:1 at all Phase Angles) dB No Degradation in Output Power CLASS A PERFORMANCE Intermodulation Distortion (1) and Power Gain GPS — (VDD = 28 V, Pout = 50 W (PEP), f1 = 30 MHz, IMD(d3) — f2 = 30.001 MHz, IDQ = 4.0 A) IMD(d9 – 13) — NOTE: 1. To MIL–STD–1311 Version A, Test Method 2204B, Two Tone, Reference Each Tone. BIAS + 0 – 12 V – 23 – 50 – 75 R4 C5 C6 R1 RF INPUT R3 D.U.T. C8 C7 T2 C4 L2 C9 – dB + + L1 C11 — — — C10 28 V – RF OUTPUT C2 T1 C3 R2 C2, C5, C6, C7, C8, C9 — 0.1 µF Ceramic Chip or Monolythic with Short Leads C3 — Arco 469 C4 — 820 pF Unencapsulated Mica or Dipped Mica with Short Leads C10 — 10 µF/100 V Electrolytic C11 — 1 µF, 50 V, Tantalum C12 — 330 pF, Dipped Mica (Short leads) C12 L1 — VK200/4B Ferrite Choke or Equivalent, 3.0 µH L2 — Ferrite Bead(s), 2.0 µH R1, R2 — 51 Ω/1.0 W Carbon R3 — 1.0 Ω/1.0 W Carbon or Parallel Two 2 Ω, 1/2 W Resistors R4 — 1 kΩ/1/2 W Carbon T1 — 16:1 Broadband Transformer T2 — 1:25 Broadband Transformer Board Material — 0.062″ Fiberglass (G10), 1 oz. Copper Clad, 2 Sides, er = 5 Figure 1. 30 MHz Test Circuit (Class AB) MRF141 2 MOTOROLA RF DEVICE DATA TYPICAL CHARACTERISTICS VGS, GATE-SOURCE VOLTAGE (NORMALIZED) I D, DRAIN CURRENT (AMPS) 100 10 TC = 25°C 1 1 10 VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS) 100 1.04 1.03 1.02 1.01 1 0.99 0.98 0.97 0.96 0.95 0.94 0.93 0.92 0.91 0.9 – 25 Figure 2. DC Safe Operating Area ID = 5 A 4A 2A 1A 0.5 A 0.25 A 0 100 75 Figure 3. Gate–Source Voltage versus Case Temperature 200 0 f T, UNITY GAIN FREQUENCY (MHz) 2000 C, CAPACITANCE (pF) VDS = 20 V 10 V 1000 Coss Ciss 200 Crss 0 0 2 4 6 8 10 12 14 ID, DRAIN CURRENT (AMPS) 16 18 20 0 20 5 10 15 25 Figure 5. Capacitance versus Drain–Source Voltage 30 Pout , OUTPUT POWER (WATTS) 300 25 20 VDD = 28 V IDQ = 250 mA Pout = 150 W 15 10 200 f = 175 MHz VDD = 28 V IDQ = 250 mA 100 00 5 10 15 2 10 100 200 20 25 300 200 f = 30 MHz VDD = 28 V IDQ = 250 mA 100 5 20 VDS, DRAIN–SOURCE VOLTAGE (VOLTS) Figure 4. Common Source Unity Gain Frequency versus Drain Current GPS , POWER GAIN (dB) 25 50 TC, CASE TEMPERATURE (°C) 0 0 1 2 3 4 5 f, FREQUENCY (MHz) Pin, INPUT POWER (WATTS) Figure 6. Power Gain versus Frequency Figure 7. Output Power versus Input Power MOTOROLA RF DEVICE DATA MRF141 3 TYPICAL CHARACTERISTICS 320 f = 30 MHz IDQ = 250 mA 280 Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS) 320 240 Pin = 4 W 200 160 2W 120 1W 80 f = 175 MHz IDQ = 250 mA 280 240 200 Pin = 20 W 160 120 14 W 80 8W 40 40 0 12 14 16 18 20 22 24 26 0 12 28 14 16 18 20 22 24 26 SUPPLY VOLTAGE (VOLTS) Figure 8. Output Power versus Supply Voltage Figure 9. Output Power versus Supply Voltage IMD, INTERMODULATION DISTORTION (dB) SUPPLY VOLTAGE (VOLTS) 28 25 d3 35 d5 45 IDQ = 250 mA 55 VDD = 28, f = 30 MHz, TONE SEPARATION = 1 kHz 25 d3 35 45 55 d5 0 20 40 60 IDQ = 500 mA 80 100 120 140 160 180 200 Pout, OUTPUT POWER (WATTS) Figure 10. IMD versus Pout (PEP) MRF141 4 MOTOROLA RF DEVICE DATA Zo = 10 Ω VDD = 28 V IDQ = 250 mA Pout = 150 W PEP ZOL* = Conjugate of the optimum load impedance ZOL* = into which the device output operates at a ZOL* = given output power, voltage and frequency. 30 15 100 7.5 Zin 4 30 2 150 100 2 f = 175 MHz ZOL* f = 175 MHz Figure 11. Input and Output Impedances RFC1 + 28 V + BIAS 0 – 12 V R1 C10 L4 – C11 + C4 C5 R3 C1 DUT L3 C9 L2 L1 RF OUTPUT RF INPUT C2 C3 R2 C1, C2, C8 — Arco 463 or equivalent C3 — 25 pF, Unelco C4 — 0.1 µF, Ceramic C5 — 1.0 µF, 15 WV Tantalum C6 — 25 pF, Unelco J101 C7 — 25 pF, Unelco J101 C9 — Arco 262 or equivalent C10 — 0.05 µF, Ceramic C11 — 15 µF, 35 WV Electrolytic C6 C7 C8 L1 — 3/4″, #18 AWG into Hairpin L2 — Printed Line, 0.200″ x 0.500″ L3 — 7/8″, #16 AWG into Hairpin L4 — 2 Turns, #16 AWG, 5/16 ID RFC1 — 5.6 µH, Molded Choke RFC2 — VK200–4B R1 — 150 Ω, 1.0 W Carbon R2 — 10 kΩ, 1/2 W Carbon R3 — 120 Ω, 1/2 W Carbon Figure 12. 175 MHz Test Circuit (Class AB) MOTOROLA RF DEVICE DATA MRF141 5 RF POWER MOSFET CONSIDERATIONS MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between the terminals. The metal anode gate structure determines the capacitors from gate–to–drain (Cgd), and gate– to–source (C gs ). The PN junction formed during the fabrication of the MOSFET results in a junction capacitance from drain–to–source (Cds). These capacitances are characterized as input (Ciss), output (Coss) and reverse transfer (Crss) capacitances on data sheets. The relationships between the inter–terminal capacitances and those given on data sheets are shown below. The Ciss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case the numbers are lower. However, neither method represents the actual operating conditions in RF applications. DRAIN Cgd GATE Cds Cgs Ciss = Cgd = Cgs Coss = Cgd = Cds Crss = Cgd SOURCE LINEARITY AND GAIN CHARACTERISTICS In addition to the typical IMD and power gain data presented, Figure 4 may give the designer additional information on the capabilities of this device. The graph represents the small signal unity current gain frequency at a given drain current level. This is equivalent to fT for bipolar transistors. Since this test is performed at a fast sweep speed, heating of the device does not occur. Thus, in normal use, the higher temperatures may degrade these characteristics to some extent. DRAIN CHARACTERISTICS One figure of merit for a FET is its static resistance in the full–on condition. This on–resistance, VDS(on), occurs in the linear region of the output characteristic and is specified under specific test conditions for gate–source voltage and drain current. For MOSFETs, VDS(on) has a positive temperature coefficient and constitutes an important design consideration at high temperatures, because it contributes to the power dissipation within the device. GATE CHARACTERISTICS The gate of the MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The input resistance is very high — on the order of 109 ohms — resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage slightly in excess of the gate–to–source threshold voltage, VGS(th). Gate Voltage Rating — Never exceed the gate voltage rating. Exceeding the rated VGS can result in permanent damage to the oxide layer in the gate region. Gate Termination — The gate of this device is essentially capacitor. Circuits that leave the gate open–circuited or floatMRF141 6 ing should be avoided. These conditions can result in turn– on of the device due to voltage build–up on the input capacitor due to leakage currents or pickup. Gate Protection — This device does not have an internal monolithic zener diode from gate–to–source. If gate protection is required, an external zener diode is recommended. Using a resistor to keep the gate–to–source impedance low also helps damp transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate–drain capacitance. If the gate–to–source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate–threshold voltage and turn the device on. HANDLING CONSIDERATIONS When shipping, the devices should be transported only in antistatic bags or conductive foam. Upon removal from the packaging, careful handling procedures should be adhered to. Those handling the devices should wear grounding straps and devices not in the antistatic packaging should be kept in metal tote bins. MOSFETs should be handled by the case and not by the leads, and when testing the device, all leads should make good electrical contact before voltage is applied. As a final note, when placing the FET into the system it is designed for, soldering should be done with a grounded iron. DESIGN CONSIDERATIONS The MRF141 is an RF Power, MOS, N–channel enhancement mode field–effect transistor (FET) designed for HF and VHF power amplifier applications. Motorola Application Note AN211A, FETs in Theory and Practice, is suggested reading for those not familiar with the construction and characteristics of FETs. The major advantages of RF power MOSFETs include high gain, low noise, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. Power output can be varied over a wide range with a low power dc control signal. DC BIAS The MRF141 is an enhancement mode FET and, therefore, does not conduct when drain voltage is applied. Drain current flows when a positive voltage is applied to the gate. RF power FETs require forward bias for optimum performance. The value of quiescent drain current (IDQ) is not critical for many applications. The MRF141 was characterized at IDQ = 250 mA, each side, which is the suggested minimum value of IDQ. For special applications such as linear amplification, IDQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws no current. Therefore, the gate bias circuit may be just a simple resistive divider network. Some applications may require a more elaborate bias sytem. GAIN CONTROL Power output of the MRF141 may be controlled from its rated value down to zero (negative gain) by varying the dc gate voltage. This feature facilitates the design of manual gain control, AGC/ALC and modulation systems. MOTOROLA RF DEVICE DATA PACKAGE DIMENSIONS A U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. M 1 M Q DIM A B C D E H J K M Q R U 4 R 2 B 3 D K J H C E SEATING PLANE INCHES MIN MAX 0.960 0.990 0.465 0.510 0.229 0.275 0.216 0.235 0.084 0.110 0.144 0.178 0.003 0.007 0.435 ––– 45 _NOM 0.115 0.130 0.246 0.255 0.720 0.730 STYLE 2: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 24.39 25.14 11.82 12.95 5.82 6.98 5.49 5.96 2.14 2.79 3.66 4.52 0.08 0.17 11.05 ––– 45 _NOM 2.93 3.30 6.25 6.47 18.29 18.54 SOURCE GATE SOURCE DRAIN CASE 211–11 ISSUE N MOTOROLA RF DEVICE DATA MRF141 7 Motorola reserves the right to make changes without further notice to any products herein. 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