Order this document by MRF5015/D SEMICONDUCTOR TECHNICAL DATA The RF MOSFET Line N–Channel Enhancement–Mode Designed for broadband commercial and industrial applications at frequencies to 520 MHz. The high gain and broadband performance of this device makes it ideal for large–signal, common source amplifier applications in 12.5 volt mobile, and base station FM equipment. • Guaranteed Performance at 512 MHz, 12.5 Volts Output Power — 15 Watts Power Gain — 10 dB Min Efficiency — 50% Min 15 W, 512 MHz, 12.5 VOLTS N–CHANNEL BROADBAND RF POWER FET • Characterized with Series Equivalent Large–Signal Impedance Parameters • S–Parameter Characterization at High Bias Levels • Excellent Thermal Stability • All Gold Metal for Ultra Reliability • Capable of Handling 20:1 VSWR, @ 15.5 Vdc, 512 MHz, 2 dB Overdrive • Circuit board photomaster available upon request by contacting RF Tactical Marketing in Phoenix, AZ. CASE 319–07, STYLE 3 MAXIMUM RATINGS Rating Symbol Value Unit Drain–Source Voltage VDSS 36 Vdc Drain–Gate Voltage (RGS = 1 MΩ) VDGR 36 Vdc VGS ± 20 Vdc Gate–Source Voltage Drain Current — Continuous ID 6 Adc Total Device Dissipation @ TC = 25°C Derate above 25°C PD 50 0.29 Watts W/°C Storage Temperature Range Tstg – 65 to +150 °C TJ 200 °C Symbol Max Unit RθJC 3.5 °C/W Operating Junction Temperature THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction to Case ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Drain–Source Breakdown Voltage (VGS = 0, ID = 5 mAdc) V(BR)DSS 36 — — Vdc Zero Gate Voltage Drain Current (VDS = 15 Vdc, VGS = 0) IDSS — — 5 mAdc Gate–Source Leakage Current (VGS = 20 Vdc, VDS = 0) IGSS — — 2 µAdc OFF CHARACTERISTICS (continued) NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. REV 6 RF DEVICE DATA MOTOROLA Motorola, Inc. 1994 MRF5015 1 ELECTRICAL CHARACTERISTICS — continued (TC = 25°C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Gate Threshold Voltage (VDS = 10 Vdc, ID = 10 mAdc) VGS(th) 1.25 2.3 3.5 Vdc Drain–Source On–Voltage (VGS = 10 Vdc, ID = 1 Adc) VDS(on) — — 0.375 Vdc Forward Transconductance (VDS = 10 Vdc, ID = 1 Adc ) gfs 1.2 — — S Input Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Ciss — 33 — pF Output Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Coss — 74 — pF Reverse Transfer Capacitance (VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Crss 7 8.8 10.8 pF 10 — 11.5 15 — — 50 — 55 55 — — ON CHARACTERISTICS DYNAMIC CHARACTERISTICS FUNCTIONAL TESTS (In Motorola Test Fixture) Common–Source Amplifier Power Gain (VDD = 12.5 Vdc, Pout = 15 W, IDQ = 100 mA) f = 512 MHz f = 175 MHz Gps Drain Efficiency (VDD = 12.5 Vdc, Pout = 15 W, IDQ = 100 mA) f = 512 MHz f = 175 MHz η + C1 R2 Z2 + C2 C11 L1 Z6 Z3 L2 DUT Z7 Z9 Z8 C8 C7 Z5 VDD C13 Socket R3 C5 B1, B2 C1, C13 C2, C12 C3, C4, C10, C11 C5, C9 C6 C7 C8 L1, L2 N1, N2 R1 R2 B1 C12 C3 Z4 C4 No Degradation in Output Power B1 R1 VGG Z1 % ψ Load Mismatch (VDD = 15.5 Vdc, 2 dB Overdrive, f = 512 MHz, Load VSWR = 20:1, All Phase Angles at Frequency of Test) RF N1 Input dB Z10 C10 Z11 N2 RF Output C9 C6 Ferrite Bead, Fair Rite Products 10 µF, 50 V, Electrolytic 0.1 µF, Chip Capacitor 120 pF, Chip Capacitor 0 to 20 pF, Trimmer Capacitor 36 pF, Chip Capacitor 43 pF, Chip Capacitor 30 pF, Chip Capacitor 7 Turns, 24 AWG 0.116″ ID Type N Flange Mount 1 kΩ, 1/4 W, Carbon 470 kΩ, 1/4 W, Carbon R3 Z1, Z11 Z2 Z3 Z4 Z5 Z6 Z7, Z8 Z9 Z10 Board 160 Ω, 0.1 W Chip Transmission Line* Transmission Line* Transmission Line* Transmission Line* Transmission Line* Transmission Line* Transmission Line+ Transmission Line* Transmission Line* Glass Teflon 0.060″ + Part of Capacitor Mount Socket *See Photomaster Figure 1. 512 MHz Narrowband Test Circuit Electrical Schematic MRF5015 2 MOTOROLA RF DEVICE DATA TYPICAL CHARACTERISTICS 25 25 20 520 MHz 15 10 VDD = 12.5 V IDQ = 100 mA 5 0 20 1W 15 0.5 W 10 5 0 0 0.5 1 1.5 Pin, INPUT POWER (WATTS) 2 6 2.5 Figure 2. Output Power versus Input Power 8 10 12 VDD, SUPPLY VOLTAGE (VOLTS) 16 14 Figure 3. Output Power versus Supply Voltage 25 2 VDD = 12.5 V Pin = 1.5 W f = 520 MHz 20 1.8 I D , DRAIN CURRENT (AMPS) Pout , OUTPUT POWER (WATTS) Pin = 1.5 W IDQ = 100 mA f = 520 MHz 470 MHz Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS) f = 400 MHz Typical Device Shown 15 10 VDS = 10 V 1.6 1.4 1.2 1 0.8 0.6 Typical Device Shown 0.4 0.2 0 1 2 3 4 5 C, CAPACITANCE (pF) 1 2 3 4 VGS, GATE–SOURCE VOLTAGE (VOLTS) Figure 4. Output Power versus Gate Voltage Figure 5. Drain Current versus Gate Voltage VGS = 0 f = 1 MHz 150 Coss 50 Ciss Crss 0 0 0 VGS, GATE–SOURCE VOLTAGE (VOLTS) 200 100 0 6 VGS , GATE-SOURCE VOLTAGE (NORMALIZED) 5 5 25 15 20 10 VDS, DRAIN–SOURCE VOLTAGE (VOLTS) Figure 6. Capacitance versus Voltage MOTOROLA RF DEVICE DATA 30 1.04 1.03 VDD = 12.5 V ID = 1.5 A 1.02 ID = 1 A 1.01 1.00 0.99 0.98 0.97 0.96 ID = 0.05 A 0.95 0.94 – 25 0 25 ID = 0.5 A ID = 0.25 A 100 125 50 75 TC, CASE TEMPERATURE (°C) 150 175 Figure 7. Gate–Source Voltage versus Case Temperature MRF5015 3 TYPICAL CHARACTERISTICS I D , DRAIN CURRENT (AMPS) 10 TC = 25°C 1 0.1 1 10 100 VDS, DRAIN–SOURCE VOLTAGE (VOLTS) Figure 8. DC Safe Operating Area VDD = 12.5 V, IDQ = 100 mA, Pout = 15 W f (MHz) Zin (Ω) ZOL* (Ω) 400 2.0 – j6.1 1.3 – j0.4 420 1.8 – j5.3 1.4 – j0.4 440 1.6 – j4.7 1.5 – j0.4 460 1.5 – j4.2 1.5 – j0.3 480 1.4 – j3.8 1.5 – j0.2 500 1.3 – j3.6 1.4 – j0.1 520 1.2 – j3.5 1.3 + j0.1 520 ZOL* 460 f = 400 MHz Zo = 10 Ω Zin 520 460 = Conjugate of source impedance with parallel 160 Ω resistor and 36 pF capacitor in series with gate. ZOL* = Conjugate of the load impedance at given output power, voltage and frequency that produces maximum gain. Zin f = 400 MHz Figure 9. Series Equivalent Input and Output Impedance MRF5015 4 MOTOROLA RF DEVICE DATA Table 1. Common Source Scattering Parameters (VDS = 12.5 V) ID = 50 mA f MHz 50 100 200 300 400 500 700 850 1000 S11 S21 ∠φ |S11| 0.63 0.62 0.70 0.78 0.84 0.88 0.93 0.95 0.96 –123 –142 –152 –157 –162 –165 –171 –175 –178 S12 ∠φ |S21| 8 4 1.8 1.1 0.70 0.49 0.28 0.20 0.15 100 82 61 47 36 28 17 13 10 S22 ∠φ |S12| 0.063 0.063 0.056 0.046 0.037 0.029 0.016 0.010 0.007 11 –6 – 23 – 35 – 42 – 46 – 45 – 31 11 ∠φ |S22| 0.79 0.82 0.86 0.90 0.93 0.94 0.97 0.97 0.98 –149 –162 –169 –171 –174 –175 –179 179 178 ID = 100 mA f MHz 50 100 200 300 400 500 700 850 1000 S11 S21 ∠φ |S11| 0.67 0.66 0.71 0.77 0.82 0.86 0.91 0.93 0.95 –136 –153 –160 –163 –165 –168 –173 –176 –179 S12 ∠φ |S21| 9.1 4.6 2.2 1.3 0.89 0.64 0.37 0.27 0.20 99 84 66 54 44 36 25 20 16 S22 ∠φ |S12| 0.047 0.048 0.043 0.037 0.031 0.025 0.015 0.010 0.009 10 –3 –17 – 26 – 32 – 35 – 30 –11 25 ∠φ |S22| 0.82 0.85 0.87 0.90 0.92 0.94 0.96 0.97 0.98 –158 –168 –172 –174 –175 –177 –179 179 177 ID = 500 mA f MHz 50 100 200 300 400 500 700 850 1000 S11 S21 ∠φ |S11| 0.81 0.81 0.82 0.84 0.86 0.88 0.91 0.93 0.94 –150 –164 –170 –173 –174 –175 –178 180 178 S12 ∠φ |S21| 11.1 5.6 2.7 1.7 1.2 0.92 0.57 0.43 0.33 98 86 73 63 55 47 35 29 23 S22 ∠φ |S12| 0.027 0.027 0.025 0.023 0.020 0.018 0.013 0.013 0.014 11 2 –5 –9 –9 –7 7 26 44 ∠φ |S22| 0.85 0.87 0.88 0.89 0.91 0.92 0.94 0.95 0.96 –168 –174 –176 –177 –178 –179 180 178 177 ID = 2.5 A f MHz 50 100 200 300 400 500 700 850 1000 S11 |S11| 0.86 0.85 0.86 0.87 0.89 0.91 0.93 0.94 0.95 S21 ∠φ –144 –161 –170 –173 –175 –176 –179 179 177 MOTOROLA RF DEVICE DATA |S21| 10.1 5.2 2.5 1.6 1.1 0.84 0.52 0.39 0.30 S12 ∠φ 101 88 74 64 55 48 37 30 26 |S12| 0.022 0.022 0.021 0.019 0.017 0.015 0.013 0.014 0.016 S22 ∠φ 15 5 –1 –4 –2 2 22 39 52 |S22| 0.85 0.87 0.89 0.90 0.91 0.93 0.95 0.96 0.96 ∠φ –171 –175 –177 –178 –178 –179 179 178 176 MRF5015 5 DESIGN CONSIDERATIONS GATE CHARACTERISTICS The MRF5015 is a common–source, RF power, N–Channel enhancement mode, Metal–Oxide Semiconductor Field– Effect Transistor (MOSFET). Motorola RF MOSFETs feature a vertical structure with a planar design. Motorola Application Note AN211A, “FETs in Theory and Practice,” is suggested reading for those not familiar with the construction and characteristics of FETs. This device was designed primarily for 12.5 volt VHF and UHF power amplifier applications. The major advantages of RF power MOSFETs include high gain, simple bias systems, relative immunity from thermal runaway, and the ability to withstand severely mismatched loads without suffering damage. MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between all three terminals. The metal oxide gate structure determines the capacitors from gate–to–drain (Cgd), and gate–to–source (C gs). The PN junction formed during fabrication of the RF MOSFET results in a junction capacitance from drain–to–source (C ds). These capacitances are characterized as input (C iss), output (C oss) and reverse transfer (C rss) capacitances on data sheets. The relationships between the inter–terminal capacitances and those given on data sheets are shown below. The C iss can be specified in two ways: 1. Drain shorted to source and positive voltage at the gate. 2. Positive voltage of the drain in respect to source and 2. zero volts at the gate. In the latter case, the numbers are lower. However, neither method represents the actual operating conditions in RF applications. Drain Cgd Gate Cds Ciss = Cgd + Cgs Coss = Cgd + Cds Crss = Cgd Cgs Source The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The input resistance is very high, on the order of 109 Ω, resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage to the gate greater than the gate–to–source threshold voltage, V GS(th). Gate Voltage Rating – Never exceed the gate voltage rating. Exceeding the rated V GS can result in permanent damage to the oxide layer in the gate region. Gate Termination – The gates of these devices are essentially capacitors. Circuits that leave the gate open–circuited or floating must be avoided. These conditions can result in turn–on of the devices due to voltage build–up on the input capacitor due to leakage currents or pickup. Gate Protection – These devices do not have an internal monolithic zener diode from gate–to–source. If gate protection is required, an external zener diode is recommended with appropriate RF decoupling networks. Using a resistor to keep the gate–to–source impedance low also helps dampen transients and serves another important function. Voltage transients on the drain can be coupled to the gate through the parasitic gate–drain capacitance. If the gate–to–source impedance and the rate of voltage change on the drain are both high, then the signal coupled to the gate may be large enough to exceed the gate–threshold voltage and turn the device on. DC BIAS Since the MRF5015 is an enhancement mode FET, drain current flows only when the gate is at a higher potential than the source. See Figure 5 for a typical plot of drain current versus gate voltage. RF power FETs operate optimally with a quiescent drain current (I DQ), whose value is application dependent. The MRF5015 was characterized at I DQ = 100 mA, which is the suggested value of bias current for typical applications. For special applications such as linear amplification, I DQ may have to be selected to optimize the critical parameters. The gate is a dc open circuit and draws essentially no current. Therefore, the gate bias circuit may generally be just a simple resistive divider network. Some special applications may require a more elaborate bias system. DRAIN CHARACTERISTICS GAIN CONTROL One critical figure of merit for a FET is its static resistance in the full–on condition. This on–resistance, R ds(on), occurs in the linear region of the output characteristic and is specified at a specific gate–source voltage and drain current. The drain–source voltage under these conditions is termed V ds(on). For MOSFETs, V ds(on) has a positive temperature coefficient at high temperatures because it contributes to the power dissipation within the device. Power output of the MRF5015 may be controlled to some degree with a low power dc control signal applied to the gate, thus facilitating applications such as manual gain control, ALC/AGC and modulation systems. Figure 4 is an example of output power variation with gate–source bias voltage with Pin held constant. This characteristic is very dependent on frequency and load line. MRF5015 6 MOTOROLA RF DEVICE DATA AMPLIFIER DESIGN Impedance matching networks similar to those used with bipolar transistors are suitable for the MRF5015. For examples see Motorola Application Note AN721, “Impedance Matching Networks Applied to RF Power Transistors.” Both small–signal S–parameters and large–signal impedances are provided. While the S–parameters will not produce an exact design solution for high power operation, they do yield a good first approximation. This is an additional advantage of RF power MOSFETs. Since RF power MOSFETs are triode devices, they are not unilateral. This coupled with the very high gain of MRF5015 MOTOROLA RF DEVICE DATA yield a device quite capable of self oscillation. Stability may be achieved by techniques such as drain loading, input shunt resistive loading, or output to input feedback. Different stabilizing techniques may be required depending on the desired gain and bandwidth of the application. The RF test fixture implements a parallel resistor and capacitor in series with the gate to improve stability and input impedance Q. Two port stability analysis with the MRF5015 S–parameters provides a useful tool for selection of loading or feedback circuitry to assure stable operation. See Motorola Application Note AN215A, “RF Small–Signal Design Using Two–Port Parameters,” for a discussion of two port network theory and stability. MRF5015 7 PACKAGE DIMENSIONS Q 2 PL -AL IDENTIFICATION NOTCH 6 5 0.15 (0.006) M T A M N M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 4 -N1 2 3 K F D 2 PL 0.38 (0.015) M B 0.38 (0.015) T A M N M T A M M N M DIM A B C D E F H J K L N Q INCHES MIN MAX 0.965 0.985 0.355 0.375 0.230 0.260 0.115 0.125 0.102 0.114 0.075 0.085 0.160 0.170 0.004 0.006 0.090 0.110 0.725 BSC 0.225 0.241 0.125 0.135 MILLIMETER MIN MAX 24.52 25.01 9.02 9.52 5.85 6.60 2.93 3.17 2.59 2.90 1.91 2.15 4.07 4.31 0.11 0.15 2.29 2.79 18.42 BSC 5.72 6.12 3.18 3.42 J C H E -T- SEATING PLANE STYLE 3: PIN 1. 2. 3. 4. 5. 6. SOURCE (COMMON) GATE (INPUT) SOURCE (COMMON) SOURCE (COMMON) DRAIN (OUTPUT) SOURCE (COMMON) CASE 319–07 ISSUE M Motorola reserves the right to make changes without further notice to any products herein. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] – TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MRF5015 8 ◊ *MRF5015/D* MRF5015/D MOTOROLA RF DEVICE DATA