MOTOROLA MC100E457FN

SEMICONDUCTOR TECHNICAL DATA
The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully
differential data path makes the device ideal for multiplexing low skew
clock or other skew sensitive signals. Multiple VBB pins are provided to
ease AC coupling input signals.
The higher frequency outputs provide the device with a >1.0GHz
bandwidth to meet the needs of the most demanding system clock.
Both, separate selects and a common select, are provided to make the
device well suited for both data path and random logic applications.
The differential inputs have internal clamp structures which will force
the Q output of a gate in an open input condition to go to a LOW state.
Thus, inputs of unused gates can be left open and will not affect the
operation of the rest of the device. Note that the input clamp will take
affect only if both inputs fall 2.5V below VCC.
•
•
•
•
•
•
TRIPLE DIFFERENTIAL
2:1 MULTIPLEXER
Differential D and Q; VBB available
700ps Max. Propagation Delay
High Frequency Outputs
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
Separate and Common Select
Extended 100E VEE Range of –4.2V to –5.46V
Internal 75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC (Top View)
PIN NAMES
Pin
Dn[0:2]; Dn[0:2]
SEL
COMSEL
VBB
Q[0:2], Q[0:2]
Function
Differential Data Inputs
Individual Select Input
Common Select Input
VBB Reference Output
Differential Data Outputs
FUNCTION TABLE
SEL
Data
H
L
a
b
SEL2
D2a
D2a
VBB
D2b
D2b COMSEL
25
24
23
22
21
20
19
SEL1
26
18
Q2
D1a
27
17
Q2
D1a
28
16
VCC
VEE
1
15
Q1
VBB
2
14
Q1
D1b
3
13
Q0
D1b
4
12
Q0
5
6
7
8
9
SEL0
D0a
D0a
VBB
D0b
10
11
D0b VCCO
* All VCC and VCCO pins are tied together on the die.
12/93
 Motorola, Inc. 1996
2–1
REV 2
MC10E457 MC100E457
LOGIC DIAGRAM
D0a
D0a
H
D0b
D0b
L
Q0
2:1
MUX
Q0
SEL0
D1a
D1a
H
D1b
D1b
L
Q1
2:1
MUX
Q1
SEL1
D2a
D2a
H
Q2
2:1
MUX
D2b
D2b
Q2
L
SEL2
COMSEL
VBB
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = VCCO = GND)
–40°C
Symbol
VBB
Characteristic
Min
Output Reference
Voltage
10E
100E
–1.43
–1.38
IIH
Input HIGH
Current
IEE
Power Supply
Current
10E
100E
VPP(DC)
VCMR
Typ
0°C
Max
Min
–1.30
–1.26
–1.38
–1.38
Typ
25°C
Max
Min
–1.27
–1.26
–1.35
–1.38
Typ
85°C
Max
Min
–1.25
–1.26
–1.31
–1.38
Typ
Max
Unit
Cond
V
150
150
–1.19
–1.26
150
150
µA
mA
92
92
Input Sensitivity
50
Commom Mode
Range
–1.5
110
110
92
92
110
110
50
0
92
92
110
110
50
–1.5
0
–1.5
92
106
110
127
50
0
–1.5
0
mV
1
V
2
1. Differential input voltage required to obtain a full ECL swing on the outputs.
2. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level
must be such that the peak to peak voltage is less than 1.0 V and greater than or equal to VPP(min).
MOTOROLA
2–2
ECLinPS and ECLinPS Lite
DL140 — Rev 4
MC10E457 MC100E457
AC CHARACTERISTICS (VEE = VEE (min) to VEE (max); VCC = VCCO = GND)
0°C
Symbol
Characteristic
Min
tPLH
tPHL
Propagation Delay to Output
D (Differential)
D (Single-Ended)
SEL
COMSEL
tskew
tskew
Within-Device Skew
VPP(AC)
tr/tf
Minimum Input Swing
150
Rise/Fall Time
125
Duty Cycle Skew
Typ
0°C to 85°C
Max
Min
Typ
Max
Unit
Condition
ps
325
275
300
325
tPLH – tPHL
475
475
500
525
700
750
775
800
375
325
350
375
475
475
500
525
650
700
725
750
40
40
ps
1
±10
±10
ps
2
150
275
500
150
275
450
mV
3
ps
20–80%
1. Within-device skew is defined as identical transitions on similar paths through a device.
2. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point
of the outputs.
3. Minimum input swing for which AC parameters are guaranteed.
ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–3
MOTOROLA
MC10E457 MC100E457
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 776–02
ISSUE D
0.007 (0.180)
B
Y BRK
-N-
T L –M
M
U
0.007 (0.180)
X
G1
M
S
N
T L –M
S
S
N
S
D
Z
-L-
-M-
D
W
28
V
1
C
A
0.007 (0.180)
M
R
0.007 (0.180)
M
T L –M
S
T L –M
S
N
S
N
S
H
S
N
S
0.007 (0.180)
M
T L –M
N
S
S
0.004 (0.100)
G
J
-T-
K
SEATING
PLANE
F
VIEW S
G1
T L –M
S
N
0.007 (0.180)
M
T L –M
S
N
S
VIEW S
S
NOTES:
1. DATUMS -L-, -M-, AND -N- DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
2. DIM G1, TRUE POSITION TO BE MEASURED
AT DATUM -T-, SEATING PLANE.
3. DIM R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKAGE BOTTOM BY UP TO 0.012
(0.300). DIMENSIONS R AND U ARE
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR
BURRS, GATE BURRS AND INTERLEAD
FLASH, BUT INCLUDING ANY MISMATCH
BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).
MOTOROLA
T L –M
K1
E
S
S
VIEW D-D
Z
0.010 (0.250)
0.010 (0.250)
2–4
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
INCHES
MIN
MAX
0.485 0.495
0.485 0.495
0.165 0.180
0.090 0.110
0.013 0.019
0.050 BSC
0.026 0.032
0.020
—
0.025
—
0.450 0.456
0.450 0.456
0.042 0.048
0.042 0.048
0.042 0.056
—
0.020
2°
10°
0.410 0.430
0.040
—
MILLIMETERS
MIN
MAX
12.32 12.57
12.32 12.57
4.20
4.57
2.29
2.79
0.33
0.48
1.27 BSC
0.66
0.81
0.51
—
0.64
—
11.43
11.58
11.43
11.58
1.07
1.21
1.07
1.21
1.07
1.42
—
0.50
2°
10°
10.42 10.92
1.02
—
ECLinPS and ECLinPS Lite
DL140 — Rev 4
MC10E457 MC100E457
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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◊
ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–5
*MC10E457/D*
MC10E457/D
MOTOROLA