MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1:9 Differential Clock Driver MC10E111 MC100E111 The MC10E/100E111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. It accepts one signal input, which can be either differential or else single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs. An enable input is also provided. A HIGH disables the device by forcing all Q outputs LOW and all Q outputs HIGH. • • • • • • • Low Skew Guarateed Skew Spec Differential Design VBB Output Enable Extended 100E VEE Range of –4.2 to –5.46V 75kΩ Input Pulldown Resistors 1:9 DIFFERENTIAL CLOCK DRIVER The device is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate skew within-device, and empirical modeling is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into 50Ω, even if only one side is being used. In most applications, all nine differential pairs will be used and therefore terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side (i.e. sharing the same VCCO) as the pair(s) being used on that side, in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10–20ps) of the output(s) being used which, while not being catastrophic to most designs, will mean a loss of skew margin. FN SUFFIX PLASTIC PACKAGE CASE 776-02 LOGIC SYMBOL Q0 Q0 PIN NAMES Pin Function IN, IN EN Q0, Q0–Q8, Q8 VBB Q1 Q1 Differential Input Pair Enable Differential Outputs VBB Output Q2 Q2 Q0 Q0 Q1 VCCO Q1 Q2 Q2 25 24 23 20 19 22 21 Q3 Q3 IN VEE 26 18 Q3 IN EN 27 17 Q3 EN IN 28 16 Q4 15 VCCO Pinout: 28-Lead PLCC (Top View) VCC 1 IN 2 14 Q4 VBB 3 13 Q5 NC 4 12 Q5 5 6 7 Q8 Q8 Q7 8 9 VCCO Q7 10 11 Q6 Q6 2–1 Q5 Q5 Q6 Q6 Q7 Q7 VBB 5/95 Motorola, Inc. 1996 Q4 Q4 REV 3 Q8 Q8 MC10E111 MC100E111 DC CHARACTERISTICS (VEE = VEE (min) to VEE (max); VCC = VCCO = GND) –40°C Symbol VBB Characteristic Output Reference Voltage 10E 100E IIH Input HIGH Current IEE Power Supply Current 10E 100E VPP(DC) VCMR Min Typ 0°C Max Min 25°C Typ Max Min 85°C Typ Max Min Typ Max Unit Cond V –1.43 –1.38 –1.30 –1.26 –1.38 –1.38 –1.27 –1.26 150 –1.35 –1.38 –1.25 –1.26 150 –1.31 –1.38 –1.19 –1.26 150 150 µA mA 48 48 Input Sensitivity 50 Commom Mode Range –1.6 60 60 48 48 60 60 48 48 50 –0.4 60 60 50 –1.6 –0.4 48 55 60 69 50 –1.6 –0.4 –1.6 –0.4 mV 1 V 2 1. Differential input voltage required to obtain a full ECL swing on the outputs. 2. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level must be such that the peak to peak voltage is less than 1.0 V and greater than or equal to VPP(min). AC CHARACTERISTICS (VEE = VEE (min) to VEE (max); VCC = VCCO = GND) –40°C Symbol Typ 0°C Max Min 680 780 900 900 460 410 450 450 Typ 25°C Max Min 560 610 850 850 480 430 450 450 Typ 85°C Characteristic Min Max Min 580 630 850 850 510 460 450 450 Typ Max Unit Cond tPLH tPHL Propagation Delay to Output IN (Diff) IN (SE) Enable Disable 380 280 400 400 ts tH Setup Time EN to IN 250 0 200 0 200 0 200 0 ps 5 Hold Time IN to EN 50 –200 0 –200 0 –200 0 –200 ps 6 tR tskew Release Time EN to IN 350 100 300 100 300 100 300 100 ps 7 ps 4 VPP(AC) tr, tf Minimum Input Swing 250 mV 8 Rise/Fall Time 250 ps Within-Device Skew 25 75 25 50 250 450 650 275 25 50 250 375 600 275 610 660 850 850 25 50 250 375 600 275 375 600 1 2 3 3 ps 1. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential output signals. See Definitions and Testing of ECLinPS AC Parameters in Chapter 1 (page 1–12) of the Motorola High Performance ECL Data Book (DL140/D). 2. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal. See Definitions and Testing of ECLinPS AC Parameters in Chapter 1 (page 1–12) of the Motorola High Performance ECL Data Book (DL140/D). 3. Enable is defined as the propagation delay from the 50% point of a negative transition on EN to the 50% point of a positive transition on Q (or a negative transition on Q). Disable is defined as the propagation delay from the 50% point of a positive transition on EN to the 50% point of a negative transition on Q (or a positive transition on Q). 4. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device. 5. The setup time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than ±75 mV to that IN/IN transition (see Figure 1). 6. The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going IN to prevent an output response greater than ±75 mV to that IN/IN transition (see Figure 2). 7. The release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets the specified IN to Q propagation delay and output transition times (see Figure 3). 8. VPP(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The VPP(min) is AC limited for the E111 as a differential input as low as 50 mV will still produce full ECL levels at the output. MOTOROLA 2–2 ECLinPS and ECLinPS Lite DL140 — Rev 4 MC10E111 MC100E111 IN IN ts EN 50% ≤75mV Q Q ≤75mV Figure 1. Setup Time IN IN th EN 50% ≤75mV Q Q ≤75mV Figure 2. Hold Time IN IN tr EN 50% Q Q Figure 3. Release Time ECLinPS and ECLinPS Lite DL140 — Rev 4 2–3 MOTOROLA MC10E111 MC100E111 OUTLINE DIMENSIONS FN SUFFIX PLASTIC PLCC PACKAGE CASE 776–02 ISSUE D 0.007 (0.180) B Y BRK -N- T L –M M U 0.007 (0.180) X G1 M S N T L –M S S N S D Z -L- -M- D W 28 V 1 C A 0.007 (0.180) M R 0.007 (0.180) M T L –M S T L –M S N S N S H S N S 0.007 (0.180) M T L –M N S S 0.004 (0.100) G J -T- K SEATING PLANE F VIEW S G1 T L –M S N 0.007 (0.180) M T L –M S N S VIEW S S NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIM G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 3. DIM R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). MOTOROLA T L –M K1 E S S VIEW D-D Z 0.010 (0.250) 0.010 (0.250) 2–4 DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 — 0.025 — 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 — 0.020 2° 10° 0.410 0.430 0.040 — MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.57 4.20 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 — 0.64 — 11.58 11.43 11.43 11.58 1.07 1.21 1.07 1.21 1.42 1.07 — 0.50 2° 10° 10.42 10.92 1.02 — ECLinPS and ECLinPS Lite DL140 — Rev 4 MC10E111 MC100E111 Motorola reserves the right to make changes without further notice to any products herein. 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