54ACT112 Dual JK Negative Edge-Triggered Flip-Flop General Description The ’ACT112 contains two independent, high-speed JK flip-flops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Triggering occurs at a voltage level of the clock and is not directly related to the transition time. The J and K inputs can change when the clock is in either state without affecting the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. A LOW signal on SD or CD prevents clocking and forces Q or Q HIGH, respectively. Simultaneous LOW signals on SD and CD force both Q and Q HIGH. Connection Diagram Asynchronous Inputs: LOW input to SD sets Q to HIGH level LOW input to CD sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH Features n ’ACT112 has TTL-compatible inputs n Outputs source/sink 24 mA n Standard Microcircuit Drawing (SMD) 5962-8995001 Pin Descriptions Pin Names Pin Assigment for DIP and Flatpack Description J1, J2, K1, K2 Data Inputs CP1, CP2 Clock Pulse Inputs (Active Falling Edge) CD1, CD2 Direct Clear Inputs (Active LOW) SD1, SD2 Direct Set Inputs (Active LOW) Q1, Q2, Q1, Q2 Outputs DS100976-3 Pin Assigment for LCC DS100976-5 FACT™ is a trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100976 www.national.com 54ACT112 Dual JK Negative Edge-Triggered Flip-Flop September 1998 Logic Symbols DS100976-2 DS100976-1 IEEE/IEC DS100976-4 Truth Table Inputs Outputs SD CD CP J K Q L H X X X H L H L X X X L H Q L L X X X H H H H M h h Q0 Q0 H H M l h L H H H M h l H L H H M l l Q0 Q0 H (h) = HIGH Voltage Level L (l) = LOW Voltage Level X = Immaterial M = HIGH-to-LOW Clock Transition Q0 (Q0) = Before HIGH-to-LOW Transition of Clock Lower case letters indicate the state of the referenced input or output one setup time prior to the HIGH-to-LOW clock transition. www.national.com 2 Logic Diagram (One Half Shown) DS100976-6 3 www.national.com Absolute Maximum Ratings (Note 1) Junction Temperature (TJ) CDIP If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + O.5 DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) 175˚C Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (∆V/∆t) VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC +0.5V 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT™ circuits outside databook specifications. ± 50 mA ± 50 mA −65˚C to +150˚C DC Characteristics for ’ACT Family Devices Symbol VIH VIL VOH Parameter VCC TA = −55˚C to +125˚C (V) Guaranteed Limits Minimum High Level 4.5 2.0 Input Voltage 5.5 2.0 Maximum Low Level 4.5 0.8 Input Voltage 5.5 0.8 Minimum High Level 4.5 4.4 Output Voltage 5.5 5.4 4.5 3.70 5.5 4.70 Maximum Low Level 4.5 0.1 Output Voltage 5.5 0.1 4.5 0.5 5.5 0.5 5.5 ± 1.0 Units V Conditions VOUT = 0.1V or VCC − 0.1V V VOUT = 0.1V or VCC − 0.1V V IOUT = −50 µA VIN = VIL or VIH V IOH = −24 mA IOH = −24 mA (Note 2) VOL V IOUT = 50 µA VIN = VIL or VIH V IOL = 24 MA IOL = 24 mA (Note 2) IIN Maximum Input Leakage Current µA VI = VCC, GND ICCT Maximum ICC/Input 5.5 1.6 mA VI = VCC − 2.1V IOLD Minimum Dynamic 5.5 50 mA VOLD = 1.65V Max IOHD Output Current(Note 3) 5.5 −50 mA VOHD = 3.85V Min ICC Maximum Quiescent Supply Current 5.5 80.0 µA VIN = VCC or GND Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. www.national.com 4 AC Electrical Characteristics for ’ACT Family Devices Symbol fmax Parameter Maximum Clock VCC TA = −55˚C to +125˚C (V) CL = 50 pF Units (Note 4) Min Max 5.0 80 5.0 1.0 14.0 ns 5.0 1.0 14.0 ns 5.0 1.0 13.5 ns 5.0 1.0 13.5 ns MHz Frequency tPLH Propagation Delay CPn to Qn or Qn tPHL Propagation Delay CPn to Qn or Qn tPLH Propagation Delay CDn or SDn to Qn or Qn tPHL Propagation Delay CDn or SDn to Qn or Qn Note 4: Voltage Range 5.0 is 5.0V ± 0.5V AC Operating Requirements: Symbol tS Parameter Setup Time, HIGH or LOW VCC TA = −55˚C to +125˚C (V) CL = 50 pF (Note 5) Guaranteed Minimum 5.0 8.0 ns 5.0 1.5 ns 5.0 5.0 ns 5.0 3.0 ns Units Jn or Kn to CPn tH Hold Time, HIGH or LOW Jn or Kn to CPn tW Pulse Width CPn or CDn or SDn trec Recovery Time CDn or SDn to CPn Note 5: Voltage Range 5.0 is 5.0V ± 0.5V Capacitance Symbol Parameter CIN Input Capacitance CPD Power Dissipation Capacitance 5 Max Units 10.0 pF 60 pF Conditions VCC = OPEN VCC = 5.0V www.national.com Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Ceramic Dual-in-line Package Number J16A 16-Lead Cerpack Package Number W16A www.national.com 6 54ACT112 Dual JK Negative Edge-Triggered Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Ceramic Leadless Chip Carrier Package Number E20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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