19-4305; Rev 0; 10/08 KIT ATION EVALU E L B A IL AVA Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies o Dual Quick-PWM o Preset 5V and 3.3V Outputs o Internal 100mA, 5V Linear Regulator o Internal OUT1 LDO5 Bypass Switch o Secondary Feedback (SKIP Input) Maintains Charge Pump o 3.3V, 5mA Real-Time Clock (RTC) Power (Always On) o 2V ±1% 50µA Reference o 6V to 24V Input Range o Pulse-Skipping/Forced-PWM/Ultrasonic Mode Control o Independent SMPS and LDO5 Enable Controls o Combined SMPS PGOOD Outputs o Minimal Component Count Ordering Information PART TEMP RANGE PIN-PACKAGE MAX17031ETG+ -40°C to +85°C 24 TQFN-EP* +Denotes a lead-free/RoHS-compliant package. *EP = Exposed pad. GND VDD DL1 BST1 TOP VIEW DL2 Pin Configuration BST2 The MAX17031 is a dual Quick-PWM™ step-down power-supply (SMPS) controller with synchronous rectification, intended for main 5V/3.3V power generation in battery-powered systems. Low-side MOSFET sensing provides a simple low-cost, highly efficient current sense for valley current-limit protection. Combined with the output overvoltage and undervoltage protection features, this current limit ensures robust output supplies. The 5V/3.3V SMPS outputs can save power by operating in pulse-skipping mode or in ultrasonic mode to avoid audible noise. Ultrasonic mode forces the controller to maintain switching frequencies greater than 20kHz at light loads. The SKIP input also has an accurate logic threshold, allowing it to be used as a secondary feedback input to refresh an external charge pump or secondary winding without overcharging the output voltages. An internal 100mA linear regulator generates the 5V bias needed for power-up or other low-power “alwayson” suspend supplies. An internal bypass circuitry allows automatic bypassing of the linear regulator when the 5V SMPS is active. The device includes independent shutdown controls with well-defined logic thresholds to simplify power-up and power-down sequencing. To prevent current surges at startup, the internal voltage target is slowly ramped up from zero to the final target over a 1ms period. To prevent the output from ringing below ground in shutdown, the internal voltage target is ramped down from its previous value to zero over a 1ms period. A combined power-good (PGOOD) output simplifies the interface with external controllers. The MAX17031 is available in a 24-pin thin QFN (4mm x 4mm) package. Features 18 17 16 15 14 13 LX2 19 12 LX1 DH2 20 11 DH1 Notebook Computers ON2 21 10 ON1 Ultra-Mobile PC SKIP 22 9 PGOOD Main System Supply (5V and 3.3V Supplies) OUT2 23 8 ILIM1 7 OUT1 3 4 5 6 LDO5 2 IN 1 RTC ILIM2 24 VCC Telecommunication *EP + ONLDO 2 to 4 Li+ Cells Battery-Powered Devices MAX17031 REF Applications THIN QFN 4mm × 4mm Quick-PWM is a trademark of Maxim Integrated Products, Inc. *EXPOSED PAD. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX17031 General Description MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies ABSOLUTE MAXIMUM RATINGS IN to GND ...............................................................-0.3V to +28V VDD, VCC to GND .....................................................-0.3V to +6V RTC, LDO5, ONLDO to GND ...................................-0.3V to +6V OUT2 to GND ...........................................................-0.3V to +6V ON1, ON2, PGOOD to GND.....................................-0.3V to +6V OUT1 to GND..........................................-0.3V to (VLDO5 + 0.3V) SKIP to GND...............................................-0.3V to (VCC + 0.3V) REF, ILIM1, ILIM2 to GND ..........................-0.3V to (VCC + 0.3V) DL_ to GND ................................................-0.3V to (VDD + 0.3V) BST_ to GND ..........................................................-0.3V to +36V BST_ to VDD............................................................-0.3V to +30V DH1 to LX1 ..............................................-0.3V to (VBST1 + 0.3V) BST1 to LX1..............................................................-0.3V to +6V DH2 to LX2 ..............................................-0.3V to (VBST2 + 0.3V) BST2 to LX2..............................................................-0.3V to +6V LDO5, RTC, REF Short Circuit to GND.......................Momentary RTC Current Continuous.....................................................+5mA LDO5 Current (Internal Regulator) Continuous ..............+100mA LDO5 Current (Switched Over) Continuous ...................+200mA Continuous Power Dissipation (TA = +70°C) 24-Pin, 4mm x 4mm Thin QFN (T2444-3) (derate 27.8mW/°C above +70°C) .................................2.22W Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Note: Measurements are valid using a 20MHz bandwidth limit. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 24 V INPUT SUPPLIES IN Input Voltage Range LDO5 in regulation IN Standby Supply Current VIN = 6V to 24V, ON1 = ON2 = GND, ONLDO = RTC 85 175 µA IN Shutdown Supply Current VIN = 4.5V to 24V, ON1 = ON2 = ONLDO = GND 40 70 µA I IN ON1 = ON2 = VCC, VSKIP = VCC; VOUT1 = 5.3V, VOUT2 = 3.5V 0.1 0.2 mA I VCC ON1 = ON2 = VCC, VSKIP = VCC; VOUT1 = 5.3V, VOUT2 = 3.5V 0.7 1.5 mA IN Supply Current VCC Bias Supply Current 6 PWM CONTROLLERS OUT1 Output-Voltage Accuracy VOUT1 VSKIP = 1.8V 4.95 5.00 5.05 V OUT2 Output-Voltage Accuracy VOUT2 VSKIP = 1.8V 3.267 3.30 3.333 V Load Regulation Error Line Regulation Error Either SMPS, VSKIP = 1.8V, ILOAD = 0 to 5A -0.1 Either SMPS, VSKIP = GND, ILOAD = 0 to 5A -1.7 Either SMPS, VSKIP = VCC, ILOAD = 0 to 5A -1.5 Either SMPS, IN = 6V to 28V % 0.005 %/V DH1 On-Time t ON1 VOUT1 = 5.0V (Note 1) 895 1052 1209 ns DH2 On-Time t ON2 VOUT2 = 3.3V (Note 1) 833 925 1017 ns 300 400 Minimum Off-Time t OFF(MIN) Soft-Start Slew Rate t SS Ultrasonic Operating Frequency 2 (Note 1) Rising/falling edge on ON1 or ON2 f SW(USONIC) VSKIP = GND 20 ns 1 ms 34 kHz _______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies (Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 4.90 5.0 5.10 V 260 mA LINEAR REGULATOR (LDO5) LDO5 Output-Voltage Accuracy VLDO5 VIN = 6V to 24V, ON1 = GND, 0 < ILDO5 < 100mA LDO5 Short-Circuit Current LDO5 = GND 100 LDO5 Regulation Reduction/ Bootstrap Switchover Threshold Falling edge of OUT1 -11.0 Rising edge of OUT1 -7.0 LDO5 Bootstrap Switch Resistance LDO5 to OUT1, V OUT1 = 5V (Note 3) 1.9 4.5 4.0 4.3 Falling edge of VCC, PWM disabled below this threshold VCC Undervoltage Lockout Threshold Thermal-Shutdown Threshold T SHDN 3.8 -8.8 Rising edge of VCC 4.2 Hysteresis = 10°C 160 -6.0 % V °C 3.3V ALWAYS-ON LINEAR REGULATOR (RTC) RTC Output-Voltage Accuracy VRTC RTC Short-Circuit Current ON1 = ON2 = GND, VIN = 6V to 24V, 0 < IRTC < 5mA 3.23 ON1 = ON2 = ONLDO = GND, VIN = 6V to 24V, 0 < IRTC < 5mA 3.19 3.47 5 22 RTC = GND 3.33 3.43 V mA REFERENCE (REF) Reference Voltage VREF Reference Load Regulation Error REF Lockout Voltage VREF VREF(UVLO) VCC = 4.5V to 5.5V, IREF = 0 IREF = -20µA to +50µA 1.980 2.00 -10 Rising edge, 350mV (typ) hysteresis 2.020 V +10 mV 1.95 V OUT1 FAULT DETECTION OUT1 Overvoltage and PGOOD Trip Threshold OUT1 Overvoltage Fault Propagation Delay With respect to error comparator threshold t OVP OUT1 Undervoltage Protection Trip Threshold OUT1 Output Undervoltage Fault Propagation Delay 10 OUT1 forced 50mV above trip threshold With respect to error comparator threshold 13 16 10 65 tUVP 70 % µs 75 10 % µs OUT2 FAULT DETECTION OUT2 Overvoltage and PGOOD Trip Threshold OUT2 Overvoltage Fault Propagation Delay With respect to error comparator threshold t OVP OUT2 Undervoltage Protection Trip Threshold OUT2 Output Undervoltage Fault Propagation Delay OUT2 forced 50mV above trip threshold With respect to error comparator threshold tUVP 10 13 16 10 65 70 10 % µs 75 % µs _______________________________________________________________________________________ 3 MAX17031 ELECTRICAL CHARACTERISTICS (continued) MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS -16 -13 -10 % POWER-GOOD With respect to either error comparator threshold, falling edge, hysteresis = 1% PGOOD Lower Trip Threshold PGOOD Propagation Delay t PGOOD 10 ON1 or ON2 = GND (PGOOD low impedance), I SINK = 4mA PGOOD Output Low Voltage PGOOD Leakage Current OUT1 or OUT2 forced 50mV beyond PGOOD trip threshold, falling edge I PGOOD OUT1 and OUT2 in regulation (PGOOD high impedance), PGOOD forced to 5.5V, TA = +25°C µs 0.3 V 1 µA 2 V CURRENT LIMIT ILIM_ Adjustment Range 0.2 ILIM_ Current Valley Current-Limit Threshold (Adjustable) Current-Limit Threshold (Negative) Ultrasonic Current-Limit Threshold 5 VLIM_ (VAL) VAGND - VLX_ VNEG 44 50 56 RILIM _ = 200k (VILIM _ = 1.00V) 90 100 110 RILIM _ = 400k (VILIM _ = 2.00V) 180 200 220 With respect to valley current-limit threshold, VSKIP = VREF mV -120 % VOUT2 = 3.5V, VOUT1 = 5.3V 20 mV VZX VAGND - VLX_, VSKIP = VCC or GND 1.5 mV DH_ Gate-Driver On-Resistance RDH BST1 - LX1 and BST2 - LX2 forced to 5V 1.5 DL_ Gate-Driver On-Resistance RDL DH_ Gate-Driver Source/Sink Current IDH Current-Limit Threshold (Zero Crossing) VNEG(US) µA RILIM _ = 100k (VILIM _ = 500mV) GATE DRIVERS DL_ Gate-Driver Source Current IDL 3.5 DL1, DL2; high state 1.4 4.5 DL1, DL2; low state 0.5 1.5 DH1, DH2 forced to 2.5V, BST1 - LX1 and BST2 - LX2 forced to 5V 2 A DL1, DL2 forced to 2.5V 1.7 A DL1, DL2 forced to 2.5V 3.3 A DL1, DL2 rising (Note 4) 30 DH1, DH2 rising (Note 4) 35 IBST _ = 10mA, VDD = 5V 5.5 VBST _ = 26V, TA = +25°C; OUT1 and OUT2 above regulation threshold 0.1 (SOURCE) DL_ Gate-Driver Sink Current IDL (SINK) Dead Time tDEAD Internal BST_ Switch On-Resistance RBST BST_Leakage Current 4 _______________________________________________________________________________________ ns 5 µA Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies (Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX Upper SKIP/PWM threshold falling edge, 33mV hysteresis 1.94 2.0 2.06 Lower PWM/ultrasonic threshold 0.4 1.6 -1 +1 UNITS INPUTS AND OUTPUTS SKIP Input Thresholds SKIP Leakage Current VSKIP = 0 or 5V, TA = +25°C High (SMPS on) ON_ Input-Logic Levels ONLDO, ON1, ON2 ON_ Leakage Current VON1 = V ON2 = V ONLDO = 0 or 5V, TA = +25°C OUT_ Leakage Current VON1 = V ON2 = VCC 2.4 Low (SMPS off) 0.8 -2 +2 VOUT1 = 5.3V 15 65 VOUT2 = 3.5V 5 30 V µA V µA µA ELECTRICAL CHARACTERISTICS (Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 24 V 200 µA INPUT SUPPLIES IN Input Voltage Range LDO5 in regulation IN Standby Supply Current VIN = 6V to 24V, ON1 = ON2 = GND, ONLDO = RTC IN Shutdown Supply Current VIN = 4.5V to 24V, ON1 = ON2 = ONLDO = GND 70 µA I IN ON1 = ON2 = VCC, VSKIP = VCC, VOUT1 = 5.3V, VOUT2 = 3.5V 0.2 mA I VCC ON1 = ON2 = VCC, VSKIP = VCC, VOUT1 = 5.3V, VOUT2 = 3.5V 1.5 mA IN Supply Current VCC Bias Supply Current 6 PWM CONTROLLERS OUT1 Output-Voltage Accuracy VOUT1 VSKIP = 1.8V 4.90 5.10 V OUT2 Output-Voltage Accuracy VOUT2 VSKIP = 1.8V 3.234 3.366 V ns DH1 On-Time t ON1 VOUT1 = 5.0V (Note 1) 895 1209 DH2 On-Time t ON2 VOUT2 = 3.3V (Note 1) 833 1017 ns 400 ns Minimum Off-Time t OFF(MIN) Ultrasonic Operating Frequency (Note 1) f SW(USONIC) VSKIP = GND 18 kHz _______________________________________________________________________________________ 5 MAX17031 ELECTRICAL CHARACTERISTICS (continued) MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies ELECTRICAL CHARACTERISTICS (continued) (Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 5.15 V 260 mA -5.0 % 4.5 V LINEAR REGULATOR (LDO5) LDO5 Output-Voltage Accuracy VLDO5 VIN = 6V to 24V, ON1 = GND; 0mA < ILDO5 < 100mA 4.85 LDO5 Short-Circuit Current LDO5 = GND LDO5 Regulation Reduction/ Bootstrap Switchover Threshold Falling edge of OUT1 LDO5 Bootstrap Switch Resistance LDO5 to OUT1, V OUT1 = 5V (Note 3) VCC Undervoltage Lockout Threshold Falling edge of VCC, PWM disabled below this threshold 3.8 4.3 ON1 = ON2 = GND, VIN = 6V to 24V, 0 < IRTC < 5mA 3.18 3.45 ON1 = ON2 = ONLDO = GND, VIN = 6V to 24V, 0 < IRTC < 5mA 3.16 3.50 5 22 -12.0 3.3V ALWAYS-ON LINEAR REGULATOR (RTC) RTC Output-Voltage Accuracy VRTC RTC Short-Circuit Current RTC = GND V mA REFERENCE (REF) Reference Voltage 1.975 2.025 V IREF = -20µA to +50µA -10 +10 mV OUT1 Overvoltage and PGOOD Trip Threshold With respect to error comparator threshold 10 16 % OUT1 Undervoltage Protection Trip Threshold With respect to error comparator threshold 63 77 % OUT2 Overvoltage and PGOOD Trip Threshold With respect to error comparator threshold 10 16 % OUT2 Undervoltage Protection Trip Threshold With respect to error comparator threshold 63 77 % PGOOD Lower Trip Threshold With respect to either error comparator threshold, falling edge, hysteresis = 1% -16 -10 % PGOOD Output Low Voltage ON1 or ON2 = GND (PGOOD low impedance), I SINK = 4mA 0.3 V Reference Load Regulation Error VREF VREF VCC = 4.5V to 5.5V, IREF = 0 OUT1 FAULT DETECTION OUT2 FAULT DETECTION POWER-GOOD 6 _______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies (Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 0.2 2 V RILIM _ = 100k (VILIM _ = 500mV) 40 60 RILIM _ = 200k (VILIM _ = 1.00V) 85 115 RILIM _ = 400k (VILIM _ = 2.00V) 164 236 CURRENT LIMIT ILIM_ Adjustment Range Valley Current-Limit Threshold (Adjustable) VLIM _ (VAL) VAGND - VLX_ mV GATE DRIVERS DH_ Gate-Driver On-Resistance DL_ Gate-Driver On-Resistance RDH RDL BST1 - LX1 and BST2 - LX2 forced to 5V 3.5 DL1, DL2; high state 4.5 DL1, DL2; low state 1.5 INPUTS AND OUTPUTS SKIP Input Thresholds ON_ Input-Logic Levels Upper SKIP/PWM threshold falling edge, 33mV hysteresis 1.94 2.06 Lower PWM/ultrasonic threshold 0.4 1.6 ONLDO, ON1, ON2 High (SMPS on) Low (SMPS off) 2.4 0.8 V V Note 1: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = GND, VBST = 5V, and a 500pF capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times might be different due to MOSFET switching speeds. Note 2: Specifications to TA = -40°C are guaranteed by design and not production tested. Note 3: Specification increased by 1Ω to account for test measurement error. Note 4: Production tested for functionality only. _______________________________________________________________________________________ 7 MAX17031 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TA = +25°C, unless otherwise noted.) EFFICIENCY (%) 85 80 12V 7V 70 20V 65 60 SKIP MODE PWM MODE 55 75 ULTRASONIC MODE 70 90 1 80 75 12V 70 65 60 60 10 7V 20V SKIP MODE PWM MODE 55 12V INPUT 50 0.1 0.01 1 0.1 0.01 10 LOAD CURRENT (A) 3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT SMPS OUTPUT-VOLTAGE DEVIATION vs. LOAD CURRENT SWITCHING FREQUENCY vs. LOAD CURRENT 80 PWM MODE 75 70 65 ULTRASONIC MODE 60 55 LOW-NOISE ULTRASONIC MODE 1 0 -1 PWM MODE SKIP MODE PWM MODE SKIP MODE 12V INPUT 1 -3 1 LOW-NOISE ULTRASONIC MODE 10 12V INPUT 50 0.1 100 -2 12V INPUT 0.01 MAX17031 toc06 MAX17031 toc05 2 1000 SWITCHING FREQUENCY (kHz) 85 3 OUTPUT-VOLTAGE DEVIATION (%) MAX17031 toc04 90 10 0.1 0.01 1 0.01 10 0.1 1 10 LOAD CURRENT (A) LOAD CURRENT (A) LOAD CURRENT (A) 5V LDO OUTPUT VOLTAGE vs. LOAD CURRENT 3.3V RTC OUTPUT VOLTAGE vs. LOAD CURRENT NO-LOAD INPUT SUPPLY CURRENT vs. INPUT VOLTAGE 5.0 4.9 4.8 ICC + IDD PWM MODE SUPPLY CURRENT (mA) 3.4 OUTPUT VOLTAGE (V) 5.1 100 MAX17031 toc08 3.5 MAX17031 toc07 5.2 3.3 3.2 10 LOW-NOISE ULTRASONIC MODE 1 0.1 3.1 4.7 SKIP MODE 0.01 3.0 20 10 LOAD CURRENT (A) SKIP MODE 0 1 LOAD CURRENT (A) 100 95 85 65 50 0.1 0.01 EFFICIENCY (%) PWM MODE 80 55 50 40 60 80 100 120 140 160 LOAD CURRENT (mA) 8 85 95 MAX17031 toc09 75 90 EFFICIENCY (%) 90 SKIP MODE 95 100 MAX17031 toc02 95 EFFICIENCY (%) 100 MAX17031 toc01 100 3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT 5V OUTPUT EFFICIENCY vs. LOAD CURRENT MAX17031 toc03 5V OUTPUT EFFICIENCY vs. LOAD CURRENT OUTPUT VOLTAGE (V) MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies 0 2 4 6 8 LOAD CURRENT (mA) 10 12 0 5 10 15 INPUT VOLTAGE (V) _______________________________________________________________________________________ 20 25 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies STANDBY (ONLDO = RTC, ON1 = ON2 = GND) 0.01 SHUTDOWN (ONLDO = ON1 = ON2 = GND) 60 TA = +85°C TA = +25°C SAMPLE SIZE = 150 MAX17031 toc11 70 50 40 30 20 50 SAMPLE SIZE = 150 TA = +85°C TA = +25°C SAMPLE PERCENTAGE (%) SUPPLY CURRENT (mA) ICC + IDD SAMPLE PERCENTAGE (%) MAX17031 toc10 0.1 100mV ILIM THRESHOLD VOLTAGE DISTRIBUTION REFERENCE OFFSET VOLTAGE DISTRIBUTION 40 MAX17031 toc12 STANDBY AND SHUTDOWN INPUT SUPPLY CURRENT vs. INPUT VOLTAGE 30 20 10 10 0.001 0 0 0 5 10 15 20 25 -20 INPUT VOLTAGE (V) -12 -4 4 12 90 20 LDO AND RTC POWER-UP 102 106 110 MAX17031 toc15 MAX17031 toc14 A 12V 12V 98 5V LDO LOAD TRANSIENT LDO AND RTC POWER REMOVAL MAX17031 toc13 94 ILIM THRESHOLD VOLTAGE (mV) 2V OFFSET VOLTAGE (mV) 12V A 12V B 5V A 5V 5V 0V C 3.3V D 2.0V 0V 0V 3.3V B 5V C 3.3V D 2.0V 2V 0V 200µs/div A. INPUT SUPPLY, 5V/div C. 3.3V RTC, 2V/div B. 5V LDO, 2V/div D. 1.0 REF, 1V/div 200µs/div A. INPUT SUPPLY, 5V/div C. 3.3V RTC, 2V/div B. 5V LDO, 2V/div D. 2.0 REF, 1V/div 5V SMPS STARTUP AND SHUTDOWN STARTUP WAVEFORMS (SWITCHING REGULATORS) 0.1A 0A 4µs/div A. LDO OUTPUT, 100mV/div B. LDO CURRENT, 100mA/div SHUTDOWN WAVEFORMS (SWITCHING REGULATORS) MAX17031 toc18 MAX17031 toc17 MAX17031 toc16 B SKIP MODE 5V A 5V 5V 0V 5V A B 5V 5V 0V 5V A 0V B 0V C 0A D 5V 5V B 5V 0V 0V 0V 5V 0A C D C 0V 200µs/div A. 5V LDO OUTPUT, 0.2V/div C. ON1, 5V/div B. 5V SMPS OUTPUT, 2V/div 200µs/div A. ON1, 5V/div C. PGOOD, 5V/div B. 5V SMPS OUTPUT, D. INDUCTOR CURRENT, 2V/div 5A/div 200µs/div A. ON1, 5V/div C. PGOOD, 2V/div B. 5V SMPS OUTPUT, D. INDUCTOR CURRENT, 2V/div 5A/div _______________________________________________________________________________________ 9 MAX17031 Typical Operating Characteristics (continued) (Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TA = +25°C, unless otherwise noted.) MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies Typical Operating Characteristics (continued) (Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TA = +25°C, unless otherwise noted.) 5V SMPS LOAD TRANSIENT (1A TO 4A) POWER REMOVAL (SMPS UVLO RESPONSE) 3.3V SMPS LOAD TRANSIENT (1A TO 4A) MAX17031 toc19 MAX17031 toc21 MAX17031 toc20 12V 4A 4A A A 5V 0A A 0V 0A B 5V 3.3V B 5V B 0V C 0V D 0V 5V C 0A 40µs/div A. LOAD CURRENT, 2A/div C. INDUCTOR CURRENT, B. 5V SMPS OUTPUT, 2A/div 100mV/div 0A C 40µs/div A. LOAD CURRENT, 2A/div C. INDUCTOR CURRENT, B. 3.3V SMPS OUTPUT, 2A/div 100mV/div 10ms/div A. INPUT VOLTAGE, 5V/div C. 5V SMPS, 2V/div B. 5V LDO OUTPUT, 2V/div D. PGOOD, 5V/div Pin Description PIN 10 NAME FUNCTION 1 REF 2V Reference Voltage Output. Bypass REF to analog ground with a 0.22µF or greater ceramic capacitor. The reference can source up to 50µA for external loads. Loading REF degrades output voltage accuracy according to the REF load regulation error (see Typical Operating Characteristics). The reference shuts down when ON1, ON2, and ONLDO are all pulled low. 2 ONLDO 3 VCC Analog Supply Voltage Input. Connect VCC to the system supply voltage with a series 50 resistor, and bypass to analog ground using a 1µF or greater ceramic capacitor. 4 RTC 3.3V Always-On Linear Regulator Output for RTC Power. Bypass RTC with a 1µF or greater ceramic capacitor to analog ground. RTC can source up to 5mA for external loads. 5 IN 6 LDO5 5V Linear Regulator Output. Bypass LDO5 with a 4.7µF or greater ceramic capacitor to GND. LDO5 can source 100mA for external load support. LDO5 is powered from IN. 7 OUT1 Output-Voltage Sense Input for SMPS1 and Linear Regulator Bypass Input. OUT1 is an input to the Quick-PWM on-time one-shot timer. OUT1 also serves as the feedback input for the SMPS1. When OUT1 exceeds 93.5% of the LDO5 voltage, the controller bypasses the LDO5 output to OUT1. The bypass switch is disabled if the OUT1 voltage drops by 8.5% from LDO5 nominal regulation threshold. 8 ILIM1 Valley Current-Limit Adjustment for SMPS1. The GND - LX1 current-limit threshold is 1/10 the voltage present on ILIM1 over a 0.2V to 2V range. An internal 5µA current source allows this voltage to be set with a single resistor between ILIM1 and analog ground. Enable Input for LDO5. Drive ONLDO high (pull up to RTC) to enable the linear regulator (LDO5) output. Drive ONLDO low to shut down the linear regulator output. When ONLDO is high, LDO5 must supply VCC and VDD. Power Input Supply. Bypass IN with a 0.1µF or greater ceramic capacitor to GND. IN powers the linear regulators (RTC and LDO5) and senses the input voltage for the Quick-PWM on-time oneshot timer. The DH on-time is inversely proportional to input voltage. ______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies PIN NAME FUNCTION 9 PGOOD Open-Drain Power-Good Output for SMPS1 and SMPS2. PGOOD is low when either output voltage is more than 15% (typ) below the nominal regulation threshold, during soft-start, in shutdown, when either SMPS is disabled, and after the fault latch has been tripped. After the soft-start circuit has terminated, PGOOD becomes high impedance if both outputs are in regulation. 10 ON1 Enable Input for SMPS1. Drive ON1 high to enable SMPS1. Drive ON1 low to shut down SMPS1. 11 DH1 High-Side Gate-Driver Output for SMPS1. DH1 swings from LX1 to BST1. 12 LX1 Inductor Connection for SMPS1. Connect LX1 to the switched side of the inductor. LX1 is the lower supply rail for the DH1 high-side gate driver. 13 BST1 14 DL1 Low-Side Gate-Driver Output for SMPS1. DL1 swings from power GND to VDD. 15 VDD Supply Voltage Input for the DL_ Gate Drivers. VDD is internally connected to the drain of the HVPV BST diode switch. Connect to a 5V supply, and bypass VDD to power GND with a 1µF or greater ceramic capacitor. 16 GND Analog and Power Ground 17 DL2 Low-Side Gate-Driver Output for SMPS2. DL2 swings from power GND to VDD. 18 BST2 Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor as shown in Figure 1. An optional resistor in series with BST2 allows the DH2 turn-on current to be adjusted. 19 LX2 Inductor Connection for SMPS2. Connect LX2 to the switched side of the inductor. LX2 is the lower supply rail for the DH2 high-side gate driver. 20 DH2 High-Side Gate-Driver Output for SMPS2. DH2 swings from LX2 to BST2. 21 ON2 Enable Input for SMPS2. Drive ON2 high to enable SMPS2. Drive ON2 low to shut down SMPS2. 22 SKIP Pulse-Skipping Control Input. This three-level input determines the operating mode for the switching regulators: High (> 2V) = pulse-skipping mode Middle (1.8V) = forced-PWM mode GND = ultrasonic mode 23 OUT2 Output-Voltage Sense Input for SMPS2. OUT2 is an input to the Quick-PWM on-time one-shot timer. OUT2 also serves as the feedback input for the preset 3.3V. 24 ILIM2 Valley Current-Limit Adjustment for SMPS2. The GND - LX2 current-limit threshold is 1/10 the voltage present on ILIM2 over a 0.2V to 2V range. An internal 5µA current source allows this voltage to be set with a single resistor between ILIM2 and analog ground. — EP Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor as shown in Figure 1. An optional resistor in series with BST1 allows the DH1 turn-on current to be adjusted. Exposed Pad. Connect backside exposed pad to analog GND and power GND. ______________________________________________________________________________________ 11 MAX17031 Pin Description (continued) MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies INPUT (VIN)* 7V TO 24V CIN 4x 10µF 25V CIN_PIN 0.1µF IN NH1 CBST1 0.1µF L1 5V OUTPUT DH1 DH2 BST1 BST2 LX1 LX2 NH2 CBST2 0.1µF L2 3.3V OUTPUT COUT2 COUT1 D1 DL1 NL1 DL2 D2 NL2 MAX17031 OUT1 DX1 OUT2 C5 10nF R6 100kΩ C6 0.1µF PGOOD DX2 12V TO 15V CHARGE PUMP C8 0.1µF C7 10nF COMBINED POWER-GOOD RTC RTC SUPPLY C3 1µF R4 1MΩ C4 0.1µF SKIP REF R5 200kΩ VDD 5V LDO OUTPUT R1 47Ω POWER GROUND ANALOG GROUND GND LDO5 C1 4.7µF ON1 ON2 ONLDO VCC C2 1.0µF RILIM1 ON OFF RILIM2 ILIM1 PAD ILIM2 *NOTE: LOWER INPUT VOLTAGES REQUIRE ADDITIONAL INPUT CAPACITANCE. IF OPERATING NEAR DROPOUT, COMPONENT SELECTION MUST BE CAREFULLY DONE TO ENSURE PROPER OPERATION. Figure 1. Standard Application Circuit—Main Supply 12 ______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies 400kHz/300kHz SMPS1: 5V AT 5A SMPS2: 3.3V AT 8A COMPONENT Input Voltage VIN = 7V to 24V Input Capacitor (CIN) 4X 10µF, 25V Taiyo Yuden TMK432BJ106KM SMPS 1 Output Capacitor (COUT1) 2x 100µF, 6V, 35m SANYO 6TPE100MAZB Inductor (L1) 4.3µH, 11.4m, 11A Sumida CEP125U High-Side MOSFET (NH1) Siliconix Si4800BDY 23m/30m 30V Low-Side MOSFET (NL1) Current-Limit Resistor (RILIM1) Table 2. Component Suppliers SUPPLIER WEBSITE AVX Corp. www.avx.com Central Semiconductor Corp. www.centralsemi.com Fairchild Semiconductor International Rectifier KEMET Corp. NEC/TOKIN America, Inc. Panasonic Corp. Philips/nxp Semiconductor www.fairchildsemi.com www.irf.com www.kemet.com www.nec-tokinamerica.com www.panasonic.coml www.semiconductors.philips.com Pulse Engineering www.pulseeng.com Renesas Technology Corp. www.renesas.com SANYO Electric Co., Ltd. www,sanyodevice.com Sumida Corp. www.sumida.com Siliconix Si4812BDY 16.5m/20m 30V Taiyo Yuden www.t-yuden.com TDK Corp. www.component.tdk.com TOKO America, Inc. www.tokoam.com 71k Vishay (Dale, Siliconix) www.vishay.com Würth Elektronik GmbH & Co. KG www.we-online.com SMPS 2 Output Capacitor (COUT2) 2x 150µF, 4V, 35m SANYO 4TPE150MAZB Inductor (L2) 2.2µH, 5.4m, 14A Sumida CEP125U High-Side MOSFET (NH2) Siliconix Si4684DY 9.2m/11.5m, 30V Low-Side MOSFET (NL2) Siliconix Si4430BDY 4.8m/6.0m, 30V Current-Limit Resistor (RILIM2) 71k Detailed Description The MAX17031 step-down controller is ideal for highvoltage, low-power supplies for notebook computers. Maxim’s Quick-PWM pulse-width modulator in the MAX17031 is specifically designed for handling fast load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The Quick-PWM architecture circumvents the poor load-transient timing problems of fixed-frequency current-mode PWMs, while also avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time and constant-off-time PWM schemes. Figure 2 is the functional diagram overview and Figure 3 is the QuickPWM core functional diagram. ______________________________________________________________________________________ 13 MAX17031 Table 1. Component Selection for Standard Applications MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies IN TON 5V LINEAR REGULATOR SKIP ONLDO LDO5 3.3V LINEAR REGULATOR RTC LDO BYPASS CIRCUITRY BYP ILIM2 OUT2 VDD SECFB ILIM1 OUT1 VDD BST1 PWM1 CONTROLLER (FIGURE 3) DH1 LX1 BST2 PWM2 CONTROLLER (FIGURE 3) DH2 LX2 VDD DL2 VDD DL1 ON1 UVLO PGOOD POWER-GOOD AND FAULT PROTECTION FAULT1 FB1 SELECT (PRESET 5V) FAULT2 FB2 SELECT (PRESET 3.3V) ON2 UVLO POWER-GOOD AND FAULT PROTECTION VCC MAX17031 2V REF PAD Figure 2. Functional Diagram Overview 14 ______________________________________________________________________________________ REF GND Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031 FB INT PRESET OR EXT ADJ REF INTEGRATOR ∆ FB ANALOG SOFT-START/ SOFT-STOP SLOPE COMP REFIN ON tOFF(MIN) AGND GND Q TRIG ONE-SHOT S Q DH DRIVER R* *RESET DOMINATE tON AGND Q TRIG ONE-SHOT NEG CURRENT LIMIT LX VCC ON-TIME COMPUTE VALLEY CURRENT LIMIT TON IN ILIM ULTRASONIC ZERO CROSSING Q TRIG ONE-SHOT GND ULTRASONIC THRESHOLD FB REFIN GND S Q SKIP THREE-LEVEL DECODE DL DRIVER R Figure 3. Functional Diagram—Quick-PWM Core ______________________________________________________________________________________ 15 MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies The MAX17031 includes several features for multipurpose notebook functionality, and is specifically designed for 5V/3.3V main power-supply rails. The MAX17031 includes a 100mA, 5V linear regulator (LDO5) ideal for initial power-up of the notebook and main supply. Additionally, the MAX17031 includes a 3.3V, 5mA RTC supply that remains always enabled, which can be used to power the RTC supply and system pullups when the notebook shuts down. The MAX17031 also includes a SKIP mode control input with an accurate threshold that allows an unregulated charge pump or secondary winding to be automatically refreshed—ideal for generating the low-power 12V to 15V load switch supply. 3.3V RTC Power The MAX17031 includes a low-current (5mA) linear regulator that remains active as long as the input supply (IN) exceeds 2V (typ). The main purpose of this “always-enabled” linear regulator is to power the RTC when all other notebook regulators are disabled. The RTC regulator sources at least 5mA for external loads. Preset 5V, 100mA Linear Regulator The MAX17031 includes a high-current (100mA) 5V linear regulator. This LDO5 is required to generate the 5V bias supply necessary to power up the switching regulators. Once the 5V switching regulator (MAX17031 OUT1) is enabled, LDO5 is bypassed to OUT1. The MAX17031 LDO5 sources at least 100mA of supply current. Bypass Switch The MAX17031 includes an LDO5 bypass switch that allows the LDO5 to be bypassed to OUT1. When OUT1 exceeds 93.5% of the LDO5 output voltage for 500µs, then the MAX17031 reduces the LDO5 regulation threshold and turns on an internal p-channel MOSFET to short OUT1 to LDO5. Instead of disabling the LDO5 when the MAX17031 enables the bypass switch, the controller reduces the LDO5 regulation voltage, which effectively places the linear regulator in a standby state while switched over, allowing a fast recovery if the OUT1 drops by 8.5% from LDO5 nominal regulation threshold. 5V Bias Supply (VCC/VDD) The MAX17031 requires an external 5V bias supply (VDD and VCC) in addition to the battery. Typically, this 5V bias supply is generated by the internal 100mA LDO5 or from the notebook’s 95%-efficient 5V main supply. Keeping these bias supply inputs independent improves the overall efficiency. When ONLDO is enabled, VDD and VCC must be supplied from LDO5. 16 The VDD bias supply input powers the internal gate drivers and the VCC bias supply input powers the analog control blocks. The maximum current required is dominated by the switching losses of the drivers and can be estimated as follows: IBIAS(MAX) = ICC(MAX) + fSWQG ≈ 30mA to 60mA (typ) Free-Running Constant-On-Time PWM Controller with Input Feed-Forward The Quick-PWM control architecture is a pseudo-fixedfrequency, constant on-time, current-mode regulator with voltage feed-forward. This architecture relies on the output filter capacitor’s ESR to act as a currentsense resistor, so the feedback ripple voltage provides the PWM ramp signal. The control algorithm is simple: the high-side switch on-time is determined solely by a one-shot whose pulse width is inversely proportional to input voltage and directly proportional to output voltage. Another one-shot sets a minimum off-time (400ns typ). The on-time one-shot is triggered if the error comparator is low, the low-side switch current is below the valley current-limit threshold, and the minimum off-time one-shot has timed out. On-Time One-Shot The heart of the PWM core is the one-shot that sets the high-side switch on-time. This fast, low-jitter, adjustable one-shot includes circuitry that varies the on-time in response to battery and output voltage. The high-side switch on-time is inversely proportional to the battery voltage as sensed by IN, and proportional to the feedback voltage: t ON = K × VOUT VIN where K (switching period) is set 2.5µs for side 1 and 3.3µs for side 2. For continuous conduction operation, the actual switching frequency can be estimated by: fSW = ( VOUT + VDROP1) t ON × ( VIN + VDROP1 − VDROP2 ) where VDROP1 is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PCB resistances; VDROP2 is the sum of the parasitic voltage drops in the charging path, including the high-side switch, inductor, and PCB resistances; and t ON is the on-time calculated by the MAX17031. ______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies Forced-PWM Mode (VSKIP = 1.8V) The low-noise forced-PWM mode (VSKIP = 1.8V) disables the zero-crossing comparator, which controls the low-side switch on-time. This forces the low-side gatedrive waveform to constantly be the complement of the high-side gate-drive waveform, so the inductor current reverses at light loads while DH maintains a duty factor of VOUT/VIN. The benefit of forced-PWM mode is to keep the switching frequency fairly constant. However, forced-PWM operation comes at a cost: the no-load 5V bias current remains between 20mA to 60mA depending on the switching frequency and MOSFET selection. The MAX17031 automatically uses forced-PWM operation during shutdown regardless of the SKIP configuration. Automatic Pulse-Skipping Mode (VSKIP > 2V) In skip mode (V SKIP > 2V), an inherent automatic switchover to PFM takes place at light loads. This switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current’s zero crossing. The zero-crossing comparator output is set by the differential voltage across LX and GND. DC output-accuracy specifications refer to the integrated threshold of the error comparator. When the inductor is in continuous conduction, the MAX17031 regulates the valley of the output ripple and the internal integrator removes the actual DC output-voltage error caused by the output-ripple voltage and internal slope compensation. In discontinuous conduction (VSKIP > 2V and IOUT < ILOAD(SKIP)), the integrator cannot correct for the lowfrequency output ripple error, so the output voltage has a DC regulation level higher than the error comparator threshold by approximately 1.5% due to slope compensation and output ripple voltage. Ultrasonic Mode (VSKIP = GND) Shorting SKIP to ground activates a unique pulseskipping mode with a guaranteed minimum switching frequency of 20kHz. This ultrasonic pulse-skipping mode eliminates audio-frequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. In ultrasonic mode, the controller automatically transitions to fixed-frequency PWM operation when the load reaches the same critical conduction point (ILOAD(SKIP)) that occurs when normally pulse skipping. An ultrasonic pulse occurs (Figure 4) when the controller detects that no switching has occurred within the last 37µs. Once triggered, the ultrasonic circuitry pulls DL high, turning on the low-side MOSFET to induce a negative inductor current. After the inductor current reaches the negative ultrasonic current threshold, the controller turns off the low-side MOSFET (DL pulled low) and triggers a constant on-time (DH driven high). When the on-time has expired, the controller reenables the low-side MOSFET until the inductor current drops below the zero-crossing threshold. Starting with a DL pulse greatly reduces the peak output voltage when compared to starting with a DH pulse. The output voltage at the beginning of the ultrasonic pulse determines the negative ultrasonic current threshold, corresponding to: VNEG(US) = ILR CS where RCS is the current-sense resistance seen across LX to GND. 40µs (MAX) INDUCTOR CURRENT ZERO-CROSSING DETECTION 0 ISONIC ON-TIME (tON) Figure 4. Ultrasonic Waveforms ______________________________________________________________________________________ 17 MAX17031 Modes of Operation MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies Secondary Feedback (SKIP) When the controller skips pulses (VSKIP > 2V), the long time between pulses (especially if the output is sinking current) allows the external charge-pump voltage or transformer secondary winding voltage to drop. Connecting a resistor-divider between the secondary output to SKIP to ground sets up a minimum refresh threshold. When the SKIP voltage drops below its 2V threshold, the MAX17031 enters forced-PWM mode. This forces the controller to begin switching, allowing the external unregulated charge pump (or transformer secondary winding) to be refreshed. Valley Current-Limit Protection The current-limit circuit employs a unique “valley” current-sensing algorithm that senses the inductor current through the low-side MOSFET—across LX to analog GND. If the current through the low-side MOSFET exceeds the valley current-limit threshold, the PWM controller is not allowed to initiate a new cycle. The actual peak current is greater than the valley currentlimit threshold by an amount equal to the inductor ripple current. Therefore, the exact current-limit characteristic and maximum load capability are a function of the inductor value and battery voltage. When combined with the undervoltage protection circuit, this currentlimit method is effective in almost every circumstance. In forced-PWM mode, the MAX17031 also implements a negative current limit to prevent excessive reverse inductor currents when VOUT is sinking current. The negative current-limit threshold is set to approximately 120% of the positive current limit. POR, UVLO When VCC rises above the power-on reset (POR) threshold, the MAX17031 clears the fault latches, forces the low-side MOSFET to turn on (DL high), and resets the soft-start circuit, preparing the controller for power-up. However, the VCC undervoltage lockout (UVLO) circuitry inhibits switching until VCC reaches 4.2V (typ). When V CC rises above 4.2V and the controller has been enabled (ON_ pulled high), the controller activates the enabled PWM controllers and initializes soft-start. When VCC drops below the UVLO threshold (falling edge), the controller stops switching, and DH and DL are pulled low. When the 2V POR falling-edge threshold is reached, the DL state no longer matters since there is not enough voltage to force the switching MOSFETs into a low on-resistance state, so the controller pulls DL high, allowing a soft discharge of the output capacitors (damped response). However, if the V CC recovers 18 before reaching the falling POR threshold, DL remains low until the error comparator has been properly powered up and triggers an on-time. Soft-Start and Soft-Shutdown The MAX17031 includes voltage soft-start and softshutdown—slowly ramping up and down the target voltage. During startup, the slew-rate control softly slews the target voltage over a 1ms startup period. This long startup period reduces the inrush current during startup. When ON1 or ON2 is pulled low or the output undervoltage fault latch is set, the respective output automatically enters soft-shutdown; the regulator enters PWM mode and ramps down its output voltage over a 1ms period. After the output voltage drops below 0.1V, the MAX17031 pulls DL high, clamping the output and LX switching node to ground, preventing leakage currents from pulling up the output and minimizing the negative output voltage undershoot during shutdown. Output Voltage DC output-accuracy specifications in the Electrical Characteristics table refer to the error comparator’s threshold. When the inductor continuously conducts, the MAX17031 regulates the valley of the output ripple, so the actual DC output voltage is lower than the slope-compensated trip level by 50% of the output ripple voltage. For PWM operation (continuous conduction), the output voltage is accurately defined by the following equation: ⎛V ⎞ VOUT(PWM) = VNOM + ⎜ RIPPLE ⎟ 2 A ⎝ CCV ⎠ where VNOM is the nominal feedback voltage, ACCV is the integrator’s gain, and VRIPPLE is the output ripple voltage (VRIPPLE = ESR x ∆IINDUCTOR, as described in the Output Capacitor Selection section). In discontinuous conduction (IOUT < ILOAD(SKIP)), the longer off-times allow the slope compensation to increase the threshold voltage by as much as 1%, so the output voltage regulates slightly higher than it would in PWM operation. Internal Integrator The internal integrator improves the output accuracy by removing any output accuracy errors caused by the slope compensation, output ripple voltage, and erroramplifier offset. Therefore, the DC accuracy (in forcedPWM mode) depends on the integrator’s gain, the integrator’s offset, and the accuracy of the integrator’s reference input. ______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies PGOOD is the open-drain output that continuously monitors both output voltages for undervoltage and overvoltage conditions. PGOOD is actively held low in shutdown (ON1 or ON2 = GND), during soft-start, and soft-shutdown. Approximately 20µs (typ) after the softstart terminates, PGOOD becomes high impedance as long as both output voltages exceed 85% of the nominal fixed-regulation voltage. PGOOD goes low if the output voltage drops 15% below the regulation voltage, or if the SMPS controller is shut down. For a logic-level PGOOD output voltage, connect an external pullup resistor between PGOOD and the logic power supply. A 100kΩ pullup resistor works well in most applications. Overvoltage Protection (OVP) When the output voltage rises 15% above the fixedregulation voltage, the controller immediately pulls PGOOD low, sets the overvoltage fault latch, and immediately pulls the respective DL_ high—clamping the output fault to GND. Toggle either ON1 or ON2 input, or cycle VCC power below its POR threshold to clear the fault latch and restart the controller. Undervoltage Protection (UVP) When the output voltage drops 30% below the fixedregulation voltage, the controller immediately pulls the PGOOD low, sets the undervoltage fault latch, and begins the shutdown sequence. After the output voltage drops below 0.1V, the synchronous rectifier turns on, clamping the output to GND regardless of the output voltage. Toggle either ON1 or ON2 input, or cycle VCC power below its POR threshold to clear the fault latch and restart the controller. Thermal-Fault Protection (TSHDN) The MAX17031 features a thermal-fault protection circuit. When the junction temperature rises above +160°C, a thermal sensor activates the fault latch, pulls PGOOD low, enables the 10Ω discharge circuit, and disables the controller—DH and DL pulled low. Toggle ONLDO or cycle IN power to reactivate the controller after the junction temperature cools by 15°C. Design Procedure Firmly establish the input-voltage range and maximum load current before choosing an inductor operating point (ripple-current ratio). The primary design goal is choosing a good inductor operating point, and the following three factors dictate the rest of the design: • Input Voltage Range: The maximum value (VIN(MAX)) must accommodate the worst-case, high ACadapter voltage. The minimum value (V IN(MIN) ) must account for the lowest battery voltage after drops due to connectors, fuses, and battery-selector switches. If there is a choice at all, lower input voltages result in better efficiency. • Maximum Load Current: There are two values to consider. The peak load current (ILOAD(MAX)) determines the instantaneous component stresses and filtering requirements and thus drives output capacitor selection, inductor saturation rating, and the design of the current-limit circuit. The continuous load current (ILOAD) determines the thermal stresses and thus drives the selection of input capacitors, MOSFETs, and other critical heat-contributing components. Table 3. Fault Protection and Shutdown Operation Table MODE CONTROLLER STATE DRIVER STATE Shutdown (ON_ = High to Low) Output UVP (Latched) Voltage soft-shutdown initiated. Internal error-amplifier target slowly ramped down to GND and output actively discharged (automatically enters forced-PWM mode). DL driven high and DH pulled low after soft-shutdown completed (output < 0.1V). Output OVP (Latched) Controller shuts down and EA target internally slewed down. Controller remains off until ON_ toggled or VCC power cycled. DL immediately driven high, DH pulled low. UVLO (VCC Falling-Edge) Thermal Fault (Latched) SMPS controller disabled (assuming ON_ pulled high), 10 output discharge active. DL and DH pulled low. UVLO (VCC Rising Edge) SMPS controller disabled (assuming ON_ pulled high), 10 output discharge active. DL driven high, DH pulled low. VCC Below POR SMPS inactive, 10 output discharge active. DL driven high, DH pulled low. ______________________________________________________________________________________ 19 MAX17031 Power-Good Outputs (PGOOD) and Fault Protection Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031 Inductor Operating Point: This choice provides trade-offs between size vs. efficiency and transient response vs. output ripple. Low inductor values provide better transient response and smaller physical size, but also result in lower efficiency and higher output ripple due to increased ripple currents. The minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduction (where the inductor current just touches zero with every cycle at maximum load). Inductor values lower than this grant no further size-reduction benefit. The optimum operating point is usually found between 20% and 50% value at which PFM/PWM switchover occurs. Inductor Selection The switching frequency and inductor operating point determine the inductor value as follows: L= VOUT ( VIN − VOUT ) VINfSWILOAD(MAX)LIR For example: ILOAD(MAX) = 4A, VIN = 12V, VOUT2 = 2.5V, fSW = 355kHz, 30% ripple current or LIR = 0.3: L= 2.5V × (12V − 2.5V ) = 4.65µH 12V × 355kHz × 4 A × 0.3 Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK): ⎛ LIR ⎞ IPEAK = ILOAD(MAX) ⎜ 1 + ⎟ ⎝ 2 ⎠ Most inductor manufacturers provide inductors in standard values, such as 1.0µH, 1.5µH, 2.2µH, 3.3µH, etc. Also look for nonstandard values, which can provide a better compromise in LIR across the input voltage range. If using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the LIR with properly scaled inductance values. Transient Response The inductor ripple current also impacts transientresponse performance, especially at low VIN - VOUT differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. The amount of output sag is also a function of the maximum duty factor, which can be calculated from the ontime and minimum off-time: 20 ( L ∆ILOAD(MAX) VSAG = ⎡ ⎤ K⎞ +t ⎥ ) 2 ⎢⎛⎜⎝ VOUT VIN ⎟⎠ OFF(MIN) ⎣ ⎦ ⎡⎛ ( V − VOUT ) K ⎞ ⎤ 2C OUT VOUT ⎢⎜ IN ⎟ − t OFF(MIN) ⎥ V ⎠ ⎢⎣⎝ ⎥⎦ IN where t OFF(MIN) is the minimum off-time (see the Electrical Characteristics table). The amount of overshoot during a full-load to no-load transient due to stored inductor energy can be calculated as: VSOAR 2 ∆ILOAD(MAX) ) L ( ≈ 2C OUT VOUT Setting the Current Limit The minimum current-limit threshold must be great enough to support the maximum load current when the current limit is at the minimum tolerance value. The valley of the inductor current occurs at ILOAD(MAX) minus half the ripple current; therefore: ⎛ ILOAD(MAX)LIR ⎞ ILIM(VAL) > ILOAD(MAX) − ⎜ ⎟ 2 ⎝ ⎠ where ILIM(VAL) equals the minimum valley current-limit threshold voltage divided by the current-sense resistance (RSENSE). When using a 100kΩ ILIM resistor, the minimum valley current-limit threshold is 40mV. Connect a resistor between ILIM_ and analog ground to set the adjustable current-limit threshold. The valley current-limit threshold is approximately 1/10 the ILIM voltage formed by the external resistance and internal 5µA current source. The 40kΩ to 400kΩ adjustment range corresponds to a 20mV to 200mV valley currentlimit threshold. When adjusting the current limit, use 1% tolerance resistors to prevent significant inaccuracy in the valley current-limit tolerance. Output Capacitor Selection The output filter capacitor must have low enough equivalent series resistance (ESR) to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. For processor core voltage converters and other applications where the output is subject to violent load transients, the output capacitor’s size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance: ______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies VSTEP ∆ILOAD(MAX) In applications without large and fast load transients, the output capacitor’s size often depends on how much ESR is needed to maintain an acceptable level of output voltage ripple. The output ripple voltage of a stepdown controller equals the total inductor ripple current multiplied by the output capacitor’s ESR. Therefore, the maximum ESR required to meet ripple specifications is: VRIPPLE R ESR ≤ ILOAD(MAX)LIR The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value (this is true of tantalums, OS-CONs, polymers, and other electrolytics). When using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent V SAG and V SOAR from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem (see the VSAG and VSOAR equations in the Transient Response section). However, lowcapacity filter capacitors typically have high ESR zeros that might affect the overall stability (see the Output Capacitor Stability Considerations section). Output Capacitor Stability Considerations For Quick-PWM controllers, stability is determined by the value of the ESR zero relative to the switching frequency. The boundary of instability is given by the following equation: f fESR ≤ SW π where: fESR = 1 2π × R ESR × C OUT For a typical 300kHz application, the ESR zero frequency must be well below 95kHz, preferably below 50kHz. Tantalum and OS-CON capacitors in widespread use at the time of publication have typical ESR zero frequencies of 25kHz. In the design example used for inductor selection, the ESR needed to support 25mVP-P ripple is 25mV/1.2A = 20.8mΩ. One 220µF/4V SANYO polymer (TPE) capacitor provides 15mΩ (max) ESR. This results in a zero at 48kHz, well within the bounds of stability. Do not put high-value ceramic capacitors directly on OUT1 and OUT2 pins to ensure stability. Large ceramic capacitors can have a high-ESR zero frequency and cause erratic, unstable operation. However, it is easy to add enough series resistance by placing the capacitors a couple of inches downstream from the feedback sense point, which should be as close as possible to the inductor. Unstable operation manifests itself in two related but distinctly different ways: double-pulsing and fast-feedback loop instability. Double-pulsing occurs due to noise on the output or because the ESR is so low that there is not enough voltage ramp in the output-voltage signal. This “fools” the error comparator into triggering a new cycle immediately after the 400ns minimum offtime period has expired. Double-pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it can indicate the possible presence of loop instability due to insufficient ESR. Loop instability results in oscillations at the output after line or load steps. Such perturbations are usually damped, but can cause the output voltage to rise above or fall below the tolerance limits. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output-voltage ripple envelope for overshoot and ringing. It can help to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under/overshoot. Input Capacitor Selection The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents: ⎞ ⎛ V OUT ( VIN − VOUT ) ⎟ IRMS = ILOAD ⎜ ⎟⎠ ⎜⎝ VIN For most applications, nontantalum chemistries (ceramic, aluminum, or OS-CON) are preferred due to their resistance to power-up surge currents typical of systems with a mechanical switch or connector in series with the input. If the MAX17031 is operated as the second stage of a two-stage power conversion system, tantalum input capacitors are acceptable. In either configuration, choose a capacitor that has less than 10°C temperature rise at the RMS input current for optimal reliability and lifetime. ______________________________________________________________________________________ 21 MAX17031 R ESR ≤ MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies Power-MOSFET Selection Most of the following MOSFET guidelines focus on the challenge of obtaining high load-current capability when using high-voltage (> 20V) AC adapters. Lowcurrent applications usually require less attention. The high-side MOSFET (NH) must be able to dissipate the resistive losses plus the switching losses at both VIN(MIN) and VIN(MAX). Ideally, the losses at VIN(MIN) should be roughly equal to the losses at VIN(MAX), with lower losses in between. If the losses at VIN(MIN) are significantly higher, consider increasing the size of NH. Conversely, if the losses at VIN(MAX) are significantly higher, consider reducing the size of NH. If VIN does not vary over a wide range, maximum efficiency is achieved by selecting a high-side MOSFET (NH) that has conduction losses equal to the switching losses. Choose a low-side MOSFET (NL) that has the lowest possible on-resistance (RDS(ON)), comes in a moderate-sized package (i.e., 8-pin SO, DPAK, or D2PAK), and is reasonably priced. Ensure that the MAX17031 DL_ gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic drain-to-gate capacitor caused by the high-side MOSFET turning on; otherwise, cross-conduction problems could occur. Switching losses are not an issue for the low-side MOSFET since it is a zero-voltage switched device when used in the step-down topology. Power-MOSFET Dissipation Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET (NH), the worstcase power dissipation due to resistance occurs at minimum input voltage: ⎛V ⎞ 2 PD (NH Resistive) = ⎜ OUT ⎟ (ILOAD ) R DS(ON) ⎝ VIN ⎠ Generally, use a small high-side MOSFET to reduce switching losses at high input voltages. However, the RDS(ON) required to stay within package power-dissipation limits often limits how small the MOSFET can be. The optimum occurs when the switching losses equal the conduction (RDS(ON)) losses. High-side switching losses do not become an issue until the input is greater than approximately 15V. Calculating the power dissipation in high-side MOSFETs (NH) due to switching losses is difficult, since it must allow for difficult-to-quantify factors that influence the turn-on and turn-off times. These factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and PCB layout 22 characteristics. The following switching loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including verification using a thermocouple mounted on NH: ⎛ VIN(MAX)ILOADfSW Q G(SW) ⎞ PD (NH Switching) = ⎜ ⎟ IGATE ⎝ ⎠ ⎛ V 2C f ⎞ + ⎜ IN OSS SW ⎟ 2 ⎝ ⎠ where COSS is the high-side MOSFET’s output capacitance, QG(SW) is the charge needed to turn on the highside MOSFET, and I GATE is the peak gate-drive source/sink current (1A typ). Switching losses in the high-side MOSFET can become a heat problem when maximum AC adapter voltages are applied due to the squared term in the switchingloss equation provided above. If the high-side MOSFET chosen for adequate RDS(ON) at low battery voltages becomes extraordinarily hot when subjected to V IN(MAX) , consider choosing another MOSFET with lower parasitic capacitance. For the low-side MOSFET (NL), the worst-case power dissipation always occurs at maximum battery voltage: ⎡ ⎛ V ⎞⎤ 2 PD (NL Resistive) = ⎢1− ⎜ OUT ⎟ ⎥ (ILOAD ) R DS(ON) V ⎣⎢ ⎝ IN(MAX) ⎠ ⎥⎦ The absolute worst case for MOSFET power dissipation occurs under heavy overload conditions that are greater than ILOAD(MAX) but are not high enough to exceed the current limit and cause the fault latch to trip. To protect against this possibility, “overdesign” the circuit to tolerate: ⎛ ILOAD(MAX)LIR ⎞ ILOAD = I VALLEY(MAX) + ⎜ ⎟ 2 ⎝ ⎠ where I VALLEY(MAX) is the maximum valley current allowed by the current-limit circuit, including threshold tolerance and sense-resistance variation. The MOSFETs must have a relatively large heatsink to handle the overload power dissipation. Choose a Schottky diode (DL) with a forward voltage drop low enough to prevent the low-side MOSFET’s body diode from turning on during the dead time. As a general rule, select a diode with a DC current rating equal to 1/3 the load current. This diode is optional and can be removed if efficiency is not critical. ______________________________________________________________________________________ Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies Step-Down Converter Dropout Performance The output voltage-adjustable range for continuousconduction operation is restricted by the nonadjustable minimum off-time one-shot. When working with low input voltages, the duty-factor limit must be calculated using worst-case values for on- and off-times. Manufacturing tolerances and internal propagation delays introduce an error to the TON K-factor. This error is greater at higher frequencies. Also, keep in mind that transient response performance of buck regulators operated too close to dropout is poor, and bulk output capacitance must often be added (see the VSAG equation in the Design Procedure section). The absolute point of dropout is when the inductor current ramps down during the minimum off-time (∆IDOWN) as much as it ramps up during the on-time (∆IUP). The ratio h = ∆IUP/∆IDOWN indicates the controller’s ability to slew the inductor current higher in response to increased load, and must always be greater than 1. As h approaches 1, the absolute minimum dropout point, the inductor current cannot increase as much during each switching cycle, and V SAG greatly increases unless additional output capacitance is used. A reasonable minimum value for h is 1.5, but adjusting this up or down allows trade-offs between VSAG, output capacitance, and minimum operating voltage. For a given value of h, the minimum operating voltage can be calculated as: VIN(MIN) = tOFF(MIN) = 500ns VDROP2 = 100mV h = 1.5: VIN(MIN) = Calculating again with h = 1 and the typical K-factor value (K = 3.3µs) gives the absolute limit of dropout: VIN(MIN) = fSW = 355kHz K = 3.0µs, worst-case KMIN = 3.3µs 2.5V + 0.1V = 3.06V ⎛ 1 × 500ns ⎞ 1− ⎜ ⎝ 3.3µs ⎟⎠ Therefore, VIN must be greater than 3.06V, even with very large output capacitance, and a practical input voltage with reasonable output capacitance would be 3.47V. PCB Layout Guidelines Careful PCB layout is critical to achieving low switching losses and clean, stable operation. The switching power stage requires particular attention. If possible, mount all the power components on the top side of the board, with their ground terminals flush against one another. Follow these guidelines for good PCB layout: • Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation. • Keep the power traces and load connections short. This practice is essential for high efficiency. Using thick copper PCBs (2oz vs. 1oz) can enhance fullload efficiency by 1% or more. Correctly routing PCB traces is a difficult task that must be approached in terms of fractions of centimeters, where a single milliohm of excess trace resistance causes a measurable efficiency penalty. • Minimize current-sensing errors by connecting LX_ directly to the drain of the low-side MOSFET. • When trade-offs in trace lengths must be made, it is preferable to allow the inductor charging path to be made longer than the discharge path. For example, it is better to allow some extra distance between the input capacitors and the high-side MOSFET than to allow distance between the inductor and the lowside MOSFET or between the inductor and the output filter capacitor. • Route high-speed switching nodes (BST_, LX_, DH_, and DL_) away from sensitive analog areas (REF, and OUT_). VOUT + VDROP2 ⎛ h × t OFF(MIN) ⎞ 1− ⎜ ⎟⎠ K ⎝ where V DROP2 is the parasitic voltage drop in the charge path (see the On-Time One-Shot section), tOFF(MIN) is from the Electrical Characteristics table, and K (1/fSW) is the switching period. The absolute minimum input voltage is calculated with h = 1. If the calculated VIN(MIN) is greater than the required minimum input voltage, then operating frequency must be reduced or output capacitance added to obtain an acceptable VSAG. If operation near dropout is anticipated, calculate VSAG to be sure of adequate transient response. Dropout Design Example: VOUT2 = 2.5V 2.5V + 0.1V = 3.47V ⎛ 1.5 × 500ns ⎞ 1− ⎜ ⎝ 3.0µs ⎟⎠ A sample layout is available in the MAX17031 Evaluation Kit data sheet. ______________________________________________________________________________________ 23 MAX17031 Applications Information MAX17031 Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies Layout Procedure 1) Place the power components first, with ground terminals adjacent (NL_ source, CIN, COUT_, and DL_ anode). If possible, make all these connections on the top layer with wide, copper-filled areas. 2) Mount the controller IC adjacent to the low-side MOSFET, preferably on the back side opposite NL_ and NH_ in order to keep LX_, GND, DH_, and the DL_ gate-drive lines short and wide. The DL_ and DH_ gate traces must be short and wide (50 mils to 100 mils wide if the MOSFET is 1in from the controller IC) to keep the driver impedance low and for proper adaptive dead-time sensing. 3) Group the gate-drive components (BST_ capacitor, VDD bypass capacitor) together near the controller IC. 4) Make the DC-DC controller ground connections as shown in Figure 1. This diagram can be viewed as having two separate ground planes: power ground, where all the high-power components go; and an analog ground plane for sensitive analog components. The analog ground plane and power ground plane must meet only at a single point directly at the IC. 5) Connect the output power planes directly to the output filter capacitor positive and negative terminals with multiple vias. Place the entire DC-DC converter circuit as close to the load as is practical. Chip Information TRANSISTOR COUNT: 12,197 PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 24 TQFN T2444-3 21-0139 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.