INTEGRATED CIRCUITS DATA SHEET TDA8929T Controller class-D audio amplifier Preliminary specification File under Integrated Circuits, IC01 2001 Dec 11 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T CONTENTS 15 TEST AND APPLICATION INFORMATION Test circuit BTL application Mode pin External clock Reference designs Reference design bill of material Curves measured in reference design 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 QUICK REFERENCE DATA 15.1 15.2 15.3 15.4 15.5 15.6 15.7 6 BLOCK DIAGRAM 16 PACKAGE OUTLINE 7 PINNING 17 SOLDERING 8 FUNCTIONAL DESCRIPTION 17.1 8.1 8.2 8.3 8.3.1 8.3.2 8.3.3 8.4 Controller Pulse width modulation frequency Protections Diagnostic temperature Diagnostic current Start-up safety test Differential audio inputs Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods 18 DATA SHEET STATUS 9 LIMITING VALUES 19 DEFINITIONS 10 THERMAL CHARACTERISTICS 20 DISCLAIMERS 11 QUALITY SPECIFICATION 12 DC CHARACTERISTICS 13 AC CHARACTERISTICS 14 SWITCHING CHARACTERISTICS 14.1 Minimum pulse width 2001 Dec 11 17.2 17.3 17.4 17.5 2 Philips Semiconductors Preliminary specification Controller class-D audio amplifier 1 TDA8929T FEATURES 3 • Operating voltage from ±15 to ±30 V GENERAL DESCRIPTION The TDA8929T is the controller of a two-chip set for a high efficiency class-D audio power amplifier system. The system is divided into two chips: • Very low quiescent current • Low distortion • TDA8929T; the analog controller chip in a SO24 package • Fixed gain of 30 dB Single-Ended (SE) or 36 dB Bridge-Tied Load (BTL) • TDA8926J/ST/TH or TDA8927J/ST/TH; a digital power stage in a DBS17P, RDBS17P or HSOP24 power package. • Good ripple rejection • Internal switching frequency can be overruled by an external clock With this chip set a compact 2 × 50 W or 2 × 100 W audio amplifier system can be built, operating with high efficiency and very low dissipation. No heatsink is required, or depending on supply voltage and load, a very small one. The system operates over a wide supply voltage range from ±15 up to ±30 V and consumes a very low quiescent current. • No switch-on or switch-off plop noise • Diagnostic input for short-circuit and temperature protection • Usable as a stereo Single-Ended (SE) amplifier or as a mono amplifier in Bridge-Tied Load (BTL) • Start-up safety test, to protect for short-circuits at the output of the power stage to supply lines • Electrostatic discharge protection (pin to pin). 2 APPLICATIONS • Television sets • Home-sound sets • Multimedia systems • All mains fed audio systems • Car audio (boosters). 4 ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA8929T 2001 Dec 11 SO24 DESCRIPTION plastic small outline package; 24 leads; body width 7.5 mm 3 VERSION SOT137-1 Philips Semiconductors Preliminary specification Controller class-D audio amplifier 5 TDA8929T QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT General; note 1 VP supply voltage ±15 ±25 ±30 V Iq(tot) total quiescent current − 20 30 mA 29 30 31 dB Stereo single-ended configuration Gv(cl) closed-loop voltage gain Zi input impedance 45 68 − kΩ Vn(o) noise output voltage − 220 400 µV SVRR supply voltage ripple rejection 40 50 − dB αcs channel separation − 70 − dB VOO DC output offset voltage − − 150 mV Mono bridge-tied load configuration Gv(cl) closed-loop voltage gain 35 36 37 dB Zi input impedance 23 34 − kΩ Vn(o) noise output voltage − 280 − µV SVRR supply voltage ripple rejection − 44 − dB VOO DC output offset voltage − − 200 mV Note 1. VP = ±25 V. 2001 Dec 11 4 Philips Semiconductors Preliminary specification Controller class-D audio amplifier 6 TDA8929T BLOCK DIAGRAM VSS1 handbook, full pagewidth VDD1 1 IN1− 3 R fb 4 WINDOW COMPARATOR V/I IN1+ 20 21 2 mute SGND SGND OSC 23 OSCILLATOR STABILIZER 19 15 MANAGER 22 6 IN2− DIAGTMP DIAGCUR EN2 SGND 11 mute 13 SW2 8 9 V/I WINDOW COMPARATOR 14 17 R fb 12 10 18 VDD2 VSSD MGW148 VSS2(sub) Fig.1 Block diagram. 2001 Dec 11 STAB TDA8929T 16 SGND IN2+ REL1 MODE SGND SGND2 SW1 SGND 7 mute MODE EN1 5 24 SGND1 PWM1 5 REL2 PWM2 Philips Semiconductors Preliminary specification Controller class-D audio amplifier 7 TDA8929T PINNING SYMBOL PIN DESCRIPTION VSS1 1 negative analog supply voltage channel 1 SGND1 2 signal ground channel 1 VDD1 3 positive analog supply voltage channel 1 IN1− 4 negative audio input channel 1 IN1+ 5 positive audio input channel 1 MODE 6 mode select input (standby/mute/operating) OSC 7 oscillator frequency adjustment, or tracking input IN2+ 8 positive audio input channel 2 IN2− 9 negative audio input channel 2 VDD2 10 positive analog supply voltage channel 2 SGND2 11 signal ground channel 2 VSS2(sub) 12 negative analog supply voltage channel 2 (substrate) SW2 13 digital switch output channel 2 REL2 14 digital control input channel 2 DIAGTMP 15 digital input for temperature limit error report from power stage EN2 16 digital control output for enable channel 2 of power stage PWM2 17 input for feedback from PWM output power stage channel 2 VSSD 18 negative digital supply voltage; reference for digital interface to power stage STAB 19 pin for a decoupling capacitor for internal stabilizer PWM1 20 input for feedback from PWM output power stage channel 1 EN1 21 digital control output for enable channel 1 of power stage DIAGCUR 22 digital input for current error report from power stage REL1 23 digital control input channel 1 SW1 24 digital switch output channel 1 handbook, halfpage VSS1 1 24 SW1 SGND1 2 23 REL1 VDD1 3 22 DIAGCUR IN1− 4 21 EN1 IN1+ 5 20 PWM1 19 STAB MODE 6 TDA8929T OSC 7 18 VSSD IN2+ 8 17 PWM2 IN2− 9 16 EN2 VDD2 10 15 DIAGTMP SGND2 11 14 REL2 VSS2(sub) 12 13 SW2 MGW149 2001 Dec 11 Fig.2 Pin configuration. 6 Philips Semiconductors Preliminary specification Controller class-D audio amplifier 8 TDA8929T FUNCTIONAL DESCRIPTION The amplifier system can be switched in three operating modes via the mode select pin: The combination of the TDA8926J and the TDA8929T produces a two-channel audio power amplifier system using the class-D technology (see Fig.4). • Standby: with a very low supply current • Mute: the amplifiers are operational, but the audio signal at the output is suppressed In the TDA8929T controller device the analog audio input signal is converted into a digital Pulse Width Modulation (PWM) signal. The digital power stage (TDA8926) is used for driving the low-pass filter and the loudspeaker load. It performs a level shift from the low-power digital PWM signal, at logic levels, to a high-power PWM signal that switches between the main supply lines. A second-order low-pass filter converts the PWM signal into an analog audio signal across the loudspeaker. • On: amplifier fully operational with output signal. For suppressing pop noise the amplifier will remain automatically for approximately 220 ms in the mute mode before switching to operating mode. In this time the coupling capacitors at the input are fully charged. Figure 3 shows an example of a switching circuit for driving pin MODE. For a description of the power stage see the specification of the TDA8926. The TDA8926 can be used for an output power of 2 × 50 W. The TDA8927 should be used for a higher output power of 2 × 100 W. 8.1 handbook, halfpage standby/ mute Controller mute/on R The controller contains (for two audio channels) two Pulse Width Modulators (PWMs), two analog feedback loops and two differential input stages. This chip also contains circuits common to both channels such as the oscillator, all reference sources, the mode functionality and a digital timing manager. MODE R SGND MGW150 The pinning of the TDA8929T and the power stage devices are designed to have very short and straight connections between the packages. For optimum performance the interconnections between the packages must be as short as possible. Fig.3 Mode select switch circuitry. Using this two-chip set an audio system with two independent amplifier channels with high output power, high efficiency (90%) for the system, low distortion and a low quiescent current is obtained. The amplifiers channels can be connected in the following configurations: • Mono Bridge-Tied Load (BTL) amplifier • Stereo Single-Ended (SE) amplifier. 2001 Dec 11 +5 V 7 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... VSS1 VDD1 VDD2 VDD1 13 5 3 1 +25 V TDA8929T R fb TDA8926J 20 PWM1 BOOT1 6 IN1− 4 INPUT STAGE Vi(1) IN1+ 5 SGND1 2 PWM MODULATOR mute STABI ROSC OSC 7 REL1 2 24 SW1 SW1 1 21 EN1 EN1 4 19 STAB 22 OSCILLATOR MANAGER MODE 6 DRIVER HIGH 7 OUT1 DRIVER LOW VSS1 DIAGCUR 15 DIAGTMP DIAG 3 TEMPERATURE SENSOR AND CURRENT PROTECTION VDD2 12 BOOT2 MODE POWERUP 15 SGND SGND2 11 mute EN2 14 16 EN2 IN2+ 8 CONTROL AND HANDSHAKE REL2 16 INPUT STAGE Vi(2) DRIVER HIGH 14 REL2 IN2− 9 SGND (0 V) 11 OUT2 SW2 17 13 SW2 PWM MODULATOR DRIVER LOW 17 PWM2 R fb 12 VSS2(sub) 10 18 8 VDD2 VSSD VSS1 VSS2 10 VSSA VDDA −25 V VSSA TDA8929T Fig.4 Typical application schematic of the class-D system using TDA8929T and the TDA8926J. MGU387 Preliminary specification VSSD handbook, full pagewidth 8 VMODE CONTROL AND HANDSHAKE STAB 9 SGND VSSA 23 REL1 Philips Semiconductors Controller class-D audio amplifier 2001 Dec 11 VDDA VDDD VSSA VDDA Philips Semiconductors Preliminary specification Controller class-D audio amplifier 8.2 TDA8929T 8.3.2 Pulse width modulation frequency This input is intended to protect against short-circuits across the loudspeaker load. In the event that the current limit in the power stage is exceeded, pin DIAGCUR must be pulled to a LOW level. A LOW level on the diagnostic current input will immediately force the output pins EN1 and EN2 to a LOW level. The power stage will shut down within less than 1 µs and the high current is switched off. In this state the dissipation is very low. Every 220 ms the controller will attempt to restart the system. If there is still a short-circuit across the loudspeaker load, the system is switched off again as soon as the maximum current is exceeded. The average dissipation will be low because of this low duty factor. The actual current limiting value is set by the power stage. The output signal of the power stage is a PWM signal with a carrier frequency of approximately 300 kHz. Using a second-order LC demodulation filter in the application results in an analog audio signal across the loudspeaker. This switching frequency is fixed by an external resistor ROSC connected between pin OSC and VSS. With the resistor value given in the application diagram, the carrier frequency is typical 317 kHz. The carrier frequency can be 9 9 × 10 calculated using: f osc = ------------------- [Hz] R OSC If two or more class-D systems are used in the same audio application, it is advised to have all devices working at the same switching frequency. This can be realized by connecting all OSC pins together and feed them from an external oscillator. Using an external oscillator it is necessary to force pin OSC to a DC-level above SGND for switching from the internal to an external oscillator. In this case the internal oscillator is disabled and the PWM will switch on the external frequency. The frequency range of the external oscillator must be in the range as specified in the switching characteristics. Depending on the type of power stage which is used, several values are possible: • TDA8926TH: limit value can be externally adjusted with a resistor; maximum is 5 A • TDA8927TH: limit value can be externally adjusted with a resistor; maximum is 7.5 A • TDA8926J and TDA8926ST: limit value is fixed at 5 A • TDA8927J and TDA8927ST: limit value is fixed at 7.5 A. Application in a practical circuit: • Internal oscillator: ROSC connected between pin OSC and VSS • External oscillator: connect oscillator signal between pin OSC and pin SGND; delete ROSC. 8.3 Protections The controller is provided with two diagnostic inputs. One or both pins can be connected to the diagnostic output of one or more power stages. 8.3.1 DIAGNOSTIC TEMPERATURE A LOW level on pin DIAGTMP will immediately force both pins EN1 and EN2 to a LOW level. The power stage shuts down and the temperature is expected to drop. If pin DIAGTMP goes HIGH, pins EN1 and EN2 will immediately go HIGH and normal operation will be maintained. Temperature hysteresis, a delay before enabling the system again, is arranged in the power stage. Internally there is a pull-up resistance to 5 V at the diagnostic input of the controller. Because the diagnostic output of the power stage is an open-drain output, diagnostic lines can be connected together (wired-OR). It should be noted that the TDA8929T itself has no temperature protection. 2001 Dec 11 DIAGNOSTIC CURRENT 9 Philips Semiconductors Preliminary specification Controller class-D audio amplifier 8.3.3 TDA8929T 8.4 START-UP SAFETY TEST During the start-up sequence, when pin MODE is switched from standby to mute, the condition at the output terminals of the power stage are checked. These are the same lines as the feedback inputs of the controller. In the event of a short-circuit of one of the output terminals to VDD or VSS the start-up procedure is interrupted and the system waits for non-shorted outputs. Because the test is done before enabling the power stages, no large currents will flow in the event of a short-circuit. This system protects against short-circuits at both sides of the output filter to both supply lines. When there is a short-circuit from the outputs of the power stage to one of the supply lines, before the demodulation filter, it will also be detected by the start-up safety test. Practical use from this test feature can be found in detection of short-circuits on the printed-circuit board. Differential audio inputs For a high common mode rejection and a maximum flexibility of application, the audio inputs are fully differential. By connecting the inputs anti-parallel the phase of one of the channels is inverted, so that a load can be connected between the two output filters. In this case the system operates as a mono BTL amplifier (see Fig.5). Also in the stereo single-ended configuration it is recommended to connect the two differential inputs in anti-phase. This has advantages for the current handling of the power supply at low signal frequencies. Remark: this test is only operational prior to or during the start-up sequence, and not during normal operating. handbook, full pagewidth TDA8929T REL1 IN1 + OUT1 SW1 IN1 − EN1 Vi POWER STAGE EN2 IN2 + SGND SW2 IN2 − OUT2 REL2 MGW185 CONTROLLER Fig.5 Mono BTL application. 2001 Dec 11 10 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T 9 LIMITING VALUES In accordance with the Absolute Maximum Rate System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT − ±30 V 0 5.5 V storage temperature −55 +150 °C ambient temperature −40 +85 °C Tvj virtual junction temperature − 150 °C Ves(HBM) electrostatic discharge voltage (HBM) all pins with respect to VDD (class A) −500 +500 V all pins with respect to VSS (class A1) −1000 +1000 V all pins with respect to GND (class B) −2500 +2500 V −2000 +2000 V all pins with respect to VDD (class A) −100 +100 V VP supply voltage VMODE(sw) mode select switch voltage Tstg Tamb referenced to SGND note 1 all pins with respect to each other (class B) Ves(MM) electrostatic discharge voltage (MM) note 2 −100 +100 V all pins with respect to GND (class B) −300 +300 V −200 +200 V all pins with respect to VSS (class B) all pins with respect to each other (class B) Notes 1. Human Body Model (HBM); Rs = 1500 Ω and C = 100 pF. 2. Machine Model (MM); Rs = 10 Ω; C = 200 pF and L = 0.75 µH. 10 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS thermal resistance from junction to ambient in free air 11 QUALITY SPECIFICATION In accordance with “SNW-FQ611-part D” if this device is used as an audio amplifier. 2001 Dec 11 11 VALUE UNIT 65 K/W Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T 12 DC CHARACTERISTICS VP = ±25 V; Tamb = 25 °C; measured in Fig.10; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage Iq(tot) total quiescent current Istb standby current note 1 VMODE = 0 V ±15 ±25 ±30 V − 20 30 mA − 30 100 µA Offset VOO output offset voltage in system on and mute ∆VOO delta output offset voltage in system on ↔ mute − − 150 mV − − 80 mV Mode select input (pin MODE); see Figs 6, 7 and 8 VMODE input voltage note 2 0 − 5.5 V IMODE input current VMODE = 5.5 V − − 1000 µA Vth1+ positive threshold voltage 1 standby → mute; note 2 − 1.6 2.0 V Vth1− negative threshold voltage 1 mute → standby; note 2 0.8 1.0 − V VMODE(hys1) hysteresis voltage 1 (Vth1+) − (Vth1−) − 600 − mV Vth2+ positive threshold voltage 2 mute → on; note 2 − 3.8 4.0 V Vth2− negative threshold voltage 2 on → mute; note 2 3.0 3.2 − V VMODE(hys2) hysteresis voltage 2 (Vth2+) − (Vth2−) − 600 − mV note 2 − 0 − V Audio inputs (pins IN1+, IN1−, IN2+ and IN2−) VI DC input voltage Internal stabilizer (pin STAB) VO(STAB) stabilizer output voltage mute and on; note 3 11 13 15 V ISTAB(max) maximum current on pin STAB mute and on 10 − − mA Enable outputs (pins EN1 and EN2) VOH HIGH-level output voltage referenced to VSS VSTAB − 1.6 VSTAB − 0.7 − V VOL LOW-level output voltage referenced to VSS 0 − 0.8 V − VSTAB − V 0 − 1.5 V − 12 − kΩ 1.5 V Current diagnose input (pin DIAGCUR with internal pull-up resistance) VIH HIGH-level input voltage no errors; note 3 VIL LOW-level input voltage note 3 Rpu(int) internal pull-up resistance to internal digital supply Temperature diagnose input (pin DIAGTMP with internal pull-up resistance) VIH HIGH-level input voltage no errors; note 3 4 5.5 VIL LOW-level input voltage note 3 0 − 2001 Dec 11 12 V Philips Semiconductors Preliminary specification Controller class-D audio amplifier SYMBOL Rpu(int) PARAMETER TDA8929T CONDITIONS internal pull-up resistance to internal digital supply MIN. TYP. MAX. UNIT − 12 − kΩ Switch outputs (pins SW1 and SW2) VOH HIGH-level output voltage note 3 VSTAB − 1.6 VSTAB − 0.7 − V VOL LOW-level output voltage note 3 0 − 0.8 V Control inputs (pins REL1 and REL2) VIH HIGH-level input voltage note 3 10 − VSTAB V VIL LOW-level input voltage note 3 0 − 2 V Notes 1. The circuit is DC adjusted at VP = ±15 to ±30 V. 2. Referenced to SGND (0 V). 3. Referenced to VSS. 13 AC CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Stereo single-ended application; note 1 THD total harmonic distortion Gv(cl) closed-loop voltage gain SVRR supply voltage ripple rejection Zi input impedance Vn(o) noise output voltage Po = 1 W; note 2 fi = 1 kHz − 0.01 0.05 % fi = 10 kHz − 0.1 − % 29 30 31 dB on; fi = 100 Hz; note 3 − 55 − dB on; fi = 1 kHz; note 3 40 50 − dB mute; fi = 100 Hz; note 3 − 55 − dB standby; fi = 100 Hz; note 3 − 80 − dB 45 68 − kΩ on; Rs = 0 Ω; B = 22 Hz to 22 kHz − 220 400 µV on; Rs = 10 kΩ; B = 22 Hz to 22 kHz − 230 − µV mute; note 4 − 220 − µV Po = 10 W; Rs = 0 Ω − 70 − dB αcs channel separation ∆Gv channel unbalance − − 1 dB Vo output signal mute; Vi = Vi(max) = 1 V (RMS) − − 400 µV CMRR common mode rejection ratio Vi = 1 V (RMS) − 75 − dB fi = 1 kHz − 0.01 0.05 % fi = 10 kHz − 0.1 − % 35 36 37 dB Mono BTL application; note 5 THD Gv(cl) total harmonic distortion Po = 1 W; note 2 closed-loop voltage gain 2001 Dec 11 13 Philips Semiconductors Preliminary specification Controller class-D audio amplifier SYMBOL SVRR TDA8929T PARAMETER supply voltage ripple rejection Zi input impedance Vn(o) noise output voltage CONDITIONS MIN. TYP. MAX. UNIT on; fi = 100 Hz; note 3 − 49 − dB on; fi = 1 kHz; note 3 36 44 − dB mute; fi = 100 Hz; note 3 − 49 − dB standby; fi = 100 Hz; note 3 − 80 − dB 23 34 − kΩ on; Rs = 0 Ω; B = 22 Hz to 22 kHz − 280 500 µV on; Rs = 10 kΩ; B = 22 Hz to 22 kHz − 300 − µV mute; note 4 − 280 − µV Vo output signal mute; Vi = Vi(max) = 1 V (RMS) − − 500 µV CMRR common mode rejection ratio Vi = 1 V (RMS) − 75 − dB Notes 1. VP = ±25 V; fi = 1 kHz; Tamb = 25 °C; measured in Fig.10; unless otherwise specified. 2. THD is measured in a bandwidth of 22 Hz to 22 kHz. When distortion is measured using a low-order low-pass filter a significantly higher value will be found, due to the switching frequency outside the audio band. 3. Vripple = Vripple(max) = 2 V (p-p); Rs = 0 Ω. 4. B = 22 Hz to 22 kHz and independent of Rs. 5. VP = ±25 V; fi = 1 kHz; Tamb = 25 °C; measured in reference design in Fig.12; unless otherwise specified. handbook, full pagewidth on mute standby Vth1− Vth2− Vth1+ VMODE(hys1) Vth2+ VMODE(hys2) Fig.6 Mode pin selection. 2001 Dec 11 14 VMODE MGW334 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T handbook, full pagewidth audio switching VEN VSTAB VSS VMODE on 4V mute 2V 0 V (SGND) standby 110 ms >110 ms MGW152 When switching from standby to mute there is a delay of 110 ms before the output starts switching. The audio signal is available after the mode pin has been set to on, but not earlier than 220 ms after switching to mute. Fig.7 Mode pin timing from standby to on via mute. handbook, full pagewidth audio switching VEN VSTAB VSS VMODE on 4V 0 V (SGND) standby 110 ms 110 ms MGW151 When switching from standby to on there is a delay of 110 ms before the output starts switching. After a second delay of 110 ms the audio signal is available. Fig.8 Mode pin timing from standby to on. 2001 Dec 11 15 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T 14 SWITCHING CHARACTERISTICS VP = ±25 V; Tamb = 25 °C; measured in Fig.10; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Switching frequency oscillator frequency fosc ROSC = 30.0 kΩ 309 317 329 kHz ROSC = 27 kΩ; see Fig.12 − 360 − kHz fosc(r) oscillator frequency range note 1 210 − 600 kHz VOSC maximum voltage at pin OSC frequency tracking − − SGND + 12 V VOSC(trip) trip level at pin OSC for tracking frequency tracking − SGND + 2.5 − V ftrack frequency range for tracking frequency tracking 200 − 600 kHz VOSC(ext) voltage at pin OSC for tracking note 2 − 5 − V Notes 1. Frequency set with ROSC, according to the formula in the functional description. 2. For tracking the external oscillator has to switch around SGND + 2.5 V with a minimum voltage of VOSC(ext). 14.1 Minimum pulse width The minimum obtainable pulse width of the PWM output signal of a class-D system, sets the maximum output voltage swing after the demodulation filter and also the maximum output power. Delays in the power stages are the main cause for the minimum pulse width being not equal to zero. The TDA8926 and TDA8927 power stages have a minimum pulse width of tW(min) = 220 ns (typical). Using the TDA8929T controller, the effective minimum pulse is reduced by a factor of two during clipping. For the calculation of the maximum output power at clipping the effective minimum pulse width during clipping is 0.5tW(min). For the practical useable minimum and maximum duty factor (δ) which determines the maximum output power: t W(min) × f osc t W(min) × f osc ------------------------------- × 100% < δ < 1 – ------------------------------- × 100% 2 2 Using the typical values of the TDA8926 and TDA8927 power stages: 3.5% < δ < 96.5%. 2001 Dec 11 16 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T The low-pass filter performs the demodulation, so that the audio signal can be measured with an audio analyzer. For measuring low distortion values, the speed of the level shifter is important. Special care has to be taken at a sufficient supply decoupling and output waveforms without ringing. 15 TEST AND APPLICATION INFORMATION 15.1 Test circuit The test diagram in Fig.10 can be used for stand alone testing of the controller. Audio and mode input pins are configured as in the application. For the simulation of a switching output power stage a simple level shifter can be used. It converts the digital PWM signal from the controller (switching between VSS and VSS + 12 V level) to a PWM signal switching between VDD and VSS. The handshake with the power stage is simulated by a direct connection of the release inputs (REL1 and REL2) with the switch outputs (SW1 and SW2) of the controller. The enable outputs (EN1 and EN2) for waking-up the power stage are not used here, only the output level and timing are measured. A proposal for a simple level shifting circuit is given in Fig.9. handbook, full pagewidth VDD 2 kΩ 10 Ω 33 Ω BST82 10 nF 1.33 kΩ switch 0/12 V PWM PHC2300 +5 V 20 kΩ 10 kΩ 42 Ω 10 Ω 74LV14 VSS VSS MGW154 Fig.9 Level shifter. 2001 Dec 11 17 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... 220 nF Vi(L) VDD1 1 3 R fb IN1− 4 SGND1 2 20 PWM1 21 EN1 24 SW1 VDD WINDOW COMPARATOR V/I IN1+ 5 220 nF VSS1 0/12 V SGND 23 30 kHz LOW-PASS OSCILLATOR STABILIZER mute MANAGER 19 STAB 15 DIAGTMP SGND 100 nF VDD Vp VSS DIAGCUR 18 Vp MODE SGND VSS TDA8929T VMODE SGND 16 EN2 13 SW2 VDD V SGND SGND2 11 mute IN2+ 8 IN2− 9 LEVEL SHIFTER 0/12 V V/I WINDOW COMPARATOR 14 PWM 30 kHz LOW-PASS audio right audio analyzer V VSS 17 SGND PWM2 MGW153 R fb 10 18 VDD2 VSSD 47 µF VDD VSS 100 nF Fig.10 Test diagram. TDA8929T VSS Preliminary specification VSS2(sub) −30 V/+30 V REL2 220 nF 12 audio analyzer SGND 22 MODE 6 audio left V V SGND OSC 7 Vi(R) PWM VSS 30 kΩ 220 nF −30 V/+30 V REL1 100 nF SGND LEVEL SHIFTER mute SGND VSS V Philips Semiconductors VDD 47 µF Controller class-D audio amplifier dbook, full pagewidth 2001 Dec 11 100 nF VSS Philips Semiconductors Preliminary specification Controller class-D audio amplifier 15.2 TDA8929T 15.4 BTL application External clock When using the system in a mono BTL application (for more output power), the inputs of both channels must be connected in parallel. The phase of one the inputs must be inverted (see Fig.5). In principle the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. For improving the common mode behavior of the filter, the configuration in Fig.12 is advised. Figure 11 shows an external clock oscillator circuit. 15.3 The reference design for a two-chip class-D audio amplifier for TDA8926TH or TDA8927TH and TDA8929T is shown in Fig.14. The PCB layout is shown in Fig.15. 15.5 Reference designs The reference design for a two-chip class-D audio amplifier for TDA8926J or TDA8927J and TDA8929T is shown in Fig.12. The Printed-Circuit Board (PCB) layout is shown in Fig.13. The bill of materials is given in Table 1. Mode pin For correct operation the switching voltage on pin MODE should be de-bounced. If this pin is driven by a mechanical switch an appropriate de-bouncing low-pass filter should be used. If pin MODE is driven by an electronic circuit or microcontroller then it should remain, for at least 100 ms, at the mute voltage level (Vth1+) before switching back to the standby voltage level. VDDA handbook, full pagewidth R19 5 kΩ J1 120 pF C3 1 14 2 13 3 12 mode select R1 R20 9.1 kΩ 4 HEF4047B 11 5 10 6 9 7 8 39 kΩ on mute off S1 MODE 6 D1 5V6 C44 220 nF GND external clock TDA8929T OSC 7 MGW155 Fig.11 External oscillator circuit. 2001 Dec 11 19 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... R19 39 kΩ R20 3 MODE 6 on mute off R1 GND OSC 7 TDA8929T SGND1 GND SGND2 IN1+ C22 330 pF IN1− IN2+ C23 330 pF R5 10 kΩ C26 470 nF R4 10 kΩ C28 18 EN2 VDDD IN2− STAB C4 220 nF VSSD DIAGCUR CONTROLLER 4 21 8 23 9 20 D2 (7.5 V) VSSA VSSD C43 R10 180 pF 22 5 C27 470 nF R6 10 kΩ R24 200 kΩ 11 POWERUP C5 STAB 220 nF DIAG J1 J3 QGND QGND −25 V VDD inputs 5 13 9 10 3 EN1 REL1 REL1 SW1 SW1 8 6 4 2 VDD1 R15 24 Ω C15 220 nF C19 1 nF QGND OUT2− 2 1 C17 220 nF C16 470 nF BOOT1 C9 15 nF L4 PWM1 R14 5.6 Ω C13 560 pF 8Ω BTL OUT1+ QGND C20 1 nF OUT1− 2 Sumida 33 µH CDRH127-330 7 VDDD R16 24 Ω 4 or 8 Ω SE OUT2+ GND VSSD L7 bead 1 C6 220 nF VSS1 OUT1 1 VDDD VDD2 C7 220 nF VSS2 OUT2− 2 C14 470 nF 1 C21 1 nF QGND 4 or 8 Ω SE OUT1+ outputs VSSD VDDA L5 bead R21 10 kΩ C32 220 nF C34 1500 µF (35 V) R22 9.1 kΩ C33 220 nF C35 1500 µF (35 V) VDDD C36 220 nF C37 220 nF C40 47 µF (35 V) GND 2 VSS J2 VSS TDA8926J or TDA8927J L2 Sumida 33 µH CDRH127-330 BOOT2 C12 560 pF 3 J4 15 12 U1 n.c. 1 GND 14 C8 15 nF R13 5.6 Ω C30 1 nF input 2 OUT2 POWER STAGE 1 nF input 1 11 16 1 kΩ EN1 QGND +25 V 17 15 R7 10 kΩ C29 1 nF SW2 QGND C18 1 nF C31 1 nF bead L6 VSSD C38 220 nF C39 220 nF C41 47 µF (35 V) VSSA power supply QGND MLD633 Fig.12 Two-chip class-D audio amplifier application diagram for TDA8926J or TDA8927J and TDA8929T. Preliminary specification R21 and R22 are only necessary in BTL applications with asymmetrical supply. BTL: remove R6, R7, C23, C26 and C27 and close J5 and J6. C22 and C23 influence the low-pass frequency response and should be tuned with the real load (loudspeaker). Inputs floating or inputs referenced to QGND (close J1 and J4) or referenced to VSS (close J2 and J3) for an input signal ground reference. TDA8929T handbook, full pagewidth 20 C24 470 nF 2 24 J6 C25 470 nF 19 R12 5.6 Ω R11 5.6 Ω REL2 VSSD C11 560 pF C10 560 pF 1 PWM2 17 SW2 13 REL2 14 EN2 16 C3 220 nF J5 12 U2 27 kΩ VDDD VSSA VSS2 VSS1 10 C44 220 nF S1 VSSA 220 nF 220 nF VDD1 VDD2 39 kΩ D1 (5.6 V) C1 C2 Philips Semiconductors VDDA Controller class-D audio amplifier 2001 Dec 11 mode select VDDA This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... C24 C16 C40 C34 C25 C35 C14 C26 C41 C27 L7 state of D art Version 21 03-2001 D2 L6 Out1 Out2 L5 S1 VSS GND VDD In1 ON MUTE OFF In2 Silk screen top, top view Philips Semiconductors D1 U1 Controller class-D audio amplifier handbook, full pagewidth 2001 Dec 11 TDA8926J/27J & TDA8929T Copper top, top view 21 L4 R19 C1 R20 C6 R16 C17 C9 C32 C12 R13 R15 C36 U2 C5 C15 R11 C33 C10 C8 C7 R12 C11 C4 C3 Out2 C19 In1 R5 VSS In2 J2 C31 J4 QGND Silk screen bottom, top view Copper bottom, top view Fig.13 Printed-circuit board layout for TDA8926J or TDA8927J and TDA8929T. MLD634 TDA8929T C18 C30 R6 J3 J1 C20 J6 R7 R4 C29 C28 GND C37 C39 R21 R22 VDD J5 Preliminary specification Out1 C21 C22 C23 R1 C2 R24 L2 C44 C38 C43 C13 R10 R14 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... R1 30 kΩ R2 D1 (5.6 V) 100 nF 100 nF MODE 3 6 10 12 R3 GND OSC 7 U2 27 kΩ VSSA VSSD SW2 REL2 EN2 TDA8929T SGND1 GND SGND2 IN1+ C3 330 pF IN1− IN2+ C4 330 pF 22 J5 19 2 18 IN2− VSSD 11 5 CONTROLLER 4 22 21 8 23 9 DIAGCUR C13 100 nF VSSA C15 180 pF C6 1 µF R4 10 kΩ C7 1 µF R5 10 kΩ C8 1 µF R6 10 kΩ 20 C9 C10 1 nF input 2 J1 J3 QGND J4 QGND J2 VSS inputs POWERUP C14 STAB 100 nF STAB R8 14 TDA8926TH 6 10 2 or 11 TDA8927TH 7 8 DIAG 23 POWER STAGE EN1 REL1 REL1 SW1 SW1 5 3 24 22 21 LIM VSSD 17 BOOT2 VDDD VDD2 C27 100 nF VSS2 C28 100 nF C29 100 nF C31 1500 µF (35 V) C38 220 nF C41 1 nF C33 15 nF L3 bead QGND OUT2− C35 560 pF R17 5.6 Ω 8Ω BTL OUT1+ QGND C42 1 nF OUT1− 2 Sumida 33 µH CDRH127-330 L4 R15 5.6 Ω C39 220 nF 4 or 8 Ω SE OUT2+ 1 C37 470 nF BOOT1 C34 560 pF R16 5.6 Ω 2 C32 1500 µF (35 V) VSSD R14 5.6 Ω 1 GND C30 100 nF VSS1 1, 12, 18, 20 OUT2− 2 C36 470 nF 4 n.c. L2 VDD1 OUT1 C40 1 nF Sumida 33 µH CDRH127-330 C26 15 nF PWM1 1 C43 1 nF QGND 4 or 8 Ω SE OUT1+ outputs VDDD VSSD L7 bead QGND L5 bead C16 1 nF +25 V input 1 13 n.c. R7 10 kΩ 1 nF OUT2 15 U1 EN1 15 C5 1 µF D2 (7.5 V) VSSD QGND L1 bead 9 16 1 kΩ 24 J6 STAB R13 5.6 Ω R12 5.6 Ω 19 VDDD R18 200 kΩ C2 220 nF VSS(sub) VSSD C25 560 pF C24 560 pF 1 PWM2 17 SW2 13 REL2 14 EN2 16 C1 220 nF S1 VDDD VSSA VSS2 VSS1 VDD1 VDD2 39 kΩ on mute off C11 C12 Philips Semiconductors VDDA Controller class-D audio amplifier 2001 Dec 11 mode select VDDA −25 V VDDA VDDD VDD C18 100 nF R9 10 kΩ 1 GND R11 5.6 Ω C19 100 nF C22 47 µF (35 V) C21 100 nF C23 47 µF (35 V) GND 2 3 QGND VSS C17 1 nF R10 9.1 kΩ bead L6 C20 100 nF VSSD VSSA power supply MGW232 Fig.14 Two-chip class-D audio amplifier application diagram for TDA8926TH or TDA8927TH and TDA8929T. Preliminary specification R9 and R10 are only necessary in BTL applications with asymmetrical supply. BTL: remove R6, R7, C4, C7 and C8 and close J5 and J6. Demodulation coils L2 and L4 should be matched in BTL. Inputs floating or inputs referenced to QGND (close J1 and J4) or referenced to VSS (close J2 and J3). TDA8929T handbook, full pagewidth QGND This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... TDA8926TH/27TH TDA8929T C31 L3 C22 D1 C36 L1 C32 Out1 State of D art Version 2CTH1 L6 C23 L5 Out2 S1 ON MU OFF VDD GND VSS In2 In1 Silk screen top, top view Copper top, top view Philips Semiconductors Controller class-D audio amplifier dbook, full pagewidth 2001 Dec 11 C37 23 R14 R15 C35 L4 C34 Jan 2001 R8 C33 C1 C15 C11 C20 R1 R2 U1 C29 U2 C28 C14 C3 C18 C4 C27 C30 L5 C25 R13 R12 R17 C39 C38 R16 C12 C19 C13 C26 C24 R9 L7 R10 C10 C2 R11 C9 R3 C8 C7 R7 R6 R4 R5 C21 J6 J5 C5 C6 J2 C43 C42 C41 C40 C16 C17 QGND J4 J3 J1 Copper bottom, top view TDA8929T Fig.15 Printed-circuit board layout for TDA8926TH or TDA8927TH and TDA8929T. Preliminary specification MGW147 Silk screen bottom, top view Philips Semiconductors Preliminary specification Controller class-D audio amplifier 15.6 TDA8929T Reference design bill of material Table 1 Two-chip class-D audio amplifier PCB (Version 2.1; 03-2001) for TDA8926J or TDA8927J and TDA8929T (see Figs 12 and 13) COMPONENT In1 and In2 DESCRIPTION VALUE COMMENTS 2 × Farnell: 152-396 Cinch input connectors Out1, Out2, VDD, supply/output connectors GND and VSS 2 × Augat 5KEV-02; 1 × Augat 5KEV-03 S1 on/mute/off switch PCB switch Knitter ATE 1 E M-O-M U1 power stage IC TDA8926J/27J DBS17P package U2 controller IC TDA8929T SO24 package L2 and L4 demodulation filter coils 33 µH 2 × Sumida CDRH127-330 3 × Murata BL01RN1-A62 L5, L6 and L7 power supply ferrite beads C1 and C2 supply decoupling capacitors for VDD to VSS of the controller 220 nF/63 V 2 × SMD1206 C3 clock decoupling capacitor 220 nF/63 V SMD1206 C4 12 V decoupling capacitor of the controller 220 nF/63 V SMD1206 C5 12 V decoupling capacitor of the power stage 220 nF/63 V SMD1206 C6 and C7 supply decoupling capacitors for VDD to VSS of the power stage 220 nF/63 V SMD1206 C8 and C9 bootstrap capacitors 15 nF/50 V 2 × SMD0805 C10, C11, C12 and C13 snubber capacitors 560 pF/100 V 4 × SMD0805 C14 and C16 demodulation filter capacitors 470 nF/63 V 2 × MKT C15 and C17 resonance suppress capacitors 220 nF/63 V 2 × SMD1206 C18, C19, C20 and C21 common mode HF coupling capacitors 1 nF/50 V 4 × SMD0805 C22 and C23 input filter capacitors 330 pF/50 V 2 × SMD1206 C24, C25, C26 and C27 input capacitors 470 nF/63 V 4 × MKT C28, C29, C30 and C31 common mode HF coupling capacitors 1 nF/50 V 2 × SMD0805 C32 and C33 power supply decoupling capacitors 220 nF/63 V 2 × SMD1206 C34 and C35 power supply electrolytic capacitors 1500 µF/35 V 2 × Rubycon ZL very low ESR (large switching currents) C36, C37, C38 and C39 analog supply decoupling capacitors 220 nF/63 V 4 × SMD1206 C40 and C41 analog supply electrolytic capacitors 47 µF/35 V 2 × Rubycon ZA low ESR C43 diagnostic capacitor 180 pF/50 V SMD1206 C44 mode capacitor 220 nF/63 V SMD1206 D1 5.6 V zener diode BZX79C5V6 DO-35 D2 7.5 V zener diode BZX79C7V5 DO-35 R1 clock adjustment resistor 27 kΩ SMD1206 2001 Dec 11 24 Philips Semiconductors Preliminary specification Controller class-D audio amplifier COMPONENT TDA8929T DESCRIPTION VALUE COMMENTS R4, R5, R6 and R7 input resistors 10 kΩ 4 × SMD1206 R10 diagnostic resistor 1 kΩ SMD1206 R11, R12, R13 and R14 snubber resistors 5.6 Ω; >0.25 W 4 × SMD1206 R15 and R16 resonance suppression resistors 24 Ω 2 × SMD1206 R19 mode select resistor 39 kΩ SMD1206 R20 mute select resistor 39 kΩ SMD1206 R21 resistor needed when using an asymmetrical supply 10 kΩ SMD1206 R22 resistor needed when using an asymmetrical supply 9.1 kΩ SMD1206 R24 bias resistor for powering-up the power stage 200 kΩ SMD1206 15.7 Curves measured in reference design MLD627 102 handbook, halfpage MLD628 102 handbook, halfpage THD+N (%) THD+N (%) 10 10 1 1 (1) 10−1 10−1 (1) 10−2 (2) (2) 10−2 (3) 10−3 −2 10 10−1 1 10 10−3 10 102 103 Po (W) 2 × 8 Ω SE; VP = ±25 V: (1) 10 kHz. 103 104 f i (Hz) 105 2 × 8 Ω SE; VP = ±25 V: (1) Po = 10 W. (2) Po = 1 W. (2) 1 kHz. (3) 100 Hz. Fig.16 THD + N as a function of output power. 2001 Dec 11 102 Fig.17 THD + N as a function of input frequency. 25 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T MLD629 102 handbook, halfpage MLD630 102 handbook, halfpage THD+N (%) THD+N (%) 10 10 1 1 (1) (1) 10−1 10−1 (2) (2) 10−2 10−3 −2 10 10−2 (3) 10−1 1 10 10−3 10 102 103 Po (W) 2 × 4 Ω SE; VP = ±25 V: (1) 10 kHz. (2) 1 kHz. (3) 100 Hz. 102 103 104 f i (Hz) 105 2 × 4 Ω SE; VP = ±25 V: (1) Po = 10 W. (2) Po = 1 W. Fig.18 THD + N as a function of output power. Fig.19 THD + N as a function of input frequency. MLD631 102 handbook, halfpage MLD632 102 handbook, halfpage THD+N (%) THD+N (%) 10 10 1 1 (1) (1) 10−1 10−1 (2) (2) 10−2 10−3 −2 10 10−2 (3) 10−1 1 10 10−3 10 102 103 Po (W) 1 × 8 Ω BTL; VP = ±25 V: (1) 10 kHz. 103 104 f i (Hz) 105 1 × 8 Ω BTL; VP = ±25 V: (1) Po = 10 W. (2) Po = 1 W. (2) 1 kHz. (3) 100 Hz. Fig.20 THD + N as a function of output power. 2001 Dec 11 102 Fig.21 THD + N as a function of input frequency. 26 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T MLD609 25 MLD610 100 handbook, halfpage handbook, halfpage (3) η (%) P (W) (1) (2) 80 20 15 60 (1) (2) 10 40 (3) 5 0 10−2 20 10−1 1 10 0 103 102 Po (W) 0 VP = ±25 V; fi = 1 kHz: (1) 2 × 4 Ω SE. (2) 1 × 8 Ω BTL. (3) 2 × 8 Ω SE. 60 90 120 150 Po (W) VP = ±25 V; fi = 1 kHz: (1) 2 × 4 Ω SE. (2) 1 × 8 Ω BTL. (3) 2 × 8 Ω SE. Fig.22 Power dissipation as a function of output power. Fig.23 Efficiency as a function of output power. MLD611 200 Po 30 MLD612 200 Po handbook, halfpage handbook, halfpage (W) 160 (W) 160 (2) (2) 120 120 (1) (3) (1) 80 80 (3) (4) (4) 40 0 10 40 15 20 25 30 0 10 35 15 VP (V) 20 25 30 35 VP (V) THD + N = 0.5%; fi = 1 kHz: THD + N = 10%; fi = 1 kHz: (1) 1 × 4 Ω BTL. (2) 1 × 8 Ω BTL. (1) 1 × 4 Ω BTL. (2) 1 × 8 Ω BTL. (3) 2 × 4 Ω SE. (4) 2 × 8 Ω SE. (3) 2 × 4 Ω SE. (4) 2 × 8 Ω SE. Fig.24 Output power as a function of supply voltage. Fig.25 Output power as a function of supply voltage. 2001 Dec 11 27 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T MLD613 0 handbook, halfpage αcs (dB) αcs (dB) −20 −20 −40 −40 −60 −60 (1) −80 −100 (1) −80 (2) 10 MLD614 0 handbook, halfpage 102 103 104 f i (Hz) −100 105 (2) 10 102 103 104 f i (Hz) 105 2 × 8 Ω SE; VP = ±25 V: (1) Po = 10 W. (2) Po = 1 W. 2 × 4 Ω SE; VP = ±25 V: (1) Po = 10 W. (2) Po = 1 W. Fig.26 Channel separation as a function of input frequency. Fig.27 Channel separation as a function of input frequency. MLD615 45 MLD616 45 handbook, halfpage handbook, halfpage G (dB) G (dB) 40 40 35 35 (1) (1) (2) 30 30 (2) 25 20 (3) 25 (3) 10 102 103 104 f i (Hz) 20 105 VP = ±25 V; Vi = 100 mV; Rs = 10 kΩ/Ci = 330 pF: (1) 1 × 8 Ω BTL. (2) 2 × 8 Ω SE. (3) 2 × 4 Ω SE. 102 103 104 f i (Hz) 105 VP = ±25 V; Vi = 100 mV; Rs = 0 Ω: (1) 1 × 8 Ω BTL. (2) 2 × 8 Ω SE. (3) 2 × 4 Ω SE. Fig.28 Gain as a function of input frequency. 2001 Dec 11 10 Fig.29 Gain as a function of input frequency. 28 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T MLD617 0 MLD618 0 handbook, halfpage handbook, halfpage SVRR (dB) SVRR (dB) −20 −20 −40 −40 (1) (1) −60 −60 (2) (2) (3) (3) −80 −100 −80 10 102 103 104 f i (Hz) −100 105 Fig.30 SVRR as a function of input frequency. 2 3 5 4 Vripple (V) Fig.31 SVRR as a function of Vripple (p-p). MLD619 MLD620 380 handbook, halfpage handbook, halfpage (mA) fclk (kHz) 80 372 60 364 40 356 20 348 0 0 1 VP = ±25 V; Vripple with respect to GND: (1) fripple = 1 kHz. (2) fripple = 100 Hz. (3) fripple = 10 Hz. VP = ±25 V; Vripple = 2 V (p-p) with respect to GND: (1) Both supply lines in anti-phase. (2) Both supply lines in phase. (3) One supply line rippled. 100 Iq 0 10 20 30 340 37.5 VP (V) 0 10 20 40 30 VP (V) RL = open. RL = open. Fig.32 Quiescent current as a function of supply voltage. Fig.33 Clock frequency as a function of supply voltage. 2001 Dec 11 29 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T MLD622 MLD621 5 Vripple (V) 5 handbook, halfpage handbook, halfpage SVRR (%) 4 4 3 3 (1) (1) 2 2 1 0 10−2 1 (2) 10−1 1 10 Po (W) 0 10 102 VP = ±25 V; 1500 µF per supply line; fi = 10 Hz: (1) 1 × 4 Ω SE. (2) 1 × 8 Ω SE. 102 103 f i (Hz) 104 VP = ±25 V; 1500 µF per supply line: (1) Po = 30 W into 1 × 4 Ω SE. (2) Po = 15 W into 1 × 8 Ω SE. Fig.34 Supply voltage ripple as a function of output power. Fig.35 SVRR as a function of input frequency. MLD623 10 (2) MLD624 50 Po handbook, halfpage handbook, halfpage THD+N (%) (W) 40 1 (1) 30 10−1 (2) 20 (3) 10−2 10 10−3 100 200 300 400 0 100 500 600 fclk (kHz) VP = ±25 V; Po = 1 W in 2 × 8 Ω: (1) 10 kHz. (2) 1 kHz. (3) 100 Hz. 300 400 500 600 fclk (kHz) VP = ±25 V; RL = 2 × 8 Ω; fi = 1 kHz; THD + N = 10%. Fig.37 Output power as a function of clock frequency. Fig.36 THD + N as a function of clock frequency. 2001 Dec 11 200 30 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T MLD625 150 Iq handbook, halfpage Vr(PWM) (mA) 120 (mV) 800 90 600 60 400 30 200 0 100 MLD626 1000 handbook, halfpage 200 300 400 0 100 500 600 fclk (kHz) 200 300 400 500 600 fclk (kHz) VP = ±25 V; RL = open. VP = ±25 V; RL = 2 × 8 Ω. Fig.38 Quiescent current as a function of clock frequency. Fig.39 PWM residual voltage as a function of clock frequency. 2001 Dec 11 31 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T 16 PACKAGE OUTLINE SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1 D E A X c HE y v M A Z 13 24 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.61 0.60 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT137-1 075E05 MS-013 2001 Dec 11 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 32 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T If wave soldering is used the following conditions must be observed for optimal results: 17 SOLDERING 17.1 Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. 17.2 – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages. 17.3 17.4 Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. 2001 Dec 11 Manual soldering 33 Philips Semiconductors Preliminary specification Controller class-D audio amplifier 17.5 TDA8929T Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, HBGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2001 Dec 11 34 Philips Semiconductors Preliminary specification Controller class-D audio amplifier TDA8929T 18 DATA SHEET STATUS DATA SHEET STATUS(1) PRODUCT STATUS(2) DEFINITIONS Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 19 DEFINITIONS 20 DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2001 Dec 11 35 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA73 © Koninklijke Philips Electronics N.V. 2001 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753503/01/pp36 Date of release: 2001 Dec 11 Document order number: 9397 750 08189