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IRF9Z24N
TO-220AB
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Advanced Process Technology
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
P-Channel
Fully Avalanche Rated
Power MOSFET
Description
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the
industry.
D
VDSS = -55V
RDS(on) = 0.175Ω
G
ID = -12A
S
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
-12
-8.5
-48
45
0.30
± 20
96
-7.2
4.5
-5.0
-55 to + 175
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθCS
RθJA
2014-8-9
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
1
Typ.
Max.
Units
–––
0.50
–––
3.3
–––
62
°C/W
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IRF9Z24N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Q gs
Q gd
t d(on)
tr
t d(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-55
–––
–––
-2.0
2.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.05
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
13
55
23
37
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
350
170
92
V(BR)DSS
∆V(BR)DSS/∆TJ
I GSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, I D = -1mA
0.175
Ω
VGS = -10V, I D = -7.2A „
-4.0
V
VDS = VGS , ID = -250µA
–––
S
VDS = -25V, I D = -7.2A
-25
VDS = -55V, VGS = 0V
µA
-250
VDS = -44V, VGS = 0V, T J = 150°C
100
V GS = 20V
nA
-100
VGS = -20V
19
ID = -7.2A
5.1
nC VDS = -44V
10
V GS = -10V, See Fig. 6 and 13 „
–––
VDD = -28V
–––
I D = -7.2A
ns
–––
RG = 24Ω
–––
RD = 3.7Ω, See Fig. 10 „
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
pF
VDS = -25V
–––
ƒ = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
t rr
Q rr
t on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -12
showing the
A
G
integral reverse
––– ––– -48
p-n junction diode.
S
––– ––– -1.6
V
TJ = 25°C, IS = -7.2A, VGS = 0V „
––– 47
71
ns
TJ = 25°C, IF = -7.2A
––– 84 130
µC di/dt = -100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 3.7mH
ƒ ISD ≤ -7.2A, di/dt ≤ -280A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
„ Pulse width ≤ 300µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = -7.2A. (See Figure 12)
2014-8-9
2
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IRF9Z24N
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
10
1
10
-4.5 V
-4.5 V
A
1
0.1
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTT OM - 4. 5V
TOP
-ID , D ra in -to -S o u rc e C u rre n t (A )
-ID , D ra in -to -S o u rce C u rre n t (A )
100
2 0µ s PU LS E W ID TH
TJ
c = 2 5°C
TOP
10
1
100
0.1
-VD S , Drain-to-Source Voltage (V)
2.0
R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce
(N o rm a li ze d )
- I D , D ra in-t o-S o urc e C urre nt (A )
TJ = 2 5 °C
TJ = 1 7 5 °C
V DS = -2 5 V
2 0 µ s P U L S E W ID T H
4
5
6
7
8
9
10
A
100
I D = -12 A
1.5
1.0
0.5
VG S = -10 V
0.0
A
-60 -40 -20
0
20
40
60
80
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
3
A
100 120 140 160 180
T J , Junction T emperature (°C)
-VG S , Ga te-to-S o urce V oltage (V )
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10
Fig 2. Typical Output Characteristics,
100
1
1
-VD S , Drain-to-Source V oltage (V )
Fig 1. Typical Output Characteristics,
10
20 µ s PU LSE W ID TH
TCJ = 1 75°C
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IRF9Z24N
20
V GS
C is s
C rs s
C os s
C , C a p a c ita n c e (p F )
600
500
C is s
400
C os s
=
=
=
=
0V ,
f = 1MH z
C gs + C g d , Cds SH OR TED
Cgd
C ds + C gd
-V G S , G a te -to -S o u rc e V o lta g e (V )
700
300
C rs s
200
100
0
10
V DS = -4 4V
V DS = -2 8V
16
12
8
4
FO R TEST C IR C U IT
SEE F IGU R E 1 3
0
A
1
I D = -7.2 A
0
100
V D S , Drain-to-Source V oltage (V)
10
15
20
A
25
Q G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
100
O PER ATIO N IN TH IS AR EA LIM ITED
BY R D S(o n)
1 0µs
-I D , D ra in C u rre n t (A )
-IS D , R e ve rse D ra in C u rre n t (A )
5
TJ = 1 50°C
10
TJ = 25 °C
1
10
100µ s
1m s
VG S = 0 V
0.1
0.4
0.6
0.8
1.0
1.2
1.4
1.6
A
T C = 2 5°C
T J = 1 75°C
Sin gle Pu lse
1
1.8
1
10m s
10
100
-VS D , S ource-to-Drain V oltage (V )
-VD S , Drain-to-Source V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
2014-8-9
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A
IRF9Z24N
12
RD
VDS
-ID , D ra i n C u rre n t (A m p s )
VGS
9
D.U.T.
RG
+
VDD
-10V
6
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
3
td(on)
tr
t d(off)
tf
VGS
10%
A
0
25
50
75
100
125
150
175
TC , C ase T emperature (°C)
90%
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
Fig 10b. Switching Time Waveforms
T herm al R esponse (Z th J C )
10
D = 0 .5 0
1
0 .2 0
0 .1 0
0 .0 5
0.1
PDM
0 .0 2
0 .0 1
t
S IN G LE P U L S E
(T H E R M A L R E S P O N S E )
1
t
Notes :
1. D uty fac tor D = t
0.01
0.00001
1
/t
2
2
2. P ea k TJ = P DM x Z th JC + T C
0.0001
0.001
0.01
0.1
A
1
t 1 , R ectan gular P ulse D uratio n (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
2014-8-9
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IRF9Z24N
250
D .U .T
RG
IA S
- 20V
tp
E A S , S in g le P u ls e A va la n c h e E n e rg y (m J)
L
VDS
VD D
A
D R IV E R
0 .0 1 Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
TO P
B OTTO M
200
150
100
50
0
A
25
I AS
ID
-2.9A
-5.1 A
-7.2 A
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.3µF
-10V
QGS
.2µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
2014-8-9
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
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IRF9Z24N
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
ƒ
+
‚
-
-
„
+

• dv/dt controlled by RG
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[
] ***
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[
]
VDD
Forward Drop
Inductor Curent
[
Ripple ≤ 5%
]
ISD
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
2014-8-9
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IRF9Z24N
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
2 . 8 7 ( .1 1 3 )
2 . 6 2 ( .1 0 3 )
1 0 . 5 4 (. 4 1 5 )
1 0 . 2 9 (. 4 0 5 )
-B -
3 . 7 8 (. 1 4 9 )
3 . 5 4 (. 1 3 9 )
4 . 6 9 ( .1 8 5 )
4 . 2 0 ( .1 6 5 )
-A -
1 .3 2 (. 0 5 2 )
1 .2 2 (. 0 4 8 )
6 . 4 7 (. 2 5 5 )
6 . 1 0 (. 2 4 0 )
4
1 5 . 2 4 ( .6 0 0 )
1 4 . 8 4 ( .5 8 4 )
L E A D A S S IG N M E N T S
1 - G A TE
2 - D R AIN
3 - SO URCE
4 - D R AIN
1 . 1 5 ( .0 4 5 )
M IN
1
2
3
1 4 . 0 9 (.5 5 5 )
1 3 . 4 7 (.5 3 0 )
4 . 0 6 (. 1 6 0 )
3 . 5 5 (. 1 4 0 )
3X
3X
1 .4 0 (. 0 5 5 )
1 .1 5 (. 0 4 5 )
0 . 9 3 ( .0 3 7 )
0 . 6 9 ( .0 2 7 )
0 .3 6 (. 0 1 4 )
3X
M
B A
M
2 .9 2 (. 1 1 5 )
2 .6 4 (. 1 0 4 )
2 . 5 4 ( .1 0 0 )
2X
NO TE S :
1 D I M E N S IO N I N G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 C O N T R O L L I N G D IM E N S IO N : I N C H
0 . 5 5 (. 0 2 2 )
0 . 4 6 (. 0 1 8 )
3 O U T L IN E C O N F O R M S T O J E D E C O U T L I N E T O -2 2 0 A B .
4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .
Part Marking Information
TO-220AB
E XPLE
AM PLE
N 1010
IRF 1010
E X AM
: T:HI TSHIISS AISN AIRF
S ELY
MB LY
W ITWH ITAHS SAESMB
T DE
CO DE
9B 1M
LO TLOCO
9B 1M
A
INRTE
T ION
IN TE
NARTNA
ION
AL AL
T IF IER
R ECRTEC
IF IER
F 1010
IR F IR
1010
LO GO
LO GO
9246
9246
9B 9B1M 1M
S SBEM
A S SAEM
LYB LY
LO
T
CO DE
LO T CO DE
2014-8-9
8
A
P A RT
NU
P A RT
NU M
BEMRBE R
D A TE
D A TE
C ODCEOD E
(Y
YW
(Y YW W ) W )
= AYE
Y Y Y=Y YE
R AR
W WW =W W= EW
EKE EK
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