2SJ486 Silicon P Channel MOS FET REJ03G0869-0300 (Previous: ADE-208-512A) Rev.3.00 Sep 07, 2005 Description Low frequency power switching Features • Low on-resistance RDS (on) = 0.5 Ω typ. (at VGS = –4 V, ID = –100 mA) • 2.5 V gate drive devices. • Small package (MPAK). Outline RENESAS Package code: PLSP0003ZB-A (Package name: MPAK) D 3 1 1. Source 2. Gate 3. Drain G 2 S Note: Marking is “ZU–”. Rev.3.00 Sep 07, 2005 page 1 of 6 2SJ486 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Value –30 Unit V VGSS ID ±10 –0.3 V A –0.6 150 A mW 150 –55 to +150 °C °C Note 1 Drain peak current Channel dissipation ID (pulse) Pch Channel temperature Storage temperature Note: Symbol VDSS Tch Tstg 1. PW ≤ 100 µs, duty cycle ≤ 10% Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min –30 Typ — Max — Unit V Gate to source breakdown voltage Zero gate voltage drain current V (BR) GSS IDSS ±10 — — — — –1.0 V µA IG = ±100 µA, VDS = 0 VDS = –30 V, VGS = 0 Gate to source leak current Gate to source cutoff voltage IGSS VGS (off) — –0.5 — — ±5.0 –1.5 µA V VGS = ±6.5 V, VDS = 0 ID = –10 µA, VDS = –5 V Static drain to source on state resistance RDS (on) RDS (on) — — 0.5 0.7 0.65 1.2 Ω Ω ID = –100 mA, VGS = –4 V Note 2 ID = –100 mA, VGS = –2.5 V Forward transfer admittance Input capacitance |yfs| Ciss 0.4 — 0.65 45 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 76 5.4 — — pF pF ID = –100 mA, VDS = –10 V VDS = –10 V VGS = 0 f = 1 MHz Turn-on delay time Rise time td (on) tr — — 120 340 — — ns ns Turn-off delay time Fall time td (off) tf — — 850 550 — — ns ns Note: 2. Pulse test Rev.3.00 Sep 07, 2005 page 2 of 6 Test Conditions ID = –10 µA, VGS = 0 Note 2 VGS = –4 V ID = –150 mA RL = 66.6 Ω Note 2 2SJ486 Main Characteristics Maximum Safe Operation Area –0.3 –0.1 100 150 Ambient Temperature –0.01 –0.003 Ta = 25°C –0.001 –0.1 –0.3 –1 200 Ta (°C) –30 –100 VDS (V) –1.0 VDS = –10 V Pulse Test –5 V ID (A) –4 V –0.8 –2.5 V –2 V –0.6 –0.4 –0.8 –0.6 Ta = 25°C Pulse Test –0.2 Drain Current –10 V ID (A) –10 Typical Transfer Characteristics –1.0 Drain Current –3 Drain to Source Voltage Typical Output Characteristics –0.4 Tc = 75°C 25°C –0.2 VGS = –1.5 V 0 n 50 Operation in this area is limited by RDS (on) tio 0 –0.03 ra 50 pe Drain Current O 100 0 0 –0.2 –0.4 –0.6 Drain to Source Voltage –0.8 –25°C 0 –1.0 Drain to Source Saturation Voltage vs. Gate to Source Voltage –0.5 Ta = 25°C Pulse Test –0.4 –0.3 –0.2 ID = –0.2 A –0.1 –0.1 A 0 0 –2 –4 –6 Gate to Source Voltage Rev.3.00 Sep 07, 2005 page 3 of 6 –8 –10 VGS (V) 0 –1 –2 –3 –4 Gate to Source Voltage VDS (V) –5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Static Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Saturation Voltage VDS (on) (V) s m t) 10 o = 1 sh ( ID (A) PW 150 1 ms C Channel Dissipation –1 200 D Pch (mW) Power vs. Temperature Derating 10 Ta = 25°C 5 Pulse Test 2 1 0.5 VGS = –2.5 V –4 V 0.2 0.1 –0.01 –0.03 –0.1 –0.3 Drain Current –1 –3 ID (A) –10 2SJ486 2.0 Pulse Test 1.4 ID = –0.1 A, –0.2 A 1.2 VGS = –2.5 V 0.8 –0.1 A, –0.2 A 0.4 –4 V 0 –40 0 40 80 Case Temperature 120 160 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) (Ω) Static Drain to Source on State Resistance vs. Temperature 5 VDS = –10 V Pulse Test 2 1 0.1 0.05 –0.01 –0.02 3000 Switching Time t (ns) Capacitance C (pF) 300 10 Crss 3 1 –4 –8 –12 –16 –20 Drain to Source Voltage VDS (V) Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) –1.0 Pulse Test –0.8 –0.6 –5 V –0.4 VGS = 0, 5 V –0.2 0 –1.2 –1.6 Source to Drain Voltage VSD 0 –0.4 –0.8 Rev.3.00 Sep 07, 2005 page 4 of 6 –1 td(off) 1000 300 tf tr –2.0 (V) td(on) 100 30 VGS = 0 f = 1 MHz 0 –0.5 Switching Characteristics 10000 Ciss –0.05 –0.1 –0.2 Drain Current ID (A) 1000 30 75°C 0.2 Typical Capacitance vs. Drain to Source Voltage Coss 25°C 0.5 Tc (°C) 100 Tc = –25°C 10 –0.05 VGS = –4 V, VDD = –10 V PW = 5 µs, duty ≤ 1 % –0.1 –0.2 Drain Current –0.5 ID (A) –1 2SJ486 Switching Time Test Circuit Waveform Vin Vout Monitor Vin Monitor 10% D.U.T. 90% RL 90% 90% Vin –10 V 50 Ω VDD = –10 V Vout td(on) Rev.3.00 Sep 07, 2005 page 5 of 6 10% tr 10% td(off) tf 2SJ486 Package Dimensions JEITA Package Code RENESAS Code SC-59A Package Name MPAK(T) / MPAK(T)V, MPAK / MPAKV PLSP0003ZB-A D MASS[Typ.] 0.011g A Q e E HE L A c LP L1 Reference Symbol A3 A x M S b A e A2 A e1 A1 S b b1 c1 I1 c b2 A-A Section Pattern of terminal position areas A A1 A2 A3 b b1 c c1 D E e HE L L1 LP x b2 e1 I1 Q Dimension in Millimeters Min 1.0 0 1.0 0.35 0.1 2.7 1.35 2.2 0.35 0.15 0.25 Nom 1.1 0.25 0.42 0.4 0.13 0.11 1.5 0.95 2.8 Max 1.3 0.1 1.2 0.5 0.15 3.1 1.65 3.0 0.75 0.55 0.65 0.05 0.55 1.95 1.05 0.3 Ordering Information Part Name 2SJ486ZU-TL-E 2SJ486ZU-TR-E Quantity 3000 pcs 3000 pcs Shipping Container Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.3.00 Sep 07, 2005 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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