H7N0308LD, H7N0308LS, H7N0308LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1124-0500 (Previous: ADE-208-1535C) Rev.5.00 Apr 07, 2006 Features • Low on-resistance RDS (on) = 3.8 mΩ typ. • Low drive current • 4.5 V gate drive device can be driven from 5 V source Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 4 4 1 1 2 1. Gate 2. Drain 3. Source 4. Drain 2 3 3 H7N0308LD H7N0308LS RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) D 4 G 1 2 3 H7N0308LM Rev.5.00 Apr 07, 2006 page 1 of 7 S H7N0308LD, H7N0308LS, H7N0308LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Symbol VDSS Value 30 Unit V VGSS ID ±20 70 V A 280 70 A A Pch θ ch-c 100 1.25 W °C/W Channel to ambient thermal impedance Channel temperature θ ch-a Tch 89 150 °C/W °C Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C Tstg –55 to +150 °C Gate to source voltage Drain current Note 1 Drain peak current Body to drain diode reverse drain current ID (pulse) IDR Note 2 Channel dissipation Channel to case thermal impedance Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min 30 Typ — Max — Unit V Test Conditions ID = 10 mA, VGS = 0 Gate to source breakdown voltage Gate to source leak current V (BR) GSS IGSS ±20 — — — — ±10 V µA IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 IDSS — 1.0 — — 10 2.5 µA V VDS = 30 V, VGS = 0 Note 3 ID = 1 mA, VDS = 10 V RDS (on) — — 3.8 6.0 4.8 8.5 mΩ mΩ ID = 35 A, VGS = 10 V Note 3 ID = 35 A, VGS = 4.5 V Forward transfer admittance Input capacitance |yfs| Ciss 54 — 90 3350 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 840 480 — — pF pF ID = 35 A, VDS = 10 V VDS = 10 V VGS = 0 f = 1 MHz Total gate charge Gate to source charge Qg Qgs — — 52 11 — — nC nC Gate to drain charge Turn-on delay time Qgd td (on) — — 10 30 — — nC ns Rise time Turn-off delay time tr td (off) — — 370 80 — — ns ns Fall time Body to drain diode forward voltage tf VDF — — 27 0.93 — — ns V trr — 60 — ns Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Body to drain diode reverse recovery time Note: 3. Pulse test Rev.5.00 Apr 07, 2006 page 2 of 7 VGS (off) Note 3 VDD = 10 V VGS = 10 V ID = 70 A VGS = 10 V, ID = 35 A RL = 0.29 Ω Rg = 4.7 Ω IF = 70 A, VGS = 0 IF = 70 A, VGS = 0 diF/dt = 50 A/µs Note 3 H7N0308LD, H7N0308LS, H7N0308LM Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area (A) 500 ID 120 Drain Current Channel Dissipation Pch (W) 160 80 40 10 1 m 10 s 0 µs 100 DC 0 50 100 on = 10 0.1 Tc (°C) 3 10 30 100 VDS (V) 100 10 V Pulse Test VDS = 10 V Pulse Test 3.5 V 4.5 V 80 1 Typical Transfer Characteristics ID (A) 100 0.3 Drain to Source Voltage Typical Output Characteristics 60 80 Drain Current 60 3V 40 20 40 Tc = 75°C 25°C 20 VGS = 2.5 V –25°C 0 0 0 2 4 6 Drain to Source Voltage 8 10 0 VDS (V) Pulse Test 400 300 ID = 50 A 200 100 20 A 10 A 0 0 4 8 12 Gate to Source Voltage Rev.5.00 Apr 07, 2006 page 3 of 7 16 20 VGS (V) 2 3 4 5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) (mΩ) 500 1 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage Drain to Source Saturation Voltage VDS(on) (mV) ms Operation in 1 this area is limited by RDS (on) 0.01 0.1 200 150 Case Temperature ID (A) PW ati Tc = 25°C 1 shot Pulse 0 Drain Current Op er 10 µs 100 Pulse Test 30 10 VGS = 4.5 V 3 10 V 1 0.3 0.1 1 3 10 30 Drain Current 100 300 ID (A) 1000 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (mΩ) H7N0308LD, H7N0308LS, H7N0308LM 12 Pulse Test 10 ID = 10 A, 20 A ID = 50 A 8 VGS = 4.5 V 6 4 10 A, 20 A, 50 A 10 V 2 0 –25 0 25 50 75 Case Temperature 100 125 150 Tc 1000 300 Tc = –25°C 100 30 75°C 25°C 10 3 VDS = 10 V Pulse Test 1 1 Capacitance C (pF) Reverse Recovery Time trr (ns) 10000 50 20 Ciss 3000 1000 Coss 300 Crss di / dt = 50 A / µs VGS = 0, Ta = 25°C 10 0.1 VGS = 0 f = 1 MHz 100 0.3 1 3 10 Reverse Drain Current 30 100 0 10 12 VDS 20 8 10 4 VDD = 20 V 10 V 5V 0 0 20 40 Gate Charge Rev.5.00 Apr 07, 2006 page 4 of 7 60 80 Qg (nc) 40 50 0 100 1000 Switching Time t (ns) 30 VGS (V) 16 Gate to Source Voltage (V) VDS VGS VDD = 5 V 10 V 20 V 30 Switching Characteristics 20 ID = 70 A 20 Drain to Source Voltage VDS (V) IDR (A) Dynamic Input Characteristics 40 100 Typical Capacitance vs. Drain to Source Voltage 100 50 30 Drain Current ID (A) (°C) Body to Drain Diode Reverse Recovery Time Drain to Source Voltage 10 3 VGS = 10 V, VDS = 10 V 500 Rg = 4.7 Ω, duty ≤ 1 % tr 200 td(off) 100 50 td(on) 20 10 0.1 tf 0.3 1 3 Drain Current 10 30 ID (A) 100 H7N0308LD, H7N0308LS, H7N0308LM Reverse Drain Current vs. Souece to Drain Voltage Reverse Drain Current IDR (A) 100 80 10 V 60 VGS = 0, –5 V 5V 40 20 Pulse Test 0 0 0.4 0.8 1.2 1.6 Source to Drain Voltage 2.0 VSD (V) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θch – c (t) = γ s (t) • θch – c 0.1 θch – c = 1.25°C/W, Tc = 25°C 0.05 0.02 0.03 PDM 1 e 0.0 puls t o h 1s D= PW T PW T 0.01 10 µ 100 µ 1m 10 m 100 m Pulse Width PW (S) Rev.5.00 Apr 07, 2006 page 5 of 7 1 10 H7N0308LD, H7N0308LS, H7N0308LM Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.5.00 Apr 07, 2006 page 6 of 7 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 H7N0308LD, H7N0308LS, H7N0308LM JEITA Package Code RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g 7.8 6.6 (2.3) 10.0 2.49 ± 0.2 7.8 7.0 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(2) 0.2 0.1 +– 0.1 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 +– 0.5 1.3 ± 0.2 Ordering Information Part Name H7N0308LD-E H7N0308LSTL-E Quantity 500 pcs 1000 pcs Shipping Container Box (Conductive Sack) Taping H7N0308LMTL-E 1000 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.5.00 Apr 07, 2006 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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