Objective: To Qualify the TSMC 11 as 2nd source for Proton/Veyron ASIC, 0.18 MS ULL OTP Fab Expansion Freescale Customer MMA8450Q, *51Q, *52Q, *53Q Name / PN: General PN / Part Name: TSMC 0.18. micron ASIC, HD Poly MEMS Package = 16 pin 3x3x1.0 mm QFN - lead free. Technology & Package code technology codes - 003Z Package: ASIC = TSMC / G-cell = OHT Fab Carsem Assembly KLM Final Test G-cell: DA01M00Z ASIC: DA00N16D QUARTZ Tracking #: Plan-Results Revision #/Date: 12-Jul-11 212099 Design Engr/ Sung-Jin Jo Phone #: (Signature/Date may be electronic) Bobby Mays 20-Sept-2010 Patricia Monteilh Product Engr/ Phone #: Maskset / Rev#: ASIC=1.955x0.931mm (1.82mm2) Die Size (in um) G-cell=2.09x1.32mm (2.76mm2) WxLxT Part Operating Temperature Grade: 3 -40 C to +85 C Green Cells Indicate Tests that will be performed LOT A 8EMPTP341500 3DUG LOT X 8EMPTP341800 (Fab3) 3DUG GROUP A - ACCELERATED ENVIRONMENTAL STRESS TESTS Lot Trace/Date Codes: LOTB 8EMPTP341600 3DUG LOT C 8EMPTP341700 3DUG Stress (Tempe or KLM) PC (Preconditioning) M=MIL883 J=JESD22 JA 113 Stress Conditions (Test Conditions shown below are typical. Modifications must be explained in the comment section) Req' Stress Readpoints Req'd Test Temps Preconditioning required for THB, UHAST, and TC Preconditioning Conditions: -Moisture Sensitivity Level (MSL) = 3 -Reflow temp = 260 +5 /- 0°C SASD CAB WW22 2011 03-0Jun-2011 CAB Approval Signature/Date: Electrical Testing After Stress Reference Bobby Mays 03-Jun-2010 NPI Quality Approval Signature/Date: Stress Test Selection Results Stress Test Location Tempe NPI PRQE/ Phone #: Prepared By Signature/Date: Bobby Mays Min Sample Size # of Lots Total Units Qual Acceptance Criteria All All All N/A 77 3 271 Zero Electrical Test Failures LotID-(#Rej/SS) Req'd (X) Lot A (0/240) Lot B (0/240) Lot C (1/240) Lot X (FAB3)-(0/113) X Lot A (0/80) Lot B (0/80) Lot C (0/80) Lot X (Fab3)-(0/27) X Not Req'd (X) Re-use Data (X) If not required, explain. Comments If data is re-used, input device name and quartz number. This preconditioning is performed on samples prior to UnBiased HAST. Temp Cycle and THB 1 unit failed PC - See CQI #447020A (root cause - particle between metal lines). An additional 130 units were re-run through PC with 0/130 failures. Room = 25 C Hot = 85 C CSAM -Perform CSAM on 5 units before and after precond Tempe THB JA101 JA110 THB Conditions (after preconditioning): Temperature = 85°C Humidity = 85% Bias = 3.6V CSAM on 5 units after THB Tempe Tempe UHST TC JA102 JA118 JA104 UHAST Conditions (after preconditioning): -Temperature = 130 °C -Humidity = 85% TC Conditions (after preconditioning): -Temperature = -40 to 125°C 168 hrs (QP) 504 hrs & 1008 hrs (FIO) Electrical testing must occur within 48 hrs after stress readpoint. 96 hrs Electrical testing must occur within 48 hrs after stress readpoint. 200 cyc (QP) 500, 1000 & 1500 cyc (FIO) CSAM: 5 units after each temp cycle readpoint. Zero CSAM Failures Room = 25 C Hot = 85 C 77 3 271 Zero Electrical Test Failures Lot A (0/80) Lot B (0/80) Lot C (0/80) Lot X (Fab3)-(0/43) X 77 3 271 Zero Electrical Test Failures Lot A (0/79) Lot B (0/80) Lot C (0/80) Lot X (Fab3)-(0/43) X Room = 25 C Hot = 85 C Room = 25 C Hot = 85 C Zero CSAM Failures TEST GROUP B - ACCELERATED LIFETIME SIMULATION TESTS Electrical Testing After Stress Results Stress Test Location Reference Stress (Tempe or KLM) M=MIL883 J=JESD22 Stress Conditions (Test Conditions shown below are typical. Modifications must be explained in the comment section) Req' Stress Readpoints Req'd Test Temps Min Sample Size # of Lots Total Units Qual Acceptance Criteria LotID-(#Rej/SS) Req'd (X) Not Req'd (X) Re-use Data (X) If not required, explain. Comments If data is re-used, input device name and quartz number. Tempe HTOL JA108 High Temp Op Life Conditions; Temperature =125°C Bias = 3.6V 77 - Electrical testing must occur within 96 hrs after stress readpoint. Tempe ELFR JA108 Early Life Failure Rate Conditions; Temperature =125°C Bias = 3.6 3 271 168 hrs (QP) 504 hrs & 1008 hrs (FIO) Zero Electrical Test Failures Lot A (0/80) Lot B (0/80) Lot C (0/80) Lot X (Fab3)-(0/43) Room = 25 C Hot = 85 C Cold = -40 C 48 hrs X 306 3 918 Room = 25 C Hot = 85 C Zero Electrical Test Failures Lot A (0/306) Lot B (0/306) Lot C (0/306) X TEST GROUP C - PACKAGE ASSEMBLY INTEGRITY TESTS Electrical Testing After Stress Results Stress Test Location Reference Stress (Tempe or CARSEM) M=MIL883 J=JESD22 Stress Conditions (Test Conditions shown below are typical. Modifications must be explained in the comment section) Req' Stress Readpoints Req'd Test Temps Wire Bond shear N/A N/A CARSEM WBS AEC Q100-001 CARSEM WBP M2011 Wire Bond Pull Cond. C or D N/A N/A CARSEM SD JB102 Solderability; 8hr. Steam age (1 hr. for Au-plated leads) prior to test on devices which have received Burn-in. N/A N/A Min Sample Size 30 bonds from minimum 5 units 30 bonds from minimum 5 units 15 # of Lots Total Units Qual Acceptance Criteria 3 15 Cpk = or > 1.67 3 15 Cpk = or > 1.67 1 15 >95% lead coverage of critical areas LotID-(#Rej/SS) Lot A - Cpk>1,67 Lot B - Cpk>1,67 Lot C - Cpk>1,67 Lot A - Cpk>1,67 Lot B - Cpk>1,67 Lot C - Cpk>1,67 N/A Req'd (X) Not Req'd (X) Re-use Data (X) If not required, explain. Comments If data is re-used, input device name and quartz number. X X Re-use data from original qual, #169117. Same assembly BOM Sample 1 test to be performed in Sn63/Pb37 solder bath. X Sample 2 test to be performed in SnAg(3.9+0/-0.5%)-Cu(0.6+0/-0.2%) solder bath. CARSEM Tempe PD JB100 DIMENSIONAL & BOM VERIFICATION Physical Dimensions PD per 98A drawing N/A N/A N/A N/A 10 3 30 Cpk = or > 1.67 N/A X N/A 10 3 30 PPE to verify PD against valid 98A drawing. PPE to verify qual lot ERF BOM is accurate. N/A X Re-use data from original qual, #169117. Same assembly BOM Re-use data from original qual, #169117. Same assembly BOM TEST GROUP D - DIE FABRICATION RELIABILITY TESTS Electrical Testing After Stress Results Stress Test Location Reference Stress (Tempe or KLM) TSMC 11 EM M=MIL883 J=JESD22 Stress Conditions (Test Conditions shown below are typical. Modifications must be explained in the comment section) Req' Stress Readpoints Req'd Test Temps Min Sample Size # of Lots Total Units Qual Acceptance Criteria Electro Migration LotID-(#Rej/SS) Req'd (X) Not Req'd (X) Re-use Data (X) N/A X TSMC 11 TDDB TSMC 11 HCI Time Dependent Dielectric Breakdown N/A Hot Carrier Injection Pass X X TEST GROUP E - ELECTRICAL VERIFICATION TESTS Electrical Testing After Stress If not required, explain. Comments If data is re-used, input device name and quartz number. Re-use data from FAB11 original qual, 0.18u MS. Report "T018CLQR023_2_0. pdf" Re-use data from Fab3 Original 0.18u MS qual. Data provided by TSMC: 'TSMC 0.18um Mixed Signal Ultra-Low Leakage (ULL) with OTP 1P6M Salicide Al_FSG 1.8&3.3V Qualification Report - Fab11' - TSMC Doc No.: T-018-CM-QR-054. Results Stress Test Location Reference Stress (Tempe or KLM) Tempe Tempe Tempe ESD (HBM) ESD (MM) ESD (CDM) M=MIL883 J=JESD22 AEC-Q100-002 AEC-Q100-003 AEC-Q100-011 Stress Conditions (Test Conditions shown below are typical. Modifications must be explained in the comment section) Electrostatic Discharge; Human Body Model (HBM); Electrostatic Discharge; Machine Model (MM); FCDM can be used to replace MM; Electrostatic Discharge; Charged Device Model (FCDM); Req' Stress Readpoints 500 / 1000 / 1500 / 2000 Volts 2500 FIO 50 / 100 / 150 / 200QP Req'd Test Temps Room = 25 C Hot = 85 C Room = 25 C Hot = 85 C 300 FIO Volts 250 / 500 for qual Min Sample Size 3 units per Voltage level 3 units per Voltage level 3 units per Voltage level # of Lots Total Units 1 12 1 1 12 12 Qual Acceptance Criteria LotID-(#Rej/SS) Zero Electrical Test Failures 500 - 0/3 1000 - 0/3 1500 - 0/3 2000 - 0/3 Zero Electrical Test Failures Zero Electrical Test Failures 750 / 1500 Volts FIO Corner pins =/> 750V; All other pins =/> 500V 50 - 0/3 100 - 0/3 150 - 0/3 200 - 0/3 Req'd (X) X X 250 - 0/3 500 - 0/3 750 - 0/3 1500 0 /3 Room = 25 C Hot = 85 C X Electrical testing must occur within 96 hrs after stress readpoint. Tempe LU AEC-Q100-004 Latch-up to be performed at 85 C KLM GL AEC-Q100-006 Electro-Thermally Induced Gate Leakage; Temperatue = 155°C Time = 4.0 min Electrical testing Voltage = +400/-400 V must occur within 96 hrs after stress readpoint. Electrical Distribution N/A Tempe ED AEC-Q100-009 Freescale spec +/- 100mA @+85C Room = 25 C Hot = 85 C 6 1 6 Zero Electrical Test Failures 0/6 6 1 6 Zero Electrical Test Failures 0/6 Room = 25 C X X 30 Room = 25 C Hot = 85 C Cold = -40 C 4 120 Cpk -= 1.33 Lot A - Cpk >= 1.33 Lot B - Cpk >= 1.33 Lot C - Cpk >= 1.33 Lot X (Fab3) - Cpk >= 1.33 X Not Req'd (X) Re-use Data (X) If not required, explain. Comments If data is re-used, input device name and quartz number.