ROHM BD9528AMUV

High Performance Regulators for PCs
Main Power Supply
for Notebook PCs
(With Built-in Linear Regulator)
BD9528AMUV
No.11030JAT46
●Description
BD9528AMUV is a 2ch switching regulator controller with high output current which can achieve low output voltage (1.0V～
5.5V) from a wide input voltage range (5.5V～28V). High efficiency for the switching regulator can be realized by utilizing an
3
TM
external N-MOSFET power transistor. A new technology called H Reg (High speed, High efficiency, High performance) is
a Rohm proprietary control method to realize ultra high transient response against load change. SLLM (Simple Light Load
Mode) technology is also integrated to improve efficiency in light load mode, providing high efficiency over a wide load range.
For protection and ease of use, 2ch LDO (5V/3.3V (total 100mA)), the soft start function, variable frequency function, short
circuit protection function with timer latch, over voltage protection, and Power good function are all built in. This switching
regulator is specially designed for Main Power Supply of laptop PC.
●Features
3
TM
1) 2ch H REG DC/DC Converter controller
2) Adjustable Simple Light Load Mode (SLLM), Quiet Light Load Mode (QLLM) and Forced continuous Mode
3) Ther mal Shut Down (TSD), Under Voltage LockOut (UVLO), Over Current Protection (OCP),
Over Voltage Protection (OVP), Short circuit protection with 0.75ms timer-latch (SCP)
4) Soft start function to minimize rush current during startup
5) Switching Frequency Variable (f=150kHz～500kHz)
6) Built-in Power good circuit
7) Built-in 2ch Linear regulator (5V/3.3V (total 100mA))
8) Built in reference voltage(0.7V)
9) VQFN032-V5050 package
10) Built-in BOOT-Di
11) Built-in output discharge
12) ESD Susceptibility ( HBM (Human Body Model) : 2kV, MM (Machine Model) : 200V )
●Applications
Laptop PC, Desktop PC, LCD-TV, Digital Components
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© 2011 ROHM Co., Ltd. All rights reserved.
1/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Maximum Absolute Ratings (Ta=25℃)
Parameter
Symbol
Limits
Unit
VIN, CTL, SW1, SW2
30 *1*2
V
6 *1*2
V
REG1+0.3 *1
V
BOOT1, BOOT2
35 *1*2
V
BOOT1-SW1, BOOT2-SW2,
HG1-SW1, HG2-SW2
7 *1*2
V
HG1
BOOT1+0.3 *1*2
V
HG2
BOOT2+0.3 *1*2
V
PGND1, PGND2
AGND±0.3 *1*2
V
Power Dissipation1
Pd1
0.38 *3
W
Power Dissipation2
Pd2
0.88 *4
W
Power Dissipation3
Pd3
3.26 *5
W
Power Dissipation4
Pd4
4.56 *6
W
Operating temperature Range
Topr
-20～+100
℃
Storage temperature Range
Tstg
-55～+150
℃
Tjmax
+150
℃
EN1, EN2, PGOOD1, PGOOD2
Vo1, Vo2, MCTL1, MCTL2
FS1, FS2, FB1, FB2, ILIM1, ILIM2,
SS1, SS2, LG1, LG2, REF,REG2
Terminal Voltage
Junction Temperature
*1 Do not however exceed Pd.
*2 Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.
*3 Reduced by 3.0mW for each increase in Ta of 1℃ over 25℃ (when don’t mounted on a heat radiation board )
*4 Reduced by 7.0mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB which has 1 layer.
(Copper foil area : 20.2mm2)
*5 Reduced by 26.1mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB which has 4 layers.
(1st and 4th copper foil area : 20.2mm2, 2nd and 3rd copper foil area : 5505mm2)
*6 Reduced by 36.5mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB which has 4 layers.
(All copper foil area : 5505mm2)
●Operating Conditions (Ta=25℃)
Parameter
Terminal Voltage
MIN ON TIME
★
Symbol
Min.
Max.
Unit
VIN
5.5
28
V
CTL
-0.3
28
V
EN1, EN2, MCTL1, MCTL2
-0.3
5.5
V
BOOT1, BOOT2
4.5
33
V
SW1, SW2
-0.3
28
V
BOOT1-SW1, BOOT2-SW2,
HG1-SW1, HG2-SW2
-0.3
5.5
V
Vo1, Vo2, PGOOD1, PGOOD2
-0.3
5.5
V
TONmin
-
150
nsec
This product should not be used in a radioactive environment.
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2/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, Ta=25℃ VIN=12V, CTL=OPEN, EN1=EN2=5V, FS1=FS2=51kΩ)
Limits
Parameter
Symbol
Unit
Min.
Typ.
Max.
VIN standby current
ISTB
70
150
250
IIN
60
130
230
ISHD
6
12
18
μA
CTL Low Voltage
VCTLL
-0.3
-
0.8
V
CTL High Voltage
VCTLH
2.3
-
28
V
CTL bias current
ICTL
-18
-12
-6
μA
EN Low Voltage
VENL
-0.3
-
0.8
V
EN High Voltage
VENH
2.3
-
5.5
V
EN bias current
IEN
-
3
6
μA
EN=3V
REG1 output voltage
VREG1
4.90
5.00
5.10
V
IREG1=1mA
Maximum current
IREG1
100
-
-
mA
IREG2=0mA*
Line Regulation
Reg.l1
-
90
180
mV
VIN=5.5 to 28V
Load Regulation
Reg.L1
-
30
50
mV
IREG1=0 to 30mA
REG2 output voltage
VREG2
3.27
3.30
3.33
V
IREG2=1mA
Maximum current
IREG2
100
-
-
mA
IREG1=0mA*
Line Regulation
Reg.l2
-
-
20
mV
VIN=5.5 to 28V
Load Regulation
Reg.L2
-
-
30
mV
IREG2=0 to 30mA
Input threshold voltage
REG1th
4.1
4.4
4.7
V
Input delay time
TREG1
1.5
3
6
ms
Switch resistance
RREG1
-
1.0
3.0
Ω
REG1_UVLO
3.9
4.2
4.5
V
dV_UVLO
50
100
200
mV
Feedback voltage1
VFB1
0.693
0.700
0.707
V
FB1 bias current
IFB1
-
0
1
μA
RDISOUT1
50
100
200
Ω
Feedback voltage2
VFB2
0.693
0.700
0.707
V
FB2 bias current
IFB2
-
0
1
μA
RDISOUT2
50
100
200
Ω
VIN bias current
VIN shut down mode current
μA
Condition
μA
EN1=EN2=0V, CTL=5V
Vo1=5V
CTL=0V
CTL=0V
[5V linear regulator](VIN)
[3.3V linear regulator]
[5V linear regulator](Vo1)
Vo1: Sweep up
[Under Voltage lock out block]
REG1 threshold voltage
Hysteresis voltage
REG1: Sweep up
REG1: Sweep down
[Output voltage sense block]
Output discharge resistance1
Output discharge resistance2
FB1=REF
FB2=REF
* IREG1+IREG2≦100mA
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© 2011 ROHM Co., Ltd. All rights reserved.
3/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●ELECTRICAL CHARACTERISTICS
(unless otherwise noted, Ta=25℃ VIN=12V, CTL=OPEN, EN1=EN2=5V, FS1=FS2=51kΩ)
Limits
Parameter
Symbol
Unit
Min.
Typ.
Max.
Condition
[H3REG block]
Ontime1
TON1
0.760
0.910
1.060
μs
Vo1= 5V
Ontime2
TON2
0.470
0.620
0.770
μs
Vo2= 3.3V
Maximum On time 1
TONMAX1
2.5
5
10
μs
Vo1= 5V
Maximum On time 2
TONMAX2
1.65
3.3
6.6
μs
Vo2= 3.3V
Minimum Off time
TOFFMIN
-
0.2
0.4
μs
HG higher side ON resistor
HGHON
-
3.0
6.0
Ω
HG lower side ON resistor
HGLON
-
2.0
4.0
Ω
LG higher side ON resistor
LGHON
-
2.0
4.0
Ω
LG lower side ON resistor
LGLON
-
0.5
1.0
Ω
VOVP
0.77
(+10%)
0.84
(+20%)
0.91
(+30%)
V
dV_OVP
50
150
300
mV
SCP threshold voltage
VSCP
0.42
(-40%)
0.49
(-30%)
0.56
(-20%)
V
Delay time
TSCP
0.4
0.75
1.5
ms
dVSMAX
80
100
120
mV
VPGTHL
0.525
(-25%)
0.595
(-15%)
0.665
(-5%)
V
VPGL
-
0.1
0.2
V
Delay time
TPGOOD
0.4
0.75
1.5
ms
Power good leakage current
ILEAKPG
-2
0
2
μA
Charge current
ISS
1.5
2.3
3.1
μA
Standby voltage
VSS_STB
-
-
50
mV
MCTL Low voltage
VMCTL_L
-0.3
-
0.3
V
MCTL High voltage
VMCTL_H
2.3
-
REG1
+0.3
V
MCTL bias current
Imctl
8
16
24
μA
[FET driver block]
[Over voltage protection block]
OVP threshold voltage
OVP Hysteresis
[Short circuit protection block]
Current limit protection block]
Offset voltage
ILIM=100kΩ
[Power good block]
Power good low threshold
Power good low voltage
IPGOOD=1mA
VPGOOD=5V
[Soft start block]
[Mode control block]
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4/29
MCTL=5V
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Output condition table
Input
EN1
Low
Low
High
High
Low
Low
High
High
CTL
Low
Low
Low
Low
High
High
High
High
EN2
Low
High
Low
High
Low
High
Low
High
Output
REG2(3.3V)
DC/DC1
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
OFF
ON
ON
ON
ON
REG1(5V)
OFF
OFF
OFF
OFF
ON
ON
ON
ON
DC/DC2
OFF
OFF
OFF
OFF
OFF
ON
OFF
ON
※ CTL pin is connected to VIN pin with 1MΩ resistor(pull up) internal IC.
※ EN pin is connected to AGND pin with 1MΩ resistor(pull down) internal IC.
2
1
31
32
22
23
PGND1
LG1
SW1
HG1
BOOT 1
PGND2
3
LG2
SW2
HG2
BOOT2
VIN
VIN
Vo2
Adjustable
Vo1
Adjustable
●Block Diagram, Application circuit
24
26
25
REG1
REG1
REG1
REG1
CL2
SCP2
OVP2
AGND
Short through
Protec tion
Circuit
Short through
Protection
Ci rc uit
13
CL1
SCP1
OVP1
FS1
FS2
11
Timer
Power Good
Timer
REG1
SCP1
PGOOD1
EN 1
F B1
Thermal
Protection
14
6
REF
12
SS1
19
ILIM2
ILIM1
17
3.3V
Reg
EN2
SW1
PGND1
MCT L
SLLM Mode C ontrol
5V
Reg
Vo1
Reference
Block
REG1
PGND2
SW2
REF
8
CL1
Over Current
Protect
CL2
Over Current
Protect
SS2
20
REF
REF
UVLO
EN 2
TM
H Reg
Controller
Bloc k
FS1
Short Circuit Protect
FS2
OVP1
3
TM
H Reg
Controller
Block
FB2
SLLM
Block
MCTL
TSD
OVP2
Over Voltage Protect
Timer
Short Circuit Protect
Timer
Power Good
3
MCTL
Over Voltage Protect
SLLM
Block
SCP2
REG1
TM
TM
5
PGOOD2
RFS1
15
10
EN1
4
16
Vo1
MCT L2
REG2
18
27
3.3V
REG2
5V
REG1
5.5～28V
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© 2011 ROHM Co., Ltd. All rights reserved.
28
REG1
VIN
29
MCT L1
30
9
VIN
7
C TL
Vo2
21
5/29
2011.11 - Rev.A
Technical Note
24
ILIM1
PGOOD1
EN1
BOOT1
MCTL1
18
Input
17
25
16
26
15
27
14
28
13
FIN
MCTL2
FS1
FB1
AGND
30
11
31
10
32
9
1
2
3
4
5
6
7
8
ILIM2
12 REF
Vo2
29
SS2
LG2
PGND2
19
PGOOD2
VIN
20
EN2
REG1
21
BOOT2
Vo1
REG2
22
HG2
LG1
23
SW2
PGND1
HG1
SW1
●Pin Configuration
SS1
BD9528AMUV
●Pin Function Table
PIN No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN name
SW2
HG2
BOOT2
EN2
PGOOD2
SS2
Vo2
ILIM2
CTL
FS2
FB2
REF
AGND
FB1
FS1
MCTL2
ILIM1
MCTL1
SS1
PGOOD1
21
EN1
22
23
24
25
26
27
28
29
30
31
32
reverse
BOOT1
HG1
SW1
PGND1
LG1
Vo1
REG2
REG1
VIN
LG2
PGND2
FIN
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© 2011 ROHM Co., Ltd. All rights reserved.
MCTL1
Low
Low
High
High
MCTL2
Low
High
Low
High
Control Mode
SLLM
QLLM
Forced Continuous Mode
Forced Continuous Mode
※ MCTL pin is connected to AGND pin with 500kΩ resistor ( pull down) internal IC
FB2
FS2
CTL
PIN Function
Highside FET source pin 2
Highside FET gate drive pin 2
HG Driver power supply pin 2
Vo2 ON/OFF pin (High=ON, Low,OPEN=OFF)
Vo2 Power Good Open Drain Output pin
Vo2 Soft start pin
Vo2 Output voltage sense pin
OCP setting pin 2
Linear regulator ON/OFF pin (High,OPEN=ON, Low=OFF)
Input pin for setting Vo2 frequency
Vo2 output voltage feedback pin
Output voltage setting pin
Input pin Ground
Vo1 output voltage feedback pin
Input pin for setting Vo1 frequency
Mode switch pin 2 ( OPEN = L )
OCP setting pin 1
Mode switch pin 1 ( OPEN = L )
Vo1 Soft start pin
Vo1 Power Good Open Drain Output pin
Vo1 ON/OFF pin
(High=ON, Low,OPEN=OFF)
HG Driver power supply pin
Highside FET gate drive pin 1
Highside FET source pin 1
Lowside FET source pin 1
Lowside FET gate drive pin 1
Vo1 Output voltage sense pin
3.3V Linear regulator output pin
5V Linear regulator output pin
Power supply input pin
Lowside FET gate drive pin 2
Lowside FET source pin 2
Exposed Pad1, connect to GND
6/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Reference data
HG
10V/div
SW
10V/div
HG
10V/div
SW
10V/div
HG
10V/div
SW
10V/div
LG
5V/div
LG
5V/div
LG
5V/div
2μs
2μs
Fig.1 Switching Waveform
(Vo=5V, Io=0A, PWM)
Fig.2 Switching Waveform
(Vo=5V, Io=8A, PWM)
Fig.3 Switching Waveform
(Vo=5V, Io=0A, QLLM)
HG
10V/div
SW
10V/div
HG
10V/div
SW
10V/div
HG
10V/div
SW
10V/div
LG
5V/div
LG
5V/div
LG
5V/div
10μs
2μs
Fig.4 Switching Waveform
(Vo=5V, Io=0A, SLLM)
2μs
Fig.5 Switching Waveform
(Vo=3.3V, Io=0A, PWM)
Fig.6 Switching Waveform
(Vo=3.3V, Io=8A, PWM)
10μs
2μs
10μs
Fig.7 Switching Waveform
(Vo=3.3V, Io=0A, QLLM)
HG
10V/div
SW
10V/div
LG
5V/div
HG
10V/div
SW
10V/div
LG
5V/div
HG
10V/div
SW
10V/div
LG
5V/div
2μs
10μs
Fig.8 Switching Waveform
(Vo=3.3V, Io=0A, SLLM)
Fig.9 Switching Waveform
(Vo=1V, Io=0A, PWM)
HG
10V/div
SW
10V/div
HG
10V/div
SW
10V/div
HG
10V/div
SW
10V/div
LG
5V/div
LG
5V/div
LG
5V/div
Fig.10 Switching Waveform
(Vo=1V, Io=8A, PWM)
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10μs
Fig.11 Switching Waveform
(Vo=1V, Io=0A, QLLM)
7/29
10μs
Fig.12 Switching Waveform
(Vo=1V, Io=0A, SLLM)
2011.11 - Rev.A
Technical Note
BD9528AMUV
100
100
80
80
100
80
7V
7V
7V
12V
40
12V
60
12V
40
21V
η[%]
60
η[%]
η[%]
●Reference data
21V
20
20
1
10
100
1000
21V
40
20
0
0
60
0
1
10000
10
100
1000
10000
1
10
100
Io[mA]
Io[mA]
Fig.13 Efficiency
(Vo=5V, PWM)
Fig.14 Efficiency
(Vo=5V, QLLM)
10000
Fig.15 Efficiency
(Vo=5V, SLLM)
100
100
1000
Io[mA]
100
5V
80
7V
21V
40
21V
40
60
12V
40
21V
20
20
20
0
0
0
1
10
100
Io[mA]
1000
1
10000
10
100
1000
1
10000
7V
12V
η[%]
60
21V
40
20
21V
40
1
10
100
1000
10000
Io[mA]
1
10
100
1000
10000
20μs
21V
1
10
100
1000
Vo
100mV/div
20μs
Vo
100mV/div
Vo
100mV/div
IL
5A/div
IO
5A/div
IL
5A/div
IO
5A/div
IL
5A/div
IO
5A/div
Fig.23 Transient Response
(Vo=5V, PWM, Io=8→0A)
8/29
10000
Fig.21 Efficiency
(Vo=1V, SLLM)
20μs
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40
Io[mA]
Fig.20 Efficiency
(Vo=1V, QLLM)
Fig.22 Transient Response
(Vo=5V, PWM, Io=0→8A)
12V
0
0
Io[mA]
Fig.19 Efficiency
(Vo=1V, PWM)
60
20
20
0
7V
80
η[%]
12V
10000
100
80
60
1000
Fig.18 Efficiency
(Vo=3.3V, SLLM)
100
7V
100
Io[mA]
Fig.17 Efficiency
(Vo=3.3V, QLLM)
100
80
10
Io[mA]
Fig.16 Efficiency
(Vo=3.3V, PWM)
η[%]
7V
12V
60
η[%]
η[%]
60
80
7V
12V
η[%]
80
Fig.24 Transient Response
(Vo=3.3V, PWM, Io=0→8A)
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Reference data
20μs
20μs
20μs
Vo
100mV/div
Vo
100mV/div
Vo
100mV/div
IL
5A/div
IO
5A/div
IL
5A/div
IO
5A/div
IL
5A/div
IO
5A/div
Fig.25 Transient Response
(Vo=3.3V, PWM, Io=8→0A)
Fig.26 Transient Response
(Vo=1V, PWM, Io=0→8A)
Vo
50mV/div
Fig.27 Transient Response
(Vo=1V, PWM, Io=8→0A)
2μs
2μs
Fig.28 Output Voltage
(Vo=5V, PWM, Io=0A)
10μs
Fig.29 Output Voltage
(Vo=5V, PWM, Io=8A)
Vo
50mV/div
Fig.30 Output Voltage
(Vo=5V, QLLM, Io=0A)
2μs
2μs
Fig.32 Output Voltage
(Vo=3.3V, PWM, Io=0A)
Vo
50mV/div
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© 2011 ROHM Co., Ltd. All rights reserved.
Fig.33 Output Voltage
(Vo=3.3V, PWM, Io=8A)
Vo
50mV/div
10μs
Fig.34 Output Voltage
(Vo=3.3V, QLLM, Io=0A)
Vo
50mV/div
Vo
50mV/div
2μs
Fig.31 Output Voltage
(Vo=5V, SLLM, Io=0A)
Vo
50mV/div
Vo
50mV/div
2μs
Fig.35 Output Voltage
(Vo=3.3V, SLLM, Io=0A)
9/29
Vo
50mV/div
2μs
Fig.36 Output Voltage
(Vo=1V, PWM, Io=0A)
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Reference data
Vo
50mV/div
Vo
50mV/div
Vo
50mV/div
10μs
2μs
Fig.37 Output Voltage
(Vo=1V, PWM, Io=8A)
2μs
Fig.38 Output Voltage
(Vo=1V, QLLM, Io=0A)
Fig.39 Output Voltage
(Vo=1V, SLLM, Io=0A)
EN1
5V/div
EN1
5V/div
EN1
5V/div
Vo1
2V/div
Vo1
2V/div
Vo1
2V/div
EN2
5V/div
EN2
5V/div
EN2
5V/div
Vo2
2V/div
Vo2
2V/div
Vo2
2V/div
Fig.40 Wake up waveform
(EN1=EN2)
Fig.42 Wake up waveform
(EN1→EN2)
Fig.41 Wake up waveform
(EN2→EN1)
IOUT-frequency (VOUT=5V, R(FS)=68kΩ)
frequency [kHz]
PGOOD1
2V/div
EN2
5V/div
500
450
450
400
VIN=7.5V
VIN=12V
VIN=18V
350
PGOOD2
2V/div
IOUT-frequency (VOUT=5V, R(FS)=68kΩ)
500
frequency [kHz]
EN1
5V/div
400
VIN=7.5V
VIN=12V
VIN=18V
350
300
300
0
1
2
3
4
5
6
7
0
1
2
3
IOUT [A]
700
2.5
5
6
7
Fig.45 Io-frequency
(Vo=3.3V, PWM, RFS=68kΩ)
Fig.44 Io-frequency
(Vo=5V, PWM, RFS=68kΩ)
Fig.43 Wake up waveform
(EN1/2→PGOOD1/2)
4
IOUT [A]
5.500
5.000
600
VOUT=5V
500
frequency [kHz]
ONTIME [usec]
VOUT=3.3V
1.5
1
VOUT=5V
4.500
VOUT=3.3V
4.000
VIN=7.5V(-5℃）
VIN=21V（-5℃）
VIN=7.5V(75℃）
3.500
400
VOUT [V]
2
300
VIN=21V（75℃）
3.000
2.500
2.000
200
1.500
0.5
1.000
100
0.500
0
0
0
50
100
150
RFS [kΩ]
Fig.46 FS-ONTIME
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0.000
0
50
100
RFS [kΩ]
Fig.47 FS-frequency
10/29
150
0
2
4
6
8
10
12
14
16
IOUT [A]
Fig.48 Ta-IOCP
(Vo=5V)
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Reference data
IOUT - REG2 voltage
IOUT - REG1 voltage
3.500
3.000
5.1
3.4
5
3.3
REG1 voltage [V]
VIN=21V（-5℃）
VOUT [V]
VIN=7.5V(75℃）
VIN=21V（75℃）
2.000
1.500
REG2 voltage [V]
VIN=7.5V(-5℃）
2.500
4.9
4.8
4.7
1.000
3.2
3.1
3
2.9
4.6
0.500
2.8
4.5
0.000
0
2
4
6
8
10
12
14
16
IOUT [A]
Fig.49 Ta-IOCP
(Vo=3.3V)
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0
50
100
150
200
IOUT [mA]
Fig.50 IREG1-REG1
11/29
250
0
50
100
150
200
250
IOUT [mA]
Fig.51 IREG2-REG2
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Pin Descriptions
・VIN (30 pin)
This is the main power supply pin. The input supply voltage range is 5.5V to 28V. The duty cycle of BD9528AMUV is
determined by input voltage and control output voltage. Therefore, when VIN voltage fluctuated, the output voltage also
becomes unstable. Since VIN line is also the input voltage of switching regulator, stability depends on the impedance of
the voltage supply. It is recommended to establish bypass capacitor and CR filter suitable for the actual application.
・CTL (9 pin)
When CTL pin voltage is at least 2.3V, the status of the linear regulator output becomes active (REG1=5V, REG2=3.3V).
Conversely, the status switches off when CTL pin voltage goes lower than 0.8V. The switching regulator doesn’t become
active when the status of CTL pin is low, if the status of EN pin is high.
(※CTL pin is connected to VIN pin with 1MΩ resistor(pull up) intermall IC)
・EN1, 2 (21 pin, 4 pin)
When EN pin voltage is at least 2.3V, the status of the switching regulator becomes active. Conversely, the status switches
off when EN pin voltage goes lower than 0.8V.
(※EN pin is connected to AGND pin with 1MΩ resistor(pull down) intermall IC)
・REG1 (29 pin)
This is the output pin for 5V linear regulator and also active in power supply for driver and control circuit of the inside. The
standby function for REG1 is determined by CTL pin. The voltage is 5V, with 100mA current ability. It is recommended that
a 10μF capacitor (X5R or X7R) be established between REG1 and GND.
・REG2 (28 pin)
This is the output pin for 3.3V linear regulator. The standby function for REG2 is determined by CTL. The voltage is 3.3V,
with 100mA current ability. It is recommended that a 10μF capacitor (X5R or X7R) be established between REG2 and
GND.
・REF (12 pin)
This is the setting pin for output voltage of switching regulator. This IC controls the voltage in the status of REF≒FB.
・FB 1, 2 (14 pin, 11 pin)
This is the feedback pin from the output of switching regulator. This IC controls the voltage in the status of REF≒FB.
・Vo1 (27 pin)
This is the output discharge pin, and output voltage feedback pin for frequency setting. When the voltage is beyond 4.4V
from the external power supply during operation, it supplies REG1.
・Vo2 (7 pin)
This is the output discharge pin, and output voltage feedback pin for frequency setting.
・SS1, 2 (19 pin, 6 pin)
This is the setting pin for soft start. The rising time is determined by the capacitor connected between SS and GND, and
the fixed current inside IC after it is the status of low in standby mode. It controls the output voltage till SS voltage catch up
the REF pin to become the SS terminal voltage.
・FS1, 2 (15 pin, 10 pin)
This is the input pin for setting the frequency. It is available to set it in frequency range is 150kHz to 500kHz.
・ILIM1, 2 (17 pin, 8 pin)
BD9528AMUV detects voltage differential between SW and PGND, and set OCP. OCP setting current value is determined
by the resistance value of ILIM pin. FET of various Ron is available.
・PGOOD 1, 2 (20 pin, 5 pin)
This is the open drain pin for deciding the output of switching regulator.
・MCTL1, 2 (18 pin, 16 pin)
This is the switching shift pin for SLLM (Simple Light Load Mode). MCTL pin is at low level when it goes lower than 0.8V,
and at high level when it goes higher than 2.3V.
(※MCTL pin is connected to AGND pin with 500kΩ resistor(pull down) intermall IC)
・AGND (13 pin)
This is the ground pin.
・BOOT1, 2 (22 pin, 3 pin)
This is the power supply pin for high side FET driver. The maximum voltage range to GND pin is to 35V, to SW pin is to 7V.
In switching operations, the voltage swings from (VIN+REG1) to REG1 by BOOT pin operation.
・HG1, 2 (23 pin, 2 pin)
This is the highside FET gate drive pin. It is operated in switching between BOOT to SW. In case the output MOS is 3ohm
/the status of Hi, 2ohm/the status of Low, it is operated hi-side FET gate in high speed.
・SW1, 2 (24 pin, 1 pin)
This is the ground pin for high side FET drive. The maximum voltage range to GND pin is to 30V. Switching operation
swings from the status of BOOT to the status of GND.
・LG1, 2 (26 pin, 31 pin)
This is the lowside FET gate drive pin. It is operated in switching between REG1 to PGND. In case the output MOS is
2ohm /the status of Hi, 0.5ohm/the status of Low, it is operated low-side FET gate in high speed.
・PGND1, 2 (25 pin, 32 pin)
This is the ground pin for low side FET drive.
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12/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Explanation of Operation
3
The BD9528AMUV is a 2ch synchronous buck regulator controller incorporating ROHM’s proprietary H REG CONTROLLA
control system. Because controlling of output voltage by a comparator, high response is realized with not relying on the
switching frequency. And, when VOUT drops due to a rapid load change, the system quickly restores VOUT by extending the
TON time interval. Thus, it serves to improve the regulator’s transient response. Activating the Light Load Mode will also
exercise Simple Light Load Mode (SLLM) control when the load is light, to further increase efficiency.
VIN
3
TM
H Reg control
Comparator for
output voltage control
Vout/Vin
Circuit
FB
HG
A
Driver
B
VOUT
SW
LG
Internal
reference
voltage
REF
Transient
Circuit
(Normal operation)
When FB falls to a reference voltage (REF),
the drop is detected, activating the H3REG CONTROLLA
system.<Route A>
FB
REF
tON==
HG
VOUT
VIN
×
1
[sec]・・・(1)
f
HG output is determined by the formula above.
After the status of HG is OFF, LG go on outputting until
output voltage become FB=REF.
LG
(VOUT drops due to a rapid load change)
FB
REF
Io
When VOUT drops due to a rapid load change, and the
voltage remains below reference voltage after the
programmed tON time interval has elapsed (Output of a
comparator for output voltage control =H), the system
quickly restores VOUT by extending the tON time,
improving the transient response.<Route B> After VOUT
restores (FB=REF), HG turns to be OFF, and it goes back
to a normal operation.
tON +α
HG
LG
(when VIN drops)
VIN
tON1
tON2
tON3
tON4
tON4+α
TM
H3Reg
HG
tOFF1
t OFF2
t OFF3
tOFF4=tOFF3
tOFF4=t OFF3
LG
FB
REF
Output voltage drops
FB=REF
If VIN voltage drops because of the battery voltage fall, ontime tON and offtime tOFF is determined by the following formula:
tON=VOUT/VIN×I/f and tOFF=(VIN-VOUT)/VIN×f so that tON lengthen and tOFF shorten to keep output voltage constant.
However, if VIN still drops and tOFF equals to tminoff (tminoff:Minimum OFF time, regulated inside IC) , because tOFF
cannot shorten any more, as a result output voltage drops. In H3RegTM system, lengthening tON time than regulated tON
(lengthen tON time until FB＞REF) enables to operate stable not to drop the output voltage even if VIN turns to be low. With
the reason above, it is suitable for 2-cell battery.
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13/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
Light Load Control
(SLLM)
FB
In SLLM, when the status of LG is OFF and the coil current
is within 0A (it flows to SW from VOUT.), SLLM function is
operated to prevent output next HG. The status of HG is
ON, when FB falls below reference voltage again.
HG
LG
0A
(QLLM)
FB
In QLLM, when the status of LG is OFF and the coil current
is within 0A (it flows to SW from VOUT.), QLLM function is
operated to prevent output next HG.
Then, FB falls below the output programmed voltage within
the programmed time (typ=40μs), the status of HG is ON.
In case FB doesn’t fall in the programmed time, the status
of LG is ON forcedly and VOUT falls. As a result, he status
of next HG is ON.
REF
HG
LG
0A
MCTL1
L
L
H
MCTL2
L
H
X
Control mode
SLLM
QLLM
PWM
Running
PWM
PWM
PWM
The BD9528AMUV operates in PWM mode until SS pin
reaches cramp voltage (2.5V), regardless of the control
mode setting, in order to operate stable during the
operation.
*Attention: H3RegTMCONTROLLA monitors the supplying current from
capacitor to load, using the ESR of output capacitor, and realize
the rapid response. Bypass capacitor used at each load (Ex.
Ceramic capacitor) exercises the effect with connecting to each
load side. Do not put a ceramic capacitor on COUT side of
power supply.
COUT
●Timing Chart
• Soft Start Function
Load
Soft start is exercised with the EN pin set high. Current
control takes effect at startup, enabling a moderate
output voltage “ramping start.” Soft start timing and
incoming current are calculated with formulas (2) and
(3) below.
EN
Tss
Soft start time
SS
TSS =
VOUT
REF×Css
2.3μA(typ)
[sec] ・・・(2)
Incoming current
IIN
IIN =
Co×VOUT
Tss
[A] ・・・(3)
(Css: Soft start capacitor; Co: Output capacitor)
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14/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
Notes when waking up with CTL pin or VIN pin
If EN pin is High or short (or pull up resistor) to REG1 pin, IC starts up by switching CTL pin, the IC might fail to start
up (SCP function) with the reason below, please be careful of SS pin and REF pin capacitor capacity.
REG1 REG2
FB
VIN
Inner
reference
circuit
CTL
BG
SCP circuit
Delay
REF
SCP_REF
SCP
1ms(typ.)
SCP
PWM
SS
(Switching control signal)
CTL
(Vin)
REG1(5V)
REG2(3.3V)
SS
SCP becomes valid from the point
SS reached 1.5V.
SCP invalid for
SS has not reached 1.5V.
about 1.5V
FB
FB
SCP_REF
SCP is effective at SCP_REF>FB condition.
SCP protection (function) activates when output shorts
and FB falls below the activation standard of SCP.
FB
SCP valid area
REF
Inclination of REF is influenced
by the external condenser connected to REF.
FB
SCP is valid here,
because this is SCP valid
area and also because FB
fall below SCP_REF.
SCP is valid here,but with FB
exceeding SCP_REF it is normally
activate-able area.
SCP will be effective with
EN=ON at this section.
EN
Start up NG
SW
SCP
EN
Start up OK
SW
※ To be accurate,Delay occurs after SCP activating.
But this shows the relationship of each signals briefly.
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15/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Output Discharge
It will be available to use if connecting VOUT pin to DC/DC output.
(Total about 100Ω) . Discharge function operates when ①EN=’L’
②UVLO=ON(If input voltage is low) ③SCP Latch time ④TSD=ON.
The function at output discharge time is shown as left.
VIN,CTL
EN
(1)during EN=’H’→‘L’
If EN pin voltage is below than EN threshold voltage, output
discharge function is operated, and discharge output capacitor
charge.
VOUT
VIN, CTL
REG1
VOUT
The efficiency of
VIN voltage drop
Output Discharge
Output Hi-Z
UVLO ON
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(2) during VIN=CTL=H→0V
① IC is in normal operation until REG1 voltage becomes lower than
UVLO voltage. However, because VIN voltage also becomes low,
output voltage will drop, too.
② If REG1 voltage reaches the UVLO voltage, output discharge
function is operated, and discharge output capacitor charge.
③ In addition, if REG1 voltage drops, inner IC logic cannot operate, so
that output discharge function does not work, and becomes output
Hi-z. (In case, FB has resistor against GND, discharge at the
resistor.）
16/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
・Timer Latch Type Short Circuit Protection
FB
Short protection kicks in when output falls to or below
REF X 0.7.
When the programmed time period elapses, output is
latched OFF to prevent destruction of the IC. (HG=Low,
LG=Low) Output voltage can be restored either by
reconnecting the EN pin or disabling UVLO.
REF×0.7
SCP
0.75ms(typ)
EN / UVLO
・Over Voltage Protection
When output rise to or above REF×1.2 (typ), output
over voltage protection is exercised, and low side FET
goes up maximum for reducing output.(LG=High,
HG=Low).When output falls, output voltage can be
restored., and go back to the normal operation.
REF×1.2
FB
HG
LG
Switching
・Over current protection circuit
tON
tON
tON
tON
During the normal operation, when FB becomes less
than REF, HG becomes High during the time tON, and
after HG becomes OFF, it output LG.
However, when inductor current exceeds ILIMIT
threshold, next HG pulse doesn’t pulsate until it is lower
than ILIMIT level.
HG
LG
IL
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17/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●External Component Selection
1. Inductor (L) selection
The inductor value is a major influence on the output ripple current.
As formula (4) below indicates, the greater the inductor or the switching
frequency, the lower the ripple current.
⊿IL
⊿IL=
VIN
(VIN-VOUT)×VOUT
L×VIN×f
[A]・・・(4)
The proper output ripple current setting is about 30% of maximum
output current.
IL
VOUT
⊿IL=0.3×IOUTmax. [A]・・・(5)
L
Co
L=
(VIN-VOUT)×VOUT
⊿IL×VIN×f
[H]・・・(6)
(⊿IL: output ripple current; f: switch frequency)
Output ripple current
※Passing a current larger than the inductor’s rated current will cause magnetic saturation in the inductor and decrease
system efficiency. In selecting the inductor, be sure to allow enough margin to assure that peak current does not exceed
the inductor rated current value.
※To minimize possible inductor damage and maximize efficiency, choose a inductor with a low (DCR, ACR) resistance.
2.Output Capacitor (CO) Selection
When determining the proper output capacitor, be sure to factor in the equivalent
series resistance required to smooth out ripple volume and maintain a stable
output voltage range.
Output ripple voltage is determined as in formula (7) below.
VIN
VOUT
L
ESR
ESL CEXT
Load
Co
⊿VOUT=⊿IL×ESR+ESL×⊿IL/TON・・・(7)
(⊿IL: Output ripple current、ESR: CO equivalent series resistance、
ESL: CO equivalent series inductance)
※In selecting a capacitor, make sure the capacitor rating allows sufficient margin
relative to output voltage. Note that a lower ESR can minimize output ripple voltage.
Output Capacitor
Please give due consideration to the conditions in formula (8) below for output capacity, bear in mind that output rise time
must be established within the soft start time frame. Capacitor for bypass capacitor is connected to Load side which
connect to output in output capacitor capacity (CEXT, figure above). Please set the soft start time or over current detecting
value, regarding these capacities.
Co+CEXT ≦
TSS×(Limit-IOUT)
VOUT
Tss: Soft start time
Limit: Over current detection
・・・(8)
Note: Improper capacitor may cause startup malfunctions.
3. Input Capacitor (Cin) Selection
The input capacitor selected must have low enough ESR resistance to fully support
large ripple output, in order to prevent extreme over current. The formula for ripple
current IRMS is given in (9) below.
VIN
Cin
VOUT
L
IRMS=IOUT×
VIN (VIN-VOUT)
Co
[A]・・・(9)
VIN
Where VIN=2×VOUT, IRMS =
IOUT
2
Input Capacitor
A low ESR capacitor is recommended to reduce ESR loss and maximize efficiency.
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18/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
4. MOSFET Selection
MOSFET may cause the loss as below, so please select proper FET for each.
VIN
＜Loss on the main MOSFET＞
Pmain=PRON+PGATE+PTRAN
main switch
VOUT
=
L
VOUT
VIN
×RON×IOUT2+Ciss×f×VDD+
VIN2×Crss×IOUT×f
・・・(10)
IDRIVE
(Ron: On-resistance of FET; Ciss: FET gate capacitance;
f: Switching frequency Crss: FET inverse transfer function;
IDRIVE: Gate peak current)
Co
synchronous switch
＜Loss on the synchronous MOSFET＞
Psyn=PRON+PGATE
=
VIN-VOUT
×RON×IOUT2+Ciss×f×VDD
VIN
・・・(11)
5. Setting output voltage
This IC is operated that output voltage is REF≒FB.
And it is operated that output voltage is feed back to FB pin.
<Output Voltage>
VOUT =
(R1+R2)
R2
×REF(0.7V)+
1
⊿VOUT
2
(⊿VOUT: Output ripple voltage)
(⊿IL: ripple current of coil)
⊿VOUT =⊿IL×ESR
⊿IL =( VIN - VOUT)×
※(Notice)
VOUT
(L×VIN×f)
(L: inductance[H] f: switching frequency[Hz])
Please set ⊿FB more than 10mV
Ex. VIN=20V,VOUT=5V,f=300kHz,L=2.5uH,ESR=20mΩ,R1=56kΩ,R2=9.1kΩ
-6
3
⊿IL =(20V-5V)×5V/(2.5×10 H×20V×300×10 Hz)=5[A]
-3
⊿VOUT=5A×20×10 Ω=0.1[V]
VOUT=0.7V×(56kΩ+9.1kΩ)/9.1kΩ+1/2×0.1V=5.057[V]
⊿IL =(20V-5V)×
5V
=5(A)
(2.5×10-6H×20V×300×103Hz)
⊿VOUT =5A×20×10-3Ω=0.1(V)
VOUT =0.7V×
(51kΩ+ 9.1kΩ)
+
9.1kΩ
VIN
H3REG
CONTROLLA
REF
1
×0.1V=5.057(V)
2
R
Q
VIN
Output voltage
SLLM
Driver
Circuit
S
SLLM
FB
R1
R2
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19/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
6. Setting over current protection
Detecting the ON resistance (between SW and PGND voltage) of MOSFET at
low side, it set the over current voltage protection.
Over current reference voltage (ILIM_ref) is determined as in formula(12) below.
VIN
VOUT
SW
(RILIM: Resistance for setting of over current voltage protection value[kΩ]
RON: Low side ON resistance value of FET[mΩ])
Co
PGND
RILIM
10k
[A]・・・(12)
RILIM[kΩ] ×RON[mΩ]
ILIM_ref=
L
However, the value, which set the over current protection actually, is
determined by the formula (13) below.
1
⊿IL
Iocp= ILIM_ref +
2
1
I × Vo ・・・(13)
× VIN - Vo ×
= ILIM_ref +
VIN
2
f
L
(⊿IL:Coil ripple current[A]、VIN:Input voltage[V]、Vo:Output voltage [V]
f:Switching frequency [HZ]、L:Coil inductance [H])
Coil current
Iocp
ILIM_ref
(Example)
If load current 5A want to be realized with VIN=6～19V、VOUT=5V、f=400ｋHZ、L=2.5uH、RON=20mΩ, the formula would
be below.
10k
1
I × Vo ＞ 5
× VIN - Vo ×
Iocp=
+
RILIM[kΩ] ×RON[mΩ]
VIN
f
2
L
When VIN=6V, Iocp will be minimum(this is because the ripple current is also minimum) so that if each condition is input,
the formula will be the following: RILIM＜109.1[kΩ].
※To design the actual board, please consider enough margin for FET ON resistor dispersion, Coil inductor dispersion, IC
over current reference value dispersion, frequency dispersion.
7. Relation between output voltage and TON time
The BD9528AMUV, both 1ch and 2ch, are high efficiency synchronous regulator controller with frequency variable.
TON time varies with Input voltage [VIN], output voltage [VOUT], and RFS of FS pin resistance.
TON time is calculated with the following formula:
VOUT・RFS
VIN
Ton =k
[nsec]・・・(14)
From TON time above, frequency on application condition is following:
VOUT
Frequency =
1
Ton
×
VIN
[kHz]・・・(15)
However, real-life considerations (such as the external MOSFET gate capacitor and switching speed) must be factored in
as they affect the overall switching rise and fall time, so please confirm in reality by the instrument.
3.5
VIN=7V
VIN=12V
1.5
VIN=7V
0.8
VIN=21V
VIN=12V
0.7
ontime[us]
ontime[us]
2
0.9
VIN=12V
2
VIN=21V
2.5
ontime[us]
1
2.5
VIN=7V
3
1.5
1
VIN=21V
0.6
0.5
0.4
0.3
1
0.2
0.5
0.5
0.1
0
0
0
0
20
40
60
80
100
RFS[kΩ]
RFS – ontime(VOUT=5V)
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120
0
20
40
60
RFS[kΩ]
80
100
RFS – ontime(VOUT=3.3V)
20/29
120
0
20
40
60
RFS[kΩ]
80
100
120
RFS – ontime(VOUT=1V)
2011.11 - Rev.A
Technical Note
BD9528AMUV
8. Relation between output voltage and frequency
Because the BD9528AMUV is TON time focused regulator controller, if output current is up, switching loss of Coil,
MOSFET and output capacitor will increase, and frequency will be fast.
Loss of each Coil, MOSFET and output capacitor are below.
① Coil loss
= IOUT2 × DCR
② MOSFET(High Side) loss
= IOUT2 × Ronh ×
③ MOSFET(Low Side) loss
2
= IOUT × RonL × (1-
VOUT
VIN
VOUT
VIN
)
(Ronh : ON resistance of high side MOSFET, Ronl : ON resistance of low side MOSFET,
ESR : Output capacitor equivalent cascade resistance)
Regarding those loss above and frequency formula, it is determined below.
T (=1/Freq) =
VIN × IOUT × Ton
VOUT × IOUT + ① + ② + ③
・・・(17)
However, real-life considerations (such as parasitic resistance element of Layout pattern) must be factored in as they
affect the loss, please confirm in reality by the instrument.
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© 2011 ROHM Co., Ltd. All rights reserved.
21/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●I/O Equivalent Circuit
1, 24pin (SW2, SW1)
BOOT
2, 23pin (HG2, HG1)
BOOT
3, 22pin (BOOT2, BOOT1)
BOOT
HG
HG
SW
SW
4, 21pin (EN2, EN1)
5, 20pin (PGOOD2, PGOOD1)
6, 19pin (SS2, SS1)
REG1
12pin (REF)
11, 14pin (FB2, FB1)
10, 15pin (FS2, FS1)
9pin (CTL)
26, 31pin (LG1, LG2)
REG1
16, 18pin (MCTL2, MCTL 1)
VIN
REG1
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© 2011 ROHM Co., Ltd. All rights reserved.
22/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●I/O Equivalent Circuit
7, 27pin (Vo2, Vo1)
28pin (REG2)
29pin (REG1)
REG1
30pin (VIN)
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© 2011 ROHM Co., Ltd. All rights reserved.
VIN
VIN
8, 17pin (ILIM2, ILIM1)
23/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Evaluation Board Circuit (Vo1=5V/8A, f1=300kHz Vo2=3.3V/8A f2=300kHz)
VIN
12V
CTL
VIN
30
VIN
9
CTL
C1
CTL
BOOT1
EN1
REG1
HG1
EN1
REG1
VIN
BD9528AMUV
R1
21
EN1
4
EN2
SW1
EN2
22
VIN
R9
C9
C30
23
R10
C7
Q2
VO1
SW1
L1
24
C14
D1
EN2
REG1
5V
29
26
PGND1
25
FB1
14
Vo1
27
R17
Q1
REG1
C2
REG2
3.3V
LG1
R11
28
REG2
12
REF
C3
R18
C4
C5
19
SS1
6
SS2
C6
17
ILIM1
VIN
BOOT2
3
HG2
2
SW2
1
LG2
31
PGND2
32
FB2
11
Vo2
7
R12
R13
C8
C12
VO2
L2
C18
R14
ILIM2
R6
15
C31
Q4
SW2
R5
8
VIN
FS1
Q3
R19
D2
R20
R7
10
MCTL1
REG1
FS2
PGOOD1
R15
R8
PGOOD1
18
20
REG1
MCTL1
PGOOD2
R16
PGOOD2
5
MCTL2
16
MCTL2 AGND
Analog Ground
13
DESIGNATION
R1
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
C1
C2
C3
RATING
0Ω
68kΩ
68kΩ
75kΩ
75kΩ
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
100kΩ
100kΩ
56kΩ
9.1kΩ
30kΩ
8.2kΩ
10uF(25V)
10uF(10V)
10uF(6.3V)
PART No.
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
MCR03
GRM31CB31E106KA75
GRM21BB10J106KD
GRM21BB10J106KD
Power Ground
COMPANY
ROHM
ROHM
ROHM
ROHM
ROHM
ROHM
ROHM
ROHM
ROHM
ROHM
MURATA
MURATA
MURATA
DESIGNATION
C4
C5
C6
C7
C8
C9
C12
C14
C18
C30
C31
(D1)
(D2)
L1
L2
Q1
Q2
Q3
Q4
U1
RATING
0.1uF(6.3V)
2200pF
2200pF
0.47uF
0.47uF
10uF(25V)
10uF(25V)
330uF
330uF
1000pF
1000pF
(Diode)
(Diode)
2.2uH
2.2uH
FET
FET
FET
FET
-
PART No.
GRM21BB10J104KD
GRM188B11H102KD
GRM188B11H102KD
GRM188B11A474KD
GRM188B11A474KD
GRM31CB31E106KA75
GRM31CB31E106KA75
6TPE330MI
6TPE330MI
GRM1882C1H102JA01
GRM1882C1H102JA01
(RSX501L-20)
(RSX501L-20)
FDVE1040-2R2M
FDVE1040-2R2M
RMW130N03
RMW130N03
RMW130N03
RMW130N03
BD9528AMUV
COMPANY
MURATA
MURATA
MURATA
MURATA
MURATA
MURATA
MURATA
SANYO
SANYO
MURATA
MURATA
(ROHM)
(ROHM)
TOKO
TOKO
ROHM
ROHM
ROHM
ROHM
ROHM
note) Without any value of ripple(about 10mV), there is a possibility of FB signal not acting stable switching due to the
adoption of comparator control method. Please use in condition with enough ripple voltage either by ①reducing the
L-value of coil, or ②using big output capacitor of ESR. Ripple voltage can be generated in FB terminal by adding
capacitor in parallel to resistor (R17, R19) of FB terminal, but because it becomes delicate to noise from output
(Vo1/Vo2) line it is not recommended. Also condition of stable action gets effected by layout of board, etc., so please
give full attention.
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© 2011 ROHM Co., Ltd. All rights reserved.
24/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Handling method of unused pin during using only DC/DC 1ch
If using only 1ch DC/DC and 2ch pin is set to be off at all times, please manage the unused pin as diagram below.
PIN No,
PIN name
Management
1
SW2
GND
2
HG2
Open
3
BOOT2
Open
4
EN2
GND
5
PGOOD2
GND
6
SS2
GND
7
Vo2
GND
8
ILIM2
GND
10
FS2
GND
11
FB2
GND
31
LG2
Open
VIN
12V
CTL
VIN
30
VIN
C1
CTL
9
BOOT1
HG1
EN1
22
CTL
EN1
REG1
VIN
BD9528AMUV
R1
21
EN1
4
EN2
SW1
23
VIN
R9
C9
R10
C10
C7
Q2
VO1
SW1
L1
24
C14
D1
REG1
5V
29
26
PGND1
25
FB1
14
Vo1
27
Q1
R17
REG1
C2
REG2
3.3V
LG1
R11
28
REG2
12
REF
19
SS1
C3
R18
C4
6
SS2
C5
17
ILIM1
8
ILIM2
BOOT2
3
HG2
2
SW2
1
R5
15
FS1
10
FS2
LG2
PGND2
32
FB2
11
Vo2
7
R7
REG1
PGOOD1
R15
MCTL1
18
PGOOD1
20
PGOOD2
5
MCTL1
MCTL2
16
MCTL2 AGND
13
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© 2011 ROHM Co., Ltd. All rights reserved.
25/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Example of PCB layout
L
Vo1
L-FET
(CH1)
Co
‘Silent’GND
R
ILMI1
MCTL1
EN1
LG1
PGOOD1
HG1
FS1
FB1
Vo2
SS2
R
R
CTL
R
C
SW2
Cin
C
EN2
FS2
PGOOD2
FB2
LG2
BOOT2
REF
VIN
PGND2
H-FET
(CH2)
AGND
REG1
HG2
C
REG2
ILIM2
VIN
R
R
MCTL2
Vo1
R
SW1
PGND1
BOOT1
Cin
C
SS1
C
High current GND
H-FET
(CH1)
High current GND
L-FET
(CH2)
‘Silent’GND
Co
L
①
②
③
④
⑤
⑥
⑦
Vo2
Because high pulse current rush into power loop, consisted of input capacitor Cin, output inductor L and output
capacitor Co, this part layout should be built at parts side (upper side) including GND pattern.
Also, drawing via formation in power loop line should be avoided.
(The reason is that it will be a factor of noise because via oneself holds some nH parasitic inductance)
FB pin has comparatively high impedance, so floating capacity should be minimum as possible.
And feedback wiring from output should be taken properly, and shielding, not going through around L (because of
magnetic). Please be careful in drawing.
Trace from SW node pin to inductor should be cut short. And both inductor element pattern should be kept away.
(Closer wiring has SW node noise influence Vo by parasitic capacity between wiring). This layout example shows that
SW node is outside, but if the application board will be like that, SW node should be shielded.
Please consider the influence to other circuit.
Input capacitor Cin should be placed close to IC with low inductance.
If that is difficult, please place a capacitor for high frequency removal with PKG size small like 0.1uF (ESL small).
2nd layer and 3rd layer are plain GND, so connect from parts side GND to plain GND by low impedance with many via as
possible. Inner GND is only for shielding, so that no to form loop for high current.
Please take GND pattern space widely, and design layout to be able to increase radiation efficiency.
FS pin and ILIM pin has high impedance. External resistor should be connected to “Silent GND”.
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© 2011 ROHM Co., Ltd. All rights reserved.
26/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Operation Notes and Precautions
+
1. This integrated circuit is a monolithic IC, which (as shown in the figure below), has P isolation in the P substrate and
between the various pins. A P-N junction is formed from this P layer and N layer of each pin, with the type of junction
depending on the relation between each potential, as follows:
・When GND＞ element A＞ element B, the P-N junction is a diode.
・When element B＞GND element A, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, as well as operating malfunctions and physical damage. Therefore, be careful to avoid
methods by which parasitic diodes operate, such as applying a voltage lower than the GND (P substrate) voltage to an
input pin.
Resistor
Transistor (NPN)
Pin A
Pin B
C
B
Pin B
E
Pin A
N
P+
N
P+
P
N
Parasitic
element
N
P+
P substrate
Parasitic element
2.
B
N
P+
P
N
C
E
P substrate
GND
Parasitic element
GND
GND
GND
Parasitic
element
Other adjacent elements
In some modes of operation, power supply voltage and pin voltage are reversed, giving rise to possible internal circuit
damage. For example, when the external capacitor is charged, the electric charge can cause a VCC short circuit to the
GND. In order to avoid these problems, inserting a VCC series countercurrent prevention diode or bypass diode
between the various pins and the VCC is recommended.
Bypass diode
Counter current prevention diode
VCC
Pin
3.
Absolute maximum rating
Although the quality of this IC is rigorously controlled, the IC may be destroyed when applied voltage or operating
temperature exceeds its absolute maximum rating. Because short mode or open mode cannot be specified when the IC
is destroyed, it is important to take physical safety measures such as fusing if a special mode in excess of absolute
rating limits is to be implemented.
4.
GND potential
Make sure the potential for the GND pin is always kept lower than the potentials of all other pins, regardless of the
operating mode.
5.
Thermal design
In order to build sufficient margin into the thermal design, give proper consideration to the allowable loss (Power
Dissipation) in actual operation.
6.
Short-circuits between pins and incorrect mounting position
When mounting the IC onto the circuit board, be extremely careful about the orientation and position of the IC. The IC
may be destroyed if it is incorrectly positioned for mounting. Do not short-circuit between any output pin and supply pin
or ground, or between the output pins themselves. Accidental attachment of small objects on these pins will cause
shorts and may damage the IC.
7.
Operation in strong electromagnetic fields
Use in strong electromagnetic fields may cause malfunctions. Use extreme caution with electromagnetic fields.
8.
Thermal shutdown circuit
This IC is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the operating temperature
reaches 175℃ (standard value), and has a hysteresis range of -15℃ (standard value). When the IC chip temperature
rises to the threshold, all the inputs automatically turn OFF. Note that the TSD circuit is provided for the exclusive
purpose shutting down the IC in the presence of extreme heat, and is not designed to protect the IC per se or guarantee
performance when or after extreme heat conditions occur. Therefore, do not operate the IC with the expectation of
continued use or subsequent operation once the TSD is activated.
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© 2011 ROHM Co., Ltd. All rights reserved.
27/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
9.
Capacitor between output and GND
When a larger capacitor is connected between the output and GND, Vcc or VIN shorted with the GND or 0V line – for
any reason – may cause the charged capacitor current to flow to the output, possibly destroying the IC. Do not connect
a capacitor larger than 1000uF between the output and GND.
10. Precautions for board inspection
Connecting low-impedance capacitors to run inspections with the board may produce stress on the IC. Therefore, be
certain to use proper discharge procedure before each process of the operation. To prevent electrostatic accumulation
and discharge in the assembly process, thoroughly ground yourself and any equipment that could sustain ESD damage,
and continue observing ESD-prevention procedures in all handling, transfer and storage operations. Before attempting
to connect components to the test setup, make certain that the power supply is OFF. Likewise, be sure the power supply
is OFF before removing any component connected to the test setup.
11. GND wiring pattern
When both a small-signal GND and high current GND are present, single-point grounding (at the set standard point) is
recommended, in order to separate the small-signal and high current patterns, and to be sure the voltage change
stemming from the wiring resistance and high current does not cause any voltage change in the small-signal GND. In
the same way, care must be taken to avoid wiring pattern fluctuations in any connected external component GND.
●Heat Dissipation Characteristics
[mW]
1000
Power Dissipation [Pd]
74.2mm×74.2mm×1.6mm
880mW
800
Glass-epoxy PCB
θj-a=142.0℃/W
600
IC Only θj-a=328.9℃/W
400
380mW
200
0
25
50
75
100
125
150
[℃]
Ambient Temperature [Ta]
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© 2011 ROHM Co., Ltd. All rights reserved.
28/29
2011.11 - Rev.A
Technical Note
BD9528AMUV
●Ordering Part Number
B
D
9
5
2
8
A
M
U
V
-
Package
MUV : VQFN032V5050
E
2
Packaging and forming specification
E2: Embossed tape and reel
VQFN032V5050
<Tape and Reel information>
5.0 ± 0.1
5.0±0.1
1.0MAX
3.4±0.1
0.4 ± 0.1
1
8
9
32
16
25
24
0.75
0.5
2500pcs
E2
The direction is the 1pin of product is at the upper left when you hold
)
(0.22)
( reel on the left hand and you pull out the tape on the right hand
3.4 ± 0.1
+0.03
0.02 -0.02
S
C0.2
Embossed carrier tape
Quantity
Direction
of feed
1PIN MARK
0.08 S
Tape
17
+0.05
0.25 -0.04
1pin
Reel
(Unit : mm)
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© 2011 ROHM Co., Ltd. All rights reserved.
29/29
Direction of feed
∗ Order quantity needs to be multiple of the minimum quantity.
2011.11 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
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© 2011 ROHM Co., Ltd. All rights reserved.
R1120A