INTERSIL RFL1N20

RFL1N18,
RFL1N20
Semiconductor
1A, 180V and 200V, 3.65 Ohm,
N-Channel Power MOSFETs
January 1998
Features
Description
• 1A, 180V and 200V
• Linear Transfer Characteristics
These are N-Channel enhancement mode silicon gate
power field effect transistors designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
• High Input Impedance
Formerly developmental type TA09289.
• rDS(ON) = 3.65Ω
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
Ordering Information
G
PART NUMBER
PACKAGE
BRAND
RFL1N18
TO-205AF
RFL1N18
RFL1N20
TO-205AF
RFL1N20
S
NOTE: When ordering, use the entire part number.
Packaging
JEDEC TO-205AF
DRAIN
(CASE)
SOURCE
GATE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
© Harris Corporation 1997
5-1
File Number
1442.2
RFL1N18, RFL1N20
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Breakdown Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 1MΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . Tpkg
RFL1N18
180
180
1
5
±20
8.33
0.0667
-55 to 150
RFL1N20
200
200
1
5
±20
8.33
0.0667
-55 to 150
UNITS
V
V
A
A
V
W
W/oC
oC
300
260
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
MIN
TYP
MAX
UNITS
RFL1N18
180
-
-
V
RFL1N20
200
-
-
V
Drain to Source Breakdown Voltage
Gate Threshold Voltage
SYMBOL
BVDSS
2
-
4
V
-
-
1
µA
TC = 125oC
-
-
25
µA
VGS = ±20V, VDS = 0V
-
-
±100
nA
ID = 1A, VGS = 10V
-
-
3.65
V
ID = 2A, VGS = 10V
-
-
8.3
V
ID = 1A, VGS = 10V, (Figures 6, 7)
-
-
3.65
Ω
400
-
-
S
-
15
25
ns
-
20
30
ns
td(OFF)
-
25
40
ns
tf
-
30
50
ns
-
-
200
pF
-
-
60
pF
IDSS
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
IGSS
VDS(ON)
rDS(ON)
Forward Transconductance (Note 2)
Turn-On Delay Time
gfs
td(ON)
Rise Time
tr
Turn-Off Delay Time
ID = 250µA, VGS = 0V
TC = 25oC
VGS(TH)
Zero Gate Voltage Drain Current
Drain to Source On-Voltage (Note 2)
TEST CONDITIONS
Fall Time
VGS = VDS, ID = 250µA, (Figure 8)
VDS = 0.8 x Rated
BVDSS
ID = 1A, VDS = 10V, (Figure 10)
ID ≈ 1A, VDD = 100V RGS = 50Ω,
VGS = 10V, (Figures 11, 12, 13)
Input Capacitance
CISS
VGS = 0V, VDS = 25V, f = 1MHz,
(Figure 9)
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
-
-
25
pF
Thermal Resistance Junction to Case
RθJC
-
-
15
oC/W
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage (Note 2)
Diode Reverse Recovery Time
SYMBOL
VSD
trr
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISD = 1A
-
-
1.4
V
ISD = 2A, dISD/dt = 50A/µs
-
200
-
ns
NOTE:
2. Pulse test: pulse width ≤ 300µs maximum, duty cycle ≤ 2%.
5-2
RFL1N18, RFL1N20
Typical Performance Curves
Unless Otherwise Specified
1.4
1.2
1.0
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
0.2
0.8
0.6
0.4
0.2
0
0
25
50
75
100
TC, CASE TEMPERATURE (oC)
125
0
25
150
FIGURE 1. NORMALIZED POWER DISSIPATION vs
CASE TEMPERATURE
10.00
OPERATION IN THIS
AREA LIMITED BY rDS(ON)
VGS = 20V
VGS = 10V
VGS = 8V
2.0
VGS = 7V
1.5
VGS = 6V
1.0
VGS = 5V
VGS = 4V
0
10
100
1000
0
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
1
2
3
4
5
VDS , DRAIN TO SOURCE VOLTAGE (V)
6
7
FIGURE 4. SATURATION CHARACTERISTICS
3.0
6
VDS = 15V
250µs PULSE TEST
DUTY CYCLE ≤ 2%
TC = 25oC
TC = -40oC
2.0
TC = 125oC
1.5
1.0
TC = 125oC
0.5
VGS = 10V
250µs PULSE TEST
DUTY CYCLE ≤ 2%
5
ON RESISTANCE (Ω)
rDS(ON), DRAIN TO SOURCE
2.5
ID , DRAIN CURRENT (A)
150
0.5
RFL1N18
RFL1N20
1
250µs PULSE TEST
DUTY CYCLE ≤ 20%
TC = 25oC
2.5
1.00
0.01
75
100
125
TC, CASE TEMPERATURE (oC)
3.0
TC = 25oC
TJ = MAX RATED
0.10
50
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
ID, DRAIN CURRENT (A)
ID , DRAIN CURRENT (A)
1.0
TC = 125oC
4
TC = 25oC
3
TC = -40oC
2
1
TC = -40oC
0
0
0
2
4
6
8
10
VGS , GATE TO SOURCE VOLTAGE (V)
0
12
0.5
1.0
1.5
2.0
2.5
ID , DRAIN CURRENT (A)
FIGURE 5. TRANSFER CHARACTERSTICS
FIGURE 6. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
5-3
3.0
RFL1N18, RFL1N20
Typical Performance Curves
Unless Otherwise Specified (Continued)
1.4
VGS = VDS, ID = 250µA
VGS = 10V, ID = 1A
NORMALIZED GATE
THRESHOLD VOLTAGE
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
2.0
1.5
1.0
0.5
0
-50
0
100
50
1.2
1.0
0.8
0.6
150
-50
0
50
100
TJ , JUNCTION TEMPERATURE (oC)
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 7. NORMALIZED DRAIN TO SOURCE ON RESISTANCE
vs JUNCTION TEMPERATURE
220
FIGURE 8. NORMALIZED GATE THRESHOLD vs JUNCTION
TEMPERATURE
1000
f = 1MHz
VDS = 15V
250µs PULSE TEST
DUTY CYCLE ≤ 2%
gfs, TRANSCONDUCTANCE (S)
900
180
C, CAPACITANCE (pF)
150
140
CISS
100
60
20
COSS
800
TC = -40oC
700
TC = 25oC
600
TC = 125oC
500
400
300
200
100
CRSS
0
10
20
30
40
50
VDS, DRAIN TO SOURCE VOLTAGE (V)
60
0
FIGURE 9. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VDS , VOLTS (V)
200
BVDSS
VDD = VDSS
0.5
1
1.5
ID, DRAIN CURRENT (A)
10
VDD = VDSS
150
GATE
TO
SOURCE
VOLTAGE
100
0.75VDSS
0.50VDSS
0.25VDSS
8
6
4
RL = 100Ω
IG(REF) = 0.09mA
VGS = 10V
DRAIN TO SOURCE
VOLTAGE
50
2
0
0
20
IG(REF)
IG(ACT)
2
2.5
FIGURE 10. TRANSCONDUCTANCE vs DRAIN CURRENT
VGS , VOLTS (V)
0
t, TIME (µs)
80
IG(REF)
IG(ACT)
NOTE: Refer to Harris Application Notes AN7254 and AN7260.
FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
5-4
RFL1N18, RFL1N20
Test Circuit and Waveforms
tON
tOFF
td(ON)
td(OFF)
tf
tr
VDS
RL
90%
90%
+
RG
-
VDD
10%
0
10%
90%
DUT
VGS
VGS
0
10%
50%
50%
PULSE WIDTH
FIGURE 13. RESISTIVE SWITCHING WAVEFORMS
FIGURE 12. SWITCHING TIME TEST CIRCUIT
5-5