PMGD130UN 20 V, dual N-channel Trench MOSFET Rev. 1 — 1 June 2012 Product data sheet 1. Product profile 1.1 General description Dual N-channel enhancement mode Field-Effect Transistor (FET) in a very small SOT363 Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology. 1.2 Features and benefits Low threshold voltage Trench MOSFET technology Very fast switching 1.3 Applications Relay driver Low-side loadswitch High-speed line driver Switching sircuits 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj = 25 °C - - 20 V VGS gate-source voltage ID drain current Per transistor VGS = 4.5 V; Tamb = 25 °C; t ≤ 5 s [1] -8 - 8 V - - 1.3 A - 118 145 mΩ Static characteristics (per transistor) RDSon [1] drain-source on-state resistance VGS = 4.5 V; ID = 1.2 A; Tj = 25 °C Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 6 cm2. PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 S1 source TR1 2 G1 gate TR1 3 D2 drain TR2 4 S2 source TR2 5 G2 gate TR2 6 D1 drain TR1 Simplified outline Graphic symbol 6 5 4 1 2 3 SOT363 (TSSOP6) D1 G1 S1 D2 S2 G2 017aaa254 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PMGD130UN TSSOP6 plastic surface-mounted package; 6 leads SOT363 4. Marking Table 4. Marking codes Type number Marking code[1] PMGD130UN U8% [1] % = placeholder for manufacturing site code PMGD130UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 2 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - 20 V VGS gate-source voltage ID drain current Per transistor -8 8 V VGS = 4.5 V; Tamb = 25 °C; t ≤ 5 s [1] - 1.3 A VGS = 4.5 V; Tamb = 25 °C [1] - 1.2 A VGS = 4.5 V; Tamb = 100 °C [1] - 0.7 A - 4.8 A [2] - 260 mW [1] - 310 mW - 905 mW IDM peak drain current Tamb = 25 °C; single pulse; tp ≤ 10 µs Ptot total power dissipation Tamb = 25 °C Tsp = 25 °C Source-drain diode source current Tamb = 25 °C [1] - 0.7 A Ptot total power dissipation Tamb = 25 °C [2] - 390 mW IS Per device Tj junction temperature -55 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 6 cm2. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 017aaa123 120 Pder (%) Ider (%) 80 80 40 40 0 −75 Fig 1. 017aaa124 120 −25 25 75 125 Normalized total power dissipation as a function of junction temperature PMGD130UN Product data sheet 0 −75 175 Tj (°C) Fig 2. −25 25 75 125 175 Tj (°C) Normalized continuous drain current as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 3 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 017aaa577 10 Limit RDSon = VDS/ID ID (A) tp = 100 μs 1 tp = 1 μs tp = 10 ms DC; Tsp = 25 °C 10-1 DC; Tamb = 25 °C; drain mounting pad 6 cm2 10-2 10-1 1 tp = 100 ms 102 10 VDS (V) IDM = single pulse Fig 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source voltage 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions thermal resistance from junction to ambient in free air Min Typ Max Unit [1] - 417 480 K/W [2] - 352 405 K/W [3] - 295 340 K/W - 120 138 K/W - - 320 K/W Per transistor Rth(j-a) Rth(j-sp) thermal resistance from junction to solder point Per device Rth(j-a) thermal resistance from junction to ambient [1] in free air [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm2. [3] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 6 cm2, t ≤ 5 s. PMGD130UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 4 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 017aaa578 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.25 0.2 0.1 0.05 0.02 0.01 0 10 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values 017aaa579 103 Zth(j-a) (K/W) duty cycle = 1 0.75 0.5 102 0.33 0.25 0.2 0.1 0.05 0 10 10-3 0.02 0.01 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, mounting pad for drain 6 cm2 Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values PMGD130UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 5 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 7. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics (per transistor) V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 20 - - V VGSth gate-source threshold voltage ID = 250 µA; VDS = VGS; Tj = 25 °C 0.4 0.7 1 V IDSS drain leakage current VDS = 20 V; VGS = 0 V; Tj = 25 °C - - 1 µA VDS = 20 V; VGS = 0 V; Tj = 150 °C - - 10 µA IGSS gate leakage current VGS = 8 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = -8 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 4.5 V; ID = 1.2 A; Tj = 25 °C - 118 145 mΩ RDSon gfs drain-source on-state resistance forward transconductance VGS = 4.5 V; ID = 1.2 A; Tj = 150 °C - 179 220 mΩ VGS = 2.5 V; ID = 1 A; Tj = 25 °C - 155 204 mΩ VGS = 1.8 V; ID = 0.25 A; Tj = 25 °C - 213 318 mΩ VDS = 10 V; ID = 1.2 A; Tj = 25 °C - 4.1 - S - 0.88 1.3 nC - 0.12 - nC - 0.26 - nC - 83 - pF - 38 - pF - 27 - pF - 5 - ns - 17 - ns Dynamic characteristics (per transistor) QG(tot) total gate charge VDS = 10 V; ID = 1.2 A; VGS = 4.5 V; Tj = 25 °C QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) turn-off delay time - 17 - ns tf fall time - 7 - ns - 0.8 1.2 V VDS = 10 V; f = 1 MHz; VGS = 0 V; Tj = 25 °C VDS = 10 V; ID = 1.2 A; VGS = 4.5 V; RG(ext) = 6 Ω; Tj = 25 °C Source-drain diode (per transistor) VSD source-drain voltage PMGD130UN Product data sheet IS = 0.7 A; VGS = 0 V; Tj = 25 °C All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 6 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 4.8 017aaa580 4.5 V 3.0 V 2.5 V ID (A) 017aaa599 10-3 VGS = 2.2 V ID (A) 3.6 2.0 V 10-4 min typ max 1.8 V 1.4 1.6 V 10-5 1.2 1.4 V 10-6 0 0 1 2 3 0 4 0.5 1.0 VDS (V) Tj = 25 °C Fig 6. Tj = 25 °C; VDS = 5 V Output characteristics: drain current as a function of drain-source voltage; typical values 017aaa581 600 1.5 V 1.5 VGS (V) 1.6 V 1.8 V 2.0 V Fig 7. Sub-threshold drain current as a function of gate-source voltage 017aaa582 600 2.2 V RDSon (mΩ) RDSon (mΩ) 400 400 2.5 V 200 200 Tj = 150 °C 3.0 V VGS = 4.5 V Tj = 25 °C 0 0 0 1 2 3 4 5 0 2 ID (A) Tj = 25 °C Fig 8. Product data sheet 6 8 10 VGS (V) ID = 1 A Drain-source on-state resistance as a function of drain current; typical values PMGD130UN 4 Fig 9. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 7 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 017aaa583 4.8 017aaa584 1.6 a ID (A) 1.4 3.2 1.2 1.0 1.6 Tj = 150 °C 0.8 Tj = 25 °C 0 0 1 2 0.6 -60 3 0 60 120 VGS (V) 180 Tj (°C) VDS > ID × RDSon Fig 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values 017aaa585 1.5 Fig 11. Normalized drain-source on-state resistance as a function of junction temperature; typical values 017aaa586 103 C (pF) VGS(th) (V) 1.0 102 max Ciss Coss Crss typ 0.5 10 min 0 -60 0 60 120 180 1 10-1 1 Tj (°C) VDS (V) ID = 0.25 mA; VDS = VGS f = 1 MHz; VGS = 0 V Fig 12. Gate-source threshold voltage as a function of junction temperature PMGD130UN Product data sheet 102 10 Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 8 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 017aaa587 5 VDS VGS (V) ID 4 VGS(pl) 3 VGS(th) VGS 2 QGS1 QGS2 QGS 1 QGD QG(tot) 017aaa137 0 0 0.25 0.50 0.75 1.00 QG (nC) ID = 1.2 A; VDS = 10 V; Tamb = 25 °C Fig 14. Gate-source voltage as a function of gate charge; typical values Fig 15. Gate charge waveform definitions 017aaa588 2.8 IS (A) 2.1 1.4 0.7 Tj = 150 °C Tj = 25 °C 0 0 0.4 0.8 1.2 VSD (V) VGS = 0 V Fig 16. Source current as a function of source-drain voltage; typical values PMGD130UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 9 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 8. Test information P t2 duty cycle δ = t1 t2 t1 t 006aaa812 Fig 17. Duty cycle definition 9. Package outline 2.2 1.8 6 2.2 1.35 2.0 1.15 1.1 0.8 5 4 2 3 0.45 0.15 pin 1 index 1 0.3 0.2 0.65 0.25 0.10 1.3 Dimensions in mm 06-03-16 Fig 18. Package outline SOT363 (TSSOP6) PMGD130UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 10 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 10. Soldering 2.65 solder lands 2.35 1.5 0.4 (2×) 0.6 0.5 (4×) (4×) solder resist solder paste 0.5 (4×) 0.6 (2×) occupied area 0.6 (4×) Dimensions in mm 1.8 sot363_fr Fig 19. Reflow soldering footprint for SOT363 (TSSOP6) 1.5 solder lands 0.3 2.5 4.5 solder resist occupied area 1.5 Dimensions in mm 1.3 preferred transport direction during soldering 1.3 2.45 5.3 sot363_fw Fig 20. Wave soldering footprint for SOT363 (TSSOP6) PMGD130UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 11 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 11. Revision history Table 8. Revision history Document ID Release date Data sheet status Change notice Supersedes PMGD130UN v.1 20120601 Product data sheet - - PMGD130UN Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 12 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET 12. Legal information 12.1 Data sheet status Document status[1] [2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 1 — 1 June 2012 © NXP B.V. 2012. All rights reserved. 13 of 15 PMGD130UN NXP Semiconductors 20 V, dual N-channel Trench MOSFET Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published athttp://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 12.1 12.2 12.3 12.4 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Test information . . . . . . . . . . . . . . . . . . . . . . . . .10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Contact information. . . . . . . . . . . . . . . . . . . . . .14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 1 June 2012 Document identifier: PMGD130UN