D2 PA K PSMN4R8-100BSE N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK 12 April 2013 Product data sheet 1. General description Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. Part of NXP's "NextPower Live" portfolio, the PSMN4R8-100BSE complements the latest "hotswap" controllers - robust enough to withstand substantial inrush currents during turn on, whilst offering a low RDS(on) characteristic to keep temperatures down and efficiency up in continued use. Ideal for telecommunication systems based on a 48 V backplane / supply rail. 2. Features and benefits • • Enhanced forward biased safe operating area for superior linear mode operation Very low RDS(on) for low conduction losses 3. Applications • • • • Electronic fuse Hot swap Load switch Soft start 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 100 V IDM peak drain current pulsed; Tmb = 25 °C; tp ≤ 10 µs; Fig. 4 - - 707 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - - 405 W VGS = 10 V; ID = 25 A; Tj = 25 °C; - 4.1 4.8 mΩ Static characteristics RDSon drain-source on-state resistance Fig. 12 Dynamic characteristics QGD QG(tot) gate-drain charge VGS = 10 V; ID = 25 A; VDS = 50 V; - 59 83 nC total gate charge Fig. 14; Fig. 15 - 196 278 nC Scan or click this QR code to view the latest information for this product PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK Symbol Parameter Conditions Min Typ Max Unit VGS = 10 V; Tj(init) = 25 °C; ID = 120 A; - - 542 mJ Avalanche Ruggedness EDS(AL)S non-repetitive drainsource avalanche energy Vsup ≤ 100 V; RGS = 50 Ω; unclamped; Fig. 3 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 G gate 2 D drain[1] 3 S source mb D mounting base; connected to drain Graphic symbol mb D G 1 S mbb076 2 3 D2PAK (SOT404) [1] It is not possible to make connection to pin 2 6. Ordering information Table 3. Ordering information Type number Package PSMN4R8-100BSE Name Description Version D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404 (one lead cropped) 7. Marking Table 4. Marking codes Type number Marking code PSMN4R8-100BSE PSMN4R8-100BSE 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 100 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ - 100 V VGS gate-source voltage -20 20 V PSMN4R8-100BSE Product data sheet All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. All rights reserved 2 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK Symbol Parameter Conditions ID drain current VGS = 10 V; Tj = 25 °C; Fig. 1 VGS = 10 V; Tmb = 100 °C; Fig. 1 Min Max Unit [1] - 120 A [1] - 120 A IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; Fig. 4 - 707 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - 405 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C - 120 A Source-drain diode IS source current Tmb = 25 °C ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 707 A VGS = 10 V; Tj(init) = 25 °C; ID = 120 A; - 542 mJ [1] Avalanche Ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Vsup ≤ 100 V; RGS = 50 Ω; unclamped; Fig. 3 [1] Continuous current limited by package. 003aaj964 200 ID (A) 03aa16 120 Pder (%) 160 80 (1) 120 80 40 40 0 0 50 100 150 Tmb (° C) (1) Capped at 120A due to package Fig. 1. Continuous drain current as a function of mounting base temperature PSMN4R8-100BSE Product data sheet 0 200 Fig. 2. 0 100 150 Tmb (°C) 200 Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. 12 April 2013 50 © NXP B.V. 2013. All rights reserved 3 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK IAL (A) 003aaj965 103 102 (1) (2) 10 1 10-3 Fig. 3. 10-2 10-1 1 tAL (ms) 10 Single pulse avalanche rating; avalanche current as a function of avalanche time 003aaj966 104 ID (A) 103 Limit RDSon= V DS / ID tp =10 µ s 102 100 µ s 1 ms 10 DC 10 ms 100 ms 1 10-1 10-1 Fig. 4. 1 10 102 103 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - 0.3 0.37 K/W Rth(j-a) thermal resistance from junction to ambient Minimum footprint; mounted on a printed circuit board - 50 - K/W PSMN4R8-100BSE Product data sheet All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. All rights reserved 4 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK 003aaj353 1 Zth(j-mb) (K/W) 10 δ = 0.5 -1 0.2 0.1 0.05 10 -2 P 0.02 tp single shot 10-3 10-6 Fig. 5. 10-5 10-4 10-3 10-2 tp T δ= t T 10-1 1 tp (s) Transient thermal impedance from junction to mounting base as a function of pulse duration 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 100 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 90 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 2 3 4 V gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C; 1 - - V - - 4.6 V VDS = 100 V; VGS = 0 V; Tj = 25 °C - 0.16 10 µA VDS = 100 V; VGS = 0 V; Tj = 175 °C - - 500 µA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 25 A; Tj = 25 °C; - 4.1 4.8 mΩ - - 8.7 mΩ - - 13 mΩ 0.43 0.85 1.7 Ω Static characteristics V(BR)DSS VGS(th) VGSth Fig. 10; Fig. 11 Fig. 11 ID = 1 mA; VDS = VGS; Tj = -55 °C; Fig. 11 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance Fig. 12 VGS = 10 V; ID = 25 A; Tj = 100 °C; Fig. 13; Fig. 12 VGS = 10 V; ID = 25 A; Tj = 175 °C; Fig. 12; Fig. 13 RG gate resistance PSMN4R8-100BSE Product data sheet f = 1 MHz All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. All rights reserved 5 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK Symbol Parameter Conditions Min Typ Max Unit ID = 25 A; VDS = 50 V; VGS = 10 V; - 196 278 nC ID = 0 A; VDS = 0 V; VGS = 10 V - 166.9 234 nC gate-source charge ID = 25 A; VDS = 50 V; VGS = 10 V; - 40 56 nC QGD gate-drain charge Fig. 14; Fig. 15 - 59 83 nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 50 V; Fig. 14; Fig. 15 - 4.3 - V Ciss input capacitance VDS = 50 V; VGS = 0 V; f = 1 MHz; - 10665 14400 pF Coss output capacitance Tj = 25 °C; Fig. 16 - 674 910 pF Crss reverse transfer capacitance - 459 643 pF td(on) turn-on delay time VDS = 50 V; RL = 2 Ω; VGS = 10 V; - 41 61.5 ns tr rise time RG(ext) = 4.7 Ω - 65 97.5 ns td(off) turn-off delay time - 127 190.5 ns tf fall time - 69 103.5 ns Dynamic characteristics QG(tot) total gate charge Fig. 14; Fig. 15 QGS Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 17 - 0.79 1.2 V trr reverse recovery time IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; - 72 94 ns recovered charge VDS = 50 V - 227 296 nC Qr 003aaj968 120 10 6 ID (A) 5.5 003aaj969 20 RDSon (mΩ ) 15 80 5 10 40 4.5 5 VGS (V) = 4 0 Fig. 6. 0 1 2 0 3 V (V) 4 DS 0 Output characteristics; drain current as a Fig. 7. function of drain-source voltage; typical values PSMN4R8-100BSE Product data sheet 8 12 V (V) 16 GS Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 12 April 2013 4 © NXP B.V. 2013. All rights reserved 6 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK 003aaj970 200 003aaj971 300 ID (A) gfs (S) 160 240 120 180 80 120 40 60 0 0 0 Fig. 8. Tj = 25 °C Tj = 150 ° C 60 120 180 240 ID (A) 300 0 Forward transconductance as a function of drain current; typical values Fig. 9. 03aa35 10- 1 ID (A) min 10- 2 typ 4 2 10- 5 1 4 VGS (V) 0 - 60 6 Fig. 10. Sub-threshold drain current as a function of gate-source voltage PSMN4R8-100BSE Product data sheet 003aad280 VGS(th) (V) max 10- 4 2 6 V (V) 8 GS 5 3 0 4 Transfer characteristics; drain current as a function of gate-source voltage; typical values 10- 3 10- 6 2 max typ min 0 60 120 Tj (°C) 180 Fig. 11. Gate-source threshold voltage as a function of junction temperature All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. All rights reserved 7 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK 003aaj974 30 4.5 RDSon (mΩ ) 5 003aad774 3.2 5.5 a 2.4 20 1.6 10 6 0.8 V GS (V) = 10 0 0 40 80 ID (A) 0 -60 120 Fig. 12. Drain-source on-state resistance as a function of drain current; typical values 0 60 120 ID 003aaj976 8 VGS(pl) 20 V 80 V 6 VGS(th) VGS VDS = 50V 4 QGS1 180 Fig. 13. Normalized drain-source on-state resistance factor as a function of junction temperature 10 VGS (V) VDS Tj (°C) QGS2 QGS QGD QG(tot) 2 003aaa508 0 Fig. 14. Gate charge waveform definitions 0 50 100 150 200 250 Q G (nC) Fig. 15. Gate-source voltage as a function of gate charge; typical values PSMN4R8-100BSE Product data sheet All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. All rights reserved 8 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK 003aaj977 105 003aaj978 120 IS (A) C (pF) C iss 104 80 C oss 103 Tj = 175 °C 40 Tj = 25 ° C C rss 102 0 10-1 1 10 2 VDS (V) 10 0 0.3 0.6 0.9 V (V) 1.2 SD Fig. 16. Input, output and reverse transfer capacitances Fig. 17. Source current as a function of source-drain as a function of drain-source voltage; typical voltage; typical values values PSMN4R8-100BSE Product data sheet All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. All rights reserved 9 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK 11. Package outline Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404 A A1 E mounting base D1 D HD 2 Lp 1 3 b2 c b e e Q 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm max nom min A A1 b b2 c 4.5 1.40 0.85 1.45 0.64 4.1 1.27 0.60 1.05 0.46 D D1 E 11 1.6 10.3 1.2 9.7 e 2.54 HD Lp Q 15.8 2.9 2.6 14.8 2.1 2.2 sot404_po Outline version References IEC JEDEC JEITA European projection Issue date 06-03-16 13-02-25 SOT404 Fig. 18. Package outline D2PAK (SOT404) PSMN4R8-100BSE Product data sheet All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. 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All rights reserved 11 / 13 PSMN4R8-100BSE NXP Semiconductors N-channel 100 V 4.8 mΩ standard level MOSFET in D2PAK grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of nonautomotive qualified products in automotive equipment or applications. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................2 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 5 11 Package outline ................................................... 10 12 12.1 12.2 12.3 12.4 Legal information .................................................11 Data sheet status ............................................... 11 Definitions ...........................................................11 Disclaimers .........................................................11 Trademarks ........................................................ 12 © NXP B.V. 2013. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 12 April 2013 PSMN4R8-100BSE Product data sheet All information provided in this document is subject to legal disclaimers. 12 April 2013 © NXP B.V. 2013. All rights reserved 13 / 13