D2 PA K PSMN5R0-100BS N-channel 100 V 5 mΩ standard level MOSFET in D2PAK Rev. 01 — 24 December 2010 Objective data sheet 1. Product profile 1.1 General description Standard level N-channel MOSFET in a D2PAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High efficiency due to low switching and conduction losses Suitable for standard level gate drive sources 1.3 Applications DC-to-DC converters Motor control Load switching Server power supplies 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 100 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 - - 120 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 306 W Tj junction temperature -55 - 175 °C VGS = 10 V; ID = 25 A; Tj = 100 °C; see Figure 12 - 6.8 8 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 13 - 4.3 5 mΩ [1] Static characteristics RDSon drain-source on-state resistance PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK Table 1. Symbol Quick reference data …continued Parameter Conditions Min Typ Max Unit - 49 - nC - 170 - nC - - 537 mJ Dynamic characteristics QGD QG(tot) gate-drain charge VGS = 10 V; ID = 75 A; total gate charge VDS = 50 V; see Figure 14; see Figure 15 Avalanche ruggedness EDS(AL)S [1] non-repetitive VGS = 10 V; Tj(init) = 25 °C; drain-source ID = 120 A; Vsup ≤ 100 V; avalanche energy RGS = 50 Ω; Unclamped Continious current limited by package. 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate Simplified outline 2 D drain 3 S source mb D mounting base; connected to drain Graphic symbol mb D G mbb076 S 2 1 3 SOT404 (D2PAK) 3. Ordering information Table 3. Ordering information Type number PSMN5R0-100BS PSMN5R0-100BS Objective data sheet Package Name Description D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404 (one lead cropped) All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 Version © NXP B.V. 2010. All rights reserved. 2 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 100 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ - 100 V VGS gate-source voltage -20 20 V ID drain current - 120 A - 120 A VGS = 10 V; Tj = 100 °C; see Figure 1 VGS = 10 V; Tmb = 25 °C; see Figure 1 [1] IDM peak drain current pulsed; tp ≤ 10 µs; Tmb = 25 °C; see Figure 3 - 680 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 306 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C - 120 A Source-drain diode [1] IS source current Tmb = 25 °C ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 680 A VGS = 10 V; Tj(init) = 25 °C; ID = 120 A; Vsup ≤ 100 V; RGS = 50 Ω; Unclamped - 537 mJ Avalanche ruggedness non-repetitive drain-source avalanche energy EDS(AL)S [1] Continious current limited by package. 003aaf735 200 ID (A) 03aa16 120 Pder (%) 160 80 120 (1) 80 40 40 0 0 0 Fig 1. 50 100 150 Tmb (°C) 200 Continuous drain current as a function of mounting base temperature PSMN5R0-100BS Objective data sheet 0 50 100 150 200 Tmb (°C) Fig 2. Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 3 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 003aaf734 104 ID (A) 103 Limit RDSon= V DS / ID tp =10 μ s 2 10 100 μ s 10 1 ms DC 1 10 ms 100 ms 10-1 10-1 Fig 3. 1 102 10 103 V DS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base see Figure 4 - 0.22 0.49 K/W Rth(j-a) thermal resistance from junction to ambient vertical in free air - 60 - K/W 003aaf733 1 Zth (j-mb) (K/W) δ = 0.5 10-1 0.2 0.1 0.05 10-2 δ= P 0.02 single shot tp T t tp T -3 10 1−6 Fig 4. 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN5R0-100BS Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 4 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = 25 °C 100 - - V ID = 250 µA; VGS = 0 V; Tj = -55 °C 90 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10; see Figure 11 2 3 4 V VGSth gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 11 1 - - V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 11 - - 4.6 V VDS = 100 V; VGS = 0 V; Tj = 25 °C - 0.08 1 µA VDS = 100 V; VGS = 0 V; Tj = 175 °C - 250 500 µA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 12 - 8.9 10.5 mΩ VGS = 10 V; ID = 25 A; Tj = 100 °C; see Figure 12 - 6.8 8 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 13 - 4.3 5 mΩ f = 1 MHz - 0.9 - Ω ID = 75 A; VDS = 50 V; VGS = 10 V; see Figure 14; see Figure 15 - 170 - nC ID = 0 A; VDS = 0 V; VGS = 10 V; see Figure 14; see Figure 15 - 140 - C IDSS drain leakage current IGSS gate leakage current RDSon RG drain-source on-state resistance gate resistance Dynamic characteristics QG(tot) total gate charge QGS gate-source charge ID = 75 A; VDS = 50 V; VGS = 10 V; see Figure 15 - 48 - nC QGS(th) pre-threshold gate-source charge ID = 75 A; VDS = 50 V; VGS = 10 V; see Figure 14; see Figure 15 - 31 - C QGS(th-pl) post-threshold gate-source charge - 17.3 - C QGD gate-drain charge - 49 - nC VGS(pl) gate-source plateau voltage VDS = 50 V; see Figure 14; see Figure 15 - 5.1 - V Ciss input capacitance Coss output capacitance VDS = 50 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 16 Crss reverse transfer capacitance td(on) turn-on delay time tr rise time td(off) tf VDS = 50 V; RL = 0.67 Ω; VGS = 10 V; RG(ext) = 4.7 Ω; ID = 75 A; Tj = 25 °C - 9900 - pF - 660 - pF - 381 - pF - 45 - ns - 91 - ns turn-off delay time - 121.5 - ns fall time - 63.3 - ns PSMN5R0-100BS Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 5 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit - 0.8 1.2 V - 75 - ns - 235 - nC Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 17 trr reverse recovery time Qr recovered charge IS = 25 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 50 V 003aaf723 250 ID (A) gfs (S) 200 80 150 60 100 40 50 20 0 Tj = 175 °C Tj = 25 °C 0 0 Fig 5. 003aaf724 100 30 60 90 120 ID (A) Forward transconductance as a function of drain current; typical values 0 Fig 6. 003aaf725 20 2 VGS (V) 6 Transfer characteristics: drain current as a function of gate-source voltage; typical values 003aaf726 240 ID (A) RDSon (mΩ) 4 10.0 200 20.0 15 8.0 6.0 160 5.5 10 120 VGS (V) =5 80 5 40 0 0 0 Fig 7. 4.5 5 10 15 VGS (V) 20 Drain-source on-state resistance as a function of gate-source voltage; typical values PSMN5R0-100BS Objective data sheet 0 Fig 8. 0.5 1 1.5 VDS(V) 2 Output characteristics: drain current as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 6 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 003aaf727 1E+5 03aa35 10−1 ID (A) C (pF) min 10−2 typ max Ciss 104 Crss 10−3 10−4 3 10 10−5 102 10-1 Fig 9. 1 10 102 VGS (V) 0 2 4 6 VGS (V) Input and reverse transfer capacitances as a function of gate-source voltage, typical values 003aad280 5 10−6 VGS(th) (V) Fig 10. Sub-threshold drain current as a function of gate-source voltage 003aaf728 2.4 a 2 4 max 1.6 3 typ 1.2 2 min 0.8 1 0 −60 0.4 0 60 120 180 Tj (°C) Fig 11. Gate-source threshold voltage as a function of junction temperature PSMN5R0-100BS Objective data sheet 0 -60 0 60 120 Tj (°C) 180 Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 7 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 003aaf732 7 VDS RDSon (mΩ) VGS (V) =5.5 ID 6 VGS(pl) 6.0 VGS(th) 8.0 5 10.0 15.0 VGS QGS1 20.0 4 QGS2 QGS QGD QG(tot) 003aaa508 3 0 30 60 90 120 ID (A) 150 Fig 13. Drain-source on-state resistance as a function of drain current; typical values 003aaf729 10 VGS (V) Fig 14. Gate charge waveform definitions 003aaf730 1E+5 C (pF) 64V 8 Ciss 104 40V VDS = 16V 6 Coss 103 4 Crss 2 10 2 0 0 50 100 150 Q (nC) 200 G Fig 15. Gate-source voltage as a function of gate charge; typical values PSMN5R0-100BS Objective data sheet 10 10-1 1 10 VDS (V) 102 Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 8 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 003aaf731 100 IS (A) 80 60 40 20 Tj = 175 °C Tj = 25 °C 0 0 0.3 0.6 0.9 VSD (V) 1.2 Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN5R0-100BS Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 9 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 7. Package outline SOT404 Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) A A1 E mounting base D1 D HD 2 Lp 1 3 c b e e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 2.54 2.90 2.10 15.80 14.80 2.60 2.20 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-02-11 06-03-16 SOT404 Fig 18. Package outline SOT404 (D2PAK) PSMN5R0-100BS Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 10 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN5R0-100BS v.1 20101224 Objective data sheet - - PSMN5R0-100BS Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 11 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 9. Legal information 9.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. 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Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PSMN5R0-100BS Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 24 December 2010 © NXP B.V. 2010. All rights reserved. 13 of 14 PSMN5R0-100BS NXP Semiconductors N-channel 100 V 5 mΩ standard level MOSFET in D2PAK 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 24 December 2010 Document identifier: PSMN5R0-100BS