IRF IRF6619TRPBF

PD - 97084
IRF6619PbF
IRF6619TRPbF
DirectFET™ Power MOSFET ‚
Typical values (unless otherwise specified)
VDSS
RoHS Compliant 
l Lead-Free (Qualified up to 260°C Reflow)
l Application Specific MOSFETs
l Ideal for CPU Core DC-DC Converters
l Low Conduction Losses
l High Cdv/dt Immunity
l Low Profile (<0.7mm)
l Dual Sided Cooling Compatible 
l Compatible with existing Surface Mount Techniques 
l
VGS
SX
ST
MQ
RDS(on)
20V max
±20V max 1.65mΩ@ 10V 2.2mΩ@ 4.5V
Qg
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
13nC
3.5nC
18nC
22nC
2.0V
tot
38nC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
RDS(on)
MX
DirectFET™ ISOMETRIC
MX
MT
Description
The IRF6619PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6619PbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6619PbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6619PbF offers particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications.
Absolute Maximum Ratings
Max.
Units
VDS
Drain-to-Source Voltage
20
V
VGS
Gate-to-Source Voltage
±20
ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V
ID @ TA = 70°C
Continuous Drain Current, VGS
ID @ TC = 25°C
Continuous Drain Current, VGS
IDM
EAS (Thermally limited)
Pulsed Drain Current
Single Pulse Avalanche Energy
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
Parameter
g
g
e
@ 10V e
@ 10V f(Package Limited)
g
VGS, Gate-to-Source Voltage (V)
Typical R DS (on) (mΩ)
TJ = 125°C
2.0
TJ = 25°C
2.0
4.0
6.0
8.0
VGS, Gate-to-Source Voltage (V)
10.0
Fig 1. Typical On-Resistance Vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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240
mJ
See Fig. 14, 15, 17a, 17b,
A
mJ
4.0
1.0
A
240
ID = 30A
3.0
24
150
h
6.0
5.0
30
12
ID= 16A
10
VDS = 16V
VDS= 10V
8
6
4
2
0
0
20
40
60
80
100
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Limited by TJmax, starting TJ = 25°C, L = 0.86mH, RG = 25Ω, IAS =
24A, VGS =10V. Part not recommended for use above this value.
1
5/3/06
IRF6619PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Conditions
Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
20
–––
–––
∆ΒVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
14
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
1.65
2.2
–––
2.2
3.0
V
VGS = 0V, ID = 250µA
mV/°C Reference to 25°C, ID = 1mA
mΩ
VGS = 10V, ID = 30A i
VGS = 4.5V, ID = 24A i
VDS = VGS, ID = 250µA
VGS(th)
Gate Threshold Voltage
1.55
–––
2.45
V
∆VGS(th)/∆TJ
Gate Threshold Voltage Coefficient
–––
-5.8
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
–––
–––
1.0
µA
VDS = 16V, VGS = 0V
–––
–––
150
VDS = 16V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
gfs
Forward Transconductance
89
–––
–––
Qg
VGS = -20V
S
VDS = 10V, ID = 24A
Total Gate Charge
–––
38
57
Qgs1
Pre-Vth Gate-to-Source Charge
–––
10.2
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
3.5
–––
Qgd
Gate-to-Drain Charge
–––
13.2
–––
ID = 16A
Qgodr
See Fig. 18
VDS = 10V
nC
VGS = 4.5V
Gate Charge Overdrive
–––
11.1
–––
Qsw
Switch Charge (Qgs2 + Qgd)
–––
16.7
–––
Qoss
Output Charge
–––
22
–––
nC
RG
Gate Resistance
–––
–––
2.3
Ω
td(on)
Turn-On Delay Time
–––
21
–––
VDD = 16V, VGS = 4.5Vi
tr
Rise Time
–––
71
–––
ID = 24A
td(off)
Turn-Off Delay Time
–––
25
–––
tf
Fall Time
–––
9.3
–––
Ciss
Input Capacitance
–––
5040
–––
Coss
Output Capacitance
–––
1580
–––
Crss
Reverse Transfer Capacitance
–––
780
–––
Min.
Typ. Max. Units
–––
–––
ns
VDS = 10V, VGS = 0V
Clamped Inductive Load
VGS = 0V
pF
VDS = 10V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current @TC=25°C
ISM
Pulsed Source Current
MOSFET symbol
110
(Body Diode)
A
–––
–––
Conditions
showing the
integral reverse
240
p-n junction diode.
(Body Diode)g
VSD
Diode Forward Voltage
–––
0.8
1.0
V
TJ = 25°C, IS = 24A, VGS = 0V i
trr
Reverse Recovery Time
–––
29
44
ns
TJ = 25°C, IF = 24A
Qrr
Reverse Recovery Charge
–––
18
27
nC
di/dt = 100A/µs i
Notes:
… Repetitive rating; pulse width limited by max. junction temperature.
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6619PbF
Absolute Maximum Ratings
Parameter
PD @TC = 25°C
e
Power Dissipation e
Power Dissipation f
TP
Peak Soldering Temperature
Power Dissipation
PD @TA = 25°C
PD @TA = 70°C
Max.
Units
2.8
W
1.8
89
270
°C
-40 to + 150
TJ
Operating Junction and
TSTG
Storage Temperature Range
Thermal Resistance
el
Junction-to-Ambient jl
Junction-to-Ambient kl
Junction-to-Case fl
RθJA
Parameter
Junction-to-Ambient
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-PCB Mounted
Linear Derating Factor
Typ.
Max.
–––
45
12.5
–––
20
–––
–––
1.4
1.0
e
Units
°C/W
–––
0.017
W/°C
100
D = 0.50
0.20
0.10
0.05
0.02
0.01
Thermal Response ( Z thJA )
10
1
0.1
τJ
0.01
R1
R1
τJ
τ1
R2
R2
τ2
τ1
R3
R3
ττCA
τ
τ3
τ2
τ3
τ4
τ4
Ci= τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
0.001
τi (sec)
Ri (°C/W)
R4
R4
0.6784
0.00086
17.299
0.57756
17.566
8.94
9.4701
106
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient †
Notes:
ˆ Used double sided cooling, mounting pad with large heatsink.
‰ Mounted on minimum footprint full size board with metalized
Š Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
(still air).
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‰ Mounted to a PCB with
small clip heatsink (still air)
‰ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6619PbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
10
2.5V
1
≤ 60µs PULSE WIDTH
Tj = 25°C
100
BOTTOM
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
2.5V
10
≤ 60µs PULSE WIDTH
Tj = 150°C
0.1
1
0.1
1
10
0.1
VDS , Drain-to-Source Voltage (V)
1
10
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1.5
100
Typical R DS(on) (Normalized)
ID, Drain-to-Source Current (A)
ID = 30A
TJ = 150°C
TJ = 25°C
TJ = -40°C
10
1
VDS = 10V
VGS = 10V
1.0
≤ 60µs PULSE WIDTH
0.1
1.5
2.0
2.5
3.0
3.5
0.5
4.0
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
(mΩ)
DS(on)
Ciss
4000
Typical R
C, Capacitance (pF)
80 100 120 140 160
TA= 25°C
9
VGS = 3.0V
8
VGS = 3.5V
7
VGS = 4.5V
VGS = 4.0V
VGS = 5.0V
6
VGS = 10V
5
4
Coss
3
Crss
2
1
0
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
60
10
Coss = Cds + Cgd
2000
40
Fig 7. Normalized On-Resistance vs. Temperature
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
6000
20
TJ , Junction Temperature (°C)
Fig 6. Typical Transfer Characteristics
8000
0
0
40
80
120
160
200
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6619PbF
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
1000.0
100.0
TJ = 150°C
TJ = 25°C
10.0
TJ = -40°C
1.0
VGS = 0V
0.6
1.0
1.4
100
100µsec
10
1msec
10msec
1
TA = 25°C
Tj = 150°C
Single Pulse
0.1
0.1
0.2
OPERATION IN THIS AREA
LIMITED BY R DS (on)
0.01
1.8
VSD , Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
1.00
10.00
100.00
Fig11. Maximum Safe Operating Area
180
2.5
LIMITED BY PACKAGE
VGS(th) Gate threshold Voltage (V)
160
140
ID , Drain Current (A)
0.10
VDS , Drain-toSource Voltage (V)
120
100
80
60
40
20
0
25
50
75
100
125
2.0
ID = 250µA
1.5
1.0
0.5
150
-75
TC , Case Temperature (°C)
-50
-25
0
25
50
75
100
125
150
TJ , Junction Temperature ( °C )
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
Avalanche Current (A)
100
10
0.01
1
0.05
0.10
0.1
0.01
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
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5
IRF6619PbF
EAR , Avalanche Energy (mJ)
300
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 17a, 17b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 3)
Single Pulse
ID = 24A
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 15. Maximum Avalanche Energy vs. Temperature
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
EAS, Single Pulse Avalanche Energy (mJ)
1000
15V
ID
12A
15A
BOTTOM 24A
TOP
800
D.U.T
RG
600
20V
VGS
400
DRIVER
L
VDS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 17a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
200
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 17b. Unclamped Inductive Waveforms
LD
VDS
L
+
VCC
DUT
0
VDD D.U.T
1K
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 19a. Switching Time Test Circuit
Fig 18a. Gate Charge Test Circuit
Id
Vds
Vgs
VDS
90%
10%
Vgs(th)
VGS
Qgs1 Qgs2
td(on)
Qgd
Qgodr
Fig 18b. Gate Charge Waveform
6
tr
td(off)
tf
Fig 19b. Switching Time Waveforms
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IRF6619PbF
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 20. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
VGS
This includes all recommendations
for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
D
D
S
G
S
D
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D
7
IRF6619PbF
DirectFET™ Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
CODE
A
B
C
D
E
F
G
H
J
K
L
M
R
P
MIN
6.25
4.80
3.85
0.35
0.68
0.68
1.38
0.80
0.38
0.88
2.28
0.616
0.020
0.08
MAX
6.35
5.05
3.95
0.45
0.72
0.72
1.42
0.84
0.42
1.01
2.41
0.676
0.080
0.17
IMPERIAL
MIN
0.246
0.189
0.152
0.014
0.027
0.027
0.054
0.032
0.015
0.035
0.090
0.0235
0.0008
0.003
MAX
0.250
0.201
0.156
0.018
0.028
0.028
0.056
0.033
0.017
0.039
0.095
0.0274
0.0031
0.007
DirectFET™ Part Marking
8
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IRF6619PbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6619TRPBF). For 1000 parts on 7"
reel, order IRF6619TR1PBF
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION (QTY 1000)
IMPERIAL
IMPERIAL
METRIC
METRIC
MAX
CODE
MIN
MIN
MIN
MIN
MAX
MAX
MAX
6.9
12.992
N.C
A
N.C
330.0
177.77 N.C
N.C
B
0.75
0.795
N.C
20.2
19.06
N.C
N.C
N.C
C
0.53
0.504
0.50
12.8
13.5
0.520
13.2
12.8
D
0.059
0.059
N.C
1.5
1.5
N.C
N.C
N.C
E
2.31
3.937
100.0
N.C
58.72
N.C
N.C
N.C
F
N.C
N.C
N.C
0.53
N.C
0.724
18.4
13.50
G
0.47
0.488
N.C
12.4
11.9
0.567
14.4
12.01
H
0.47
0.469
11.9
N.C
11.9
0.606
15.4
12.01
LOADED TAPE FEED DIRECTION
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
IMPERIAL
METRIC
MIN
MAX
MIN
MAX
0.311
7.90
0.319
8.10
0.154
0.161
3.90
4.10
0.469
11.90
0.484
12.30
0.215
5.45
0.219
5.55
0.201
0.209
5.10
5.30
0.256
6.50
0.264
6.70
0.059
N.C
1.50
N.C
0.059
1.50
0.063
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.5/06
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9
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/