IRF IR3103

PD-96992 Rev.A
Half-Bridge FredFET
and Integrated Driver
Description
IR3103
Series
0.75A, 500V
The IR3103 is a gate driver IC integrated with a half bridge FredFET designed for motor drive applications
up to 180W (heatsink-less). The sleek and compact single-in-line package is optimized for electronic motor
control in appliance applications such as fans and compressors for refrigerators. The IR3103 offers an
extremely compact, high performance half-bridge inverter in a single isolated package for two-phase and
three-phase motor drivers.
Proprietary HVIC and latch immune CMOS technologies, along with the HEXFET® power FredFET
technology (HEXFET® MOSFET with ultra-fast recovery body diode characteristics), enable efficient and
rugged single package construction. Propagation delays for the high and low side power FredFETs are
matched thanks to advanced IC technology.
Features
• Output Power FredFET in Half-Bridge Configuration
• High Side Gate Drive Designed for Bootstrap Operation
• Bootstrap Diode Integrated into Package
• Lower Power Level-Shifting Circuit
• Lower di/dt Gate Drive for Better Noise Immunity
• Excellent Latch Immunity on All Inputs and Outputs
• ESD Protection on All Leads
• Isolation 1500 VRMS min.
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. Power dissipation is measured under board mounted and still air
conditions.
Parameter
Description
Max. Value
Units
VDS
Drain to Source Blocking Voltage
500
V
VDD
DC Bus Supply Voltage (No Switching Operation)
500
V
IO (TA=25°C)
Continuous Output Current (1)
0.7
A
IO (TA=55°C)
Continuous Output Current (1)
0.6
A
IO (TA=25°C)
Pulsed Output Current (2)
2.7
A
Pd
Package Power Dissipation @TA ≤ 55°C (3)
1.4
W
VISO
Isolation Voltage (1min)
1500
VRMS
TJ
Junction Temperature (Power MOSFET)
-40 to +150
°C
TS
Storage Temperature
-40 to +150
°C
TL
Lead Temperature (soldering, 10 seconds)
300
°C
TS
Storage Temperature
-40 to +150
°C
Note 1: See figure 3, fPWM=16kHz
Note 2: TP=100ms, other conditions as per Figure 3, fPWM=16kHz
Note 3: Single Device Operating
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IR3103
Absolute Maximum Ratings (Continued)
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM.
Symbol
Parameter
Min
Max
IBDF
Bootstrap Continuous Diode
Forward Current
VB
High Side Floating Supply
Absolute Voltage
VO
Units Conditions
---
0.3
A
-0.3
525
V
High Side Floating Supply Offset
Voltage
VB - 25
VB +0.3
V
VCC
Low Side and Logic Fixed Supply
Voltage
-0.3
25
V
VIN
Input Voltage LIN, HIN
VSS-0.3
VCC+0.3V
V
VSS
Logic Ground
VCC-25
VCC+0.3V
V
TJ = 150°C, TA=55°C
Recommended Operating Conditions Driver Function
For proper operation the device should be used within the recommended conditions. All voltages are absolute
referenced to COM. The VS and VO offset are tested with all supplies biased at 15V differential.
Symbol
Definition
Min
Max
Units
VB
High Side Floating Supply Absolute Voltage
VO+10
VO+20
V
VDD
High Voltage Supply
Note 4
400
V
VCC
Low Side and Logic Fixed Supply Voltage
10
20
V
VIN
Logic Input Voltage
VSS
VCC
V
VSS
Logic Ground
-5
5
V
Note 4: Logic operation for VO of -5 to +500V. Logic state held for VO of -5V to -VBO. (Please refer to the Design Tip
DT97-3 for more details).
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IR3103
Half Bridge Electrical Characteristics @TJ= 25°C
VCC=VBO=15V and TJ=25°C unless otherwise specified. VDD and VIN parameters referenced to COM
Units Conditions
Symbol
Parameter
Min
Typ
Max
V(BR)DSS
Drain-to-Source Breakdown
Voltage
500
---
---
IHS-LK
Low Side Leakage Current
---
5
50
---
80
---
ILS-LK
Low Side Leakage Current
---
5
105
---
100
---
RDS(ON)
Drain-to-Source ON Resistance
---
1.9
2.5
Ω
IO = 0.75A, VIN=5V
VSD
Diode Forward Voltage
---
0.8
0.9
V
IO = 0.75A, VIN=0V
RDS(ON)
Drain-to-Source ON Resistance
---
4.3
6.5
Ω
IO = 0.75A, VIN=5V, TJ=150°C
VSD
Diode Forward Voltage
---
0.6
0.75
V
IO = 0.75A, VIN=0V, TJ=150°C
VBDFM
Bootstrap Diode Forward
Voltage Drop
---
---
1.25
---
---
1.10
EON
Turn-On Energy Losses
---
55
75
µJ
EOFF
Turn-Off Energy Losses
---
4
10
µJ
ETOT
Total Energy Losses
---
59
85
µJ
EREC
Body-Diode Reverse Recovery
Losses
---
2
5
µJ
tRR
Reverse Recovery Time
---
70
---
ns
EON
Turn-On Energy Losses
---
85
115
µJ
EOFF
Turn-Off Energy Losses
---
5
11
µJ
ETOT
Total Energy Losses
---
90
126
µJ
EREC
Body-Diode Reverse Recovery
Losses
---
6
11
µJ
tRR
Reverse Recovery Time
---
90
---
ns
QG
Turn-ON MOSFET Gate Charge
---
15
21
nC
VDD=250V, IO=3.2A. Note 5
COSS
Output Capacitance
---
12
---
pF
VDD=400V, f=1MHz. Note 5
COSS eff.
Effective Output Capacitance
---
30
---
pF
VDD=0V to 400V. Note 5,6
SCSOA
Short Circuit Safe Operating
Area
10
---
---
µs
ISC
Short Circuit Drain Current
---
18.5
---
A
V
µA
µA
V
VIN=0V, IDD/IO=250µA
VDS=500V, VIN=0V
VDS=500V, VIN=0V, TJ=150°C
VDS=500V, VIN=0V
VDS=500V, VIN=0V, TJ=150°C
IF=1A
IF=1A, TJ=125°C
IDD/IO = 0.75A, VDD=300V,
VBO/VCC=15V, L= 6.3mH
Energy Losses include Body-Diode
Reverse Recovery
IDD/IO = 0.75A, VDD=300V,
VBO/VCC=15V, L=6.3mH
TJ=150°C
Energy Losses include Body-Diode
Reverse Recovery
TJ=150°C, VP=450V,
V+= 320V,VCC=+15V
TJ=150°C, VP=450V, tSC<10µs
V+= 320V, VGE=15V, VCC=+15V
Note 5: Characterized on FREDFET die level, not measured at EOL
Note 6: COSS eff. is a fixed capacitance that gives same charging time as COSS while VDS is rising from 0 to 80% VDSS.
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IR3103
Thermal Resistance
Thermal Resistance is measured under board mounted and still air conditions.
Symbol
Parameter
Min
Typ
Max
RthJA self
Self Thermal resistance,
junction to ambient (note 7,8)
---
---
70
Mutual Thermal resistance,
junction to ambient (note 7,8)
RthJA mutual
---
Units Conditions
°C/W
No airflow
---
45
°C/W
Note 7: under normal operational conditions: both power devices working, no heatsink
Note 8: TJ=RthJA_self*PA+RthJA_mutual*PB
Static Electrical Characteristics Driver Function
VBIAS (VCC, VO)=15V, VSS=COM and TA=25°C, unless otherwise specified. VDD and VIN parameters are referenced to COM.
Symbol
Definition
Min
Typ
Max
Units
Conditions
VIN,th
Logic "1" Input Voltage
2.9
---
---
V
VIN,th
Logic "0" Input Voltage
---
---
0.8
V
VCCUV+
VBO
VCC and VBO Supply Undervoltage
Positive Going Threshold
8.0
8.9
9.8
V
VCCUVVBO
VCC and VBO Supply Undervoltage
Negative Going Threshold
7.4
8.2
9.0
V
VCCUVH
VBO
VCC and VBO Supply Undervoltage
Lock-Out Hysteresis
0.3
0.7
---
V
ILK
Offset Supply Leakage Current
---
---
50
µA
VB=VO=600V
IQBS
Quiescent VBO Supply Current
---
75
130
µA
VIN=0V to 5V
IQCC
Quiescent VCC Supply current
---
120
180
mA
VIN=0V to 5V
IIN+
Input Bias Current
---
5
20
µA
VIN=0V to 5V
IIN-
Input Bias Current
---
---
2
µA
VIN=0V
Dynamic Electrical Characteristics Driver Function
Driver only timing unless otherwise specified.
Symbol
Definition
Min
Typ
Max
TON
Input to Output Propagation Turnon Delay Time (see fig. 2)
---
300
---
ns
TOFF
Input to Output Propagation Turnoff Delay Time (see fig. 2)
---
400
---
ns
MT
Matching Propagation Delay Time
(On & Off)
---
0
30
ns
4
Units Conditions
VCC=VBO= 15V, IO=0.75A,
VDD=300V
VCC= VBO= 15V
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IR3103
Pin-Out Description
Pin
Name
1
VCC
Logic and Internal Gate Drive Supply
2
HIN
Logic Input for High Side Gate Output
3
LIN
Logic Input For Low Side Gate Output
4
NC
Not Connected
5
VSS
Logic Ground
6
COM
7
NC
Not Connected
8
VB
High Side Gate Drive Floating Supply
9
VO
Half Bridge Output
10
NC
Not Connected
11
VDD
High Voltage Supply
VB
8
VDD
Description
Low Side MOSFET Gate Return
1
11
11
VCC
HIN
LIN
VSS
1
2
3
IC Driver
9
Vo
5
6
COM
HIN
LIN
VO
0
1
0
1
0
VD D
1
1
Shoot-Through
condition
X
X
X
Figure 1: Driver Input/Output relation
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IR3103
Typical Application Connection IR3103
M
+
V
BUS
VBUS
IR3103
8
VCC
8
VCC
1
HIN
2
LIN
3
VSS
4
9
IC Driver
2
LIN
3
VSS
4
11
8
9
IC Driver
VCC
1
HIN
2
LIN
3
VSS
4
9
IC Driver
6
6
COM
VBUS
IR3103
11
1
HIN
6
V-BUS
VBUS
IR3103
11
COM
COM
1. Electrolytic bus capacitors should be mounted as close as possible to the module bus terminals to reduce ringing and
EMI problems. High frequency ceramic capacitors mounted close to the module pins will further improve performance.
2. In order to provide good decoupling between Vcc-VSS and VB-VO terminals, a capacitor connected between these
terminals is recommended and should be located very close to the module pins. Additional high frequency capacitors,
typically 0.1mF, are strongly recommended.
3. Low inductance shunt resistor should be used for phase leg current sensing. Similarly, the length of the traces from
the pin to the corresponding shunt resistor should be kept as small as possible.
4. Value of the bootstrap capacitors depends upon the switching frequency. Their selection should be made based on
IR design tip DN 98-2a or Figure 8.
5. Application conditions should guarantee minimum dead-time of 400ns
IC
VCE
50% HIN/LIN
90% IC
VCE
90% IC
HIN/LIN
50%
HIN/LIN
50% VCE
HIN/LIN
50% VCE
10% IC
TOFF
IC
tf
10% IC
tr
TON
Figure 2. TON and TOFF Definitions.
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IR3103
Maximum Output Phase Current - A
1.0
TJ = 150°C
0.9
Trapezoidal Modulation
0.8
0.7
0.6
0.5
0.4
TA = 25°C
0.3
TA = 55°C
0.2
TA = 75°C
HS
LS
0.1
0.0
IO
0
2
4
6
8
10
12
14
16
18
20
PWM Frequency - kHz
Figure 3. Maximum RMS Phase Current vs. PWM Switching Frequency
VDD=300V , TJ=150°C, Modulation Depth=0.5, PF=0.99
4.0
Total Power Losses - W
TJ = 150°C
HS
3.5
Trapezoidal Modulation
LS
3.0
IOUT = 0.75 ARMS
IO
2.5
2.0
IOUT = 0.60 ARMS
1.5
IOUT = 0.45 ARMS
1.0
0.5
0.0
0
2
4
6
8
10
12
14
16
18
20
PWM Switching Frequency - kHz
Figure 4. Total Power Losses as Function of Switching Frequency
VDD=300V, TJ=150°C,
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Modulation Depth=0.5, PF=0.99
7
IR3103
10
Total Power Losses - W
9
FPWM = 12 kHz
TJ = 150°C
8
FPWM = 16 kHz
Trapezoidal Modulation
7
FPWM = 20 kHz
6
5
HS
4
LS
3
IO
2
1
0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
Output Phase Current - ARMS
Figure 5. Total Power Losses as Function of Output Phase Current
Maximum Allowable Ambient Temperature -°C
VDD=300V, TJ=150°C, Modulation Depth=0.5, PF=0.99
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
0.1
TJ = 150°C
HS
Trapezoidal Modulation
LS
IO
FPWM = 12 kHz
FPWM = 16 kHz
FPWM = 20 kHz
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Output Phase Current - ARMS
Figure 6. Maximum Allowable Ambient Temperature vs. Output Phase Current
VDD=300V, TJ=150°C, Modulation Depth=0.5, PF=0.99
8
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RDS(ON) - (Normalized)
IR3103
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
-40 -30 -20 -10
0
10
20
30
40
50
60
70
80
90 100 110 120 130 140 150
TJ - Junction Temperature (°C)
Figure 7. Normalized Drain to Source Resistance vs Junction Temperature
10000
RDS(ON) (Normalized)
1000
TJ=-40°C
100
TJ=25°C
TJ=150°C
10
1
5
6
7
8
9
10
11
12
13
14
15
VGS (V)
Figure 8. Normalized Drain to Source Resistance vs Gate Source Voltage
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Thermal Impedance Zth(J-A) - °C/W
IR3103
75.0
70.0
65.0
60.0
55.0
50.0
45.0
40.0
35.0
30.0
25.0
20.0
15.0
10.0
5.0
0.0
1E-4
Zth(J-A) self
Zth(J-A) mutual
1E-3
0.01
0.1
1
10
100
1000
10000
Time - s
Recommended Bootstrap Capacitor - µF
Figure 9. Thermal Impedance vs. Time
12.0
11.0
VDD
10µF
10.0
DBS
CBS
vB
9.0
+15V
VCC
8.0
HIN
HIN
LIN
LIN
6.8µF
7.0
VSS
6.0
HO
Vo
VS
LO
COM
VSS
5.0
COM
4.7µF
4.0
3.3µF
3.0
2.2µF
2.0
1.0
1.0µF
0
5
10
15
20
PWM Frequency - kHz
Figure 10. Recommended Bootstrap Capacitor Value vs. Switching Frequency
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IR3103
Package Outline
-B-
-A-
27
11.9 MAX
3.35
3.15
8.6
1
11
9X
2.54 [0.10]
10X
3.0
2.5
-C-
1.80
1.20
1.35
1.05
0.25
0.40
0.20
9X
0.65
0.45
0.25 M
C A S B
Note 1: Marking for pin 1 identification
Note 2: Product Part Number
Note 3: Lot and Date code marking
Dimensioning and Tolerancing per ANSY Y14.5M-1992
Controlling Dimensions: INCH
Dimensions are shown in millimeters [inches]
Data and Specifications are subject to change without notice
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
04/05
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