PTFA211001E Thermally-Enhanced High Power RF LDMOS FET 100 W, 2110 – 2170 MHz Description The PTFA211001E is a thermally-enhanced, 100-watt, internallymatched GOLDMOS ® FET intended for WCDMA applications. It is characaterized for single- and two-carrier WCDMA operation from 2110 to 2170 MHz. Thermally-enhanced packaging provides the coolest operation available. Full gold metallization ensures excellent device lifetime and reliability. Features Two-carrier WCDMA Drive-up -28 36 -31 32 Efficiency -34 28 IM3 Up 24 -40 20 -43 16 -46 12 ACPR -49 8 -52 4 -55 0 36 38 40 42 44 Drain Efficiency (%) IM3 (dBc), ACPR (dBc) VDD = 28 V, IDQ = 900 mA, ƒ = 2140 MHz, 3GPP WCDMA signal, 8 dB P/A R, 10 MHz carrier spacing -37 PTFA211001E Package H-30248-2 46 Average Output Power (dBm) • Thermally-enhanced package, Pb-free and RoHScompliant • Broadband internal matching • Typical two-carrier WCDMA performance at 2140 MHz, 28 V - Average output power = 23 W - Linear Gain = 16 dB - Efficiency = 28.5% - Intermodulation distortion = –37 dBc - Adjacent channel power = –41 dBc • Typical CW performance, 2170 MHz, 28 V - Output power at P–1dB = 125 W - Efficiency = 57% • Integrated ESD protection: Human Body Model, Class 2 (minimum) • Excellent thermal stability, low HCI drift • Capable of handling 10:1 VSWR @ 28 V, 100 W (CW) output power RF Characteristics WCDMA Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ = 900 mA, POUT = 23 W average ƒ1 = 2135 MHz, ƒ2 = 2145 MHz, 3GPP signal, channel bandwidth = 3.84 MHz , peak/average = 8 dB @ 0.01% CCDF Characteristic Symbol Min Typ Max Unit Gain Gps 15 16 — dB Drain Efficiency ηD 27 28.5 — % Intermodulation Distortion IMD — –37 –36 dBc All published data at TCASE = 25°C unless otherwise indicated *See Infineon distributor for future availability. ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 9 Rev. 03, 2008-03-04 PTFA211001E DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 µA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA On-State Resistance VGS = 10 V, V DS = 0.1 V RDS(on) — 0.08 — Ω Operating Gate Voltage VDS = 28 V, IDQ = 900 mA VGS 2.0 2.5 3.0 V Gate Leakage Current VGS = 10 V, V DS = 0 V IGSS — — 1.0 µA Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Total Device Dissipation PD 417 W 2.38 W/°C Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C, 100 W CW) RθJC 0.42 °C/W Ordering Information Type and Version Package Outline Package Description Marking PTFA211001E H-30248-2 Thermally-enhanced slotted flange, single-ended PTFA211001E V1 *See Infineon distributor for future availability. Data Sheet 2 of 9 Rev. 03, 2008-03-04 PTFA211001E Typical Performance (data taken in a production test fixture) Two-carrier WCDMA at Various Biases Broadband Performance VDD = 28 V, ƒ = 2140 MHz, 3GPP WCDMA signal, VDD = 28 V, IDQ = 900 mA, POUT = 44.0 dBm -5 35 -35 1.0 A -40 700 mA -45 900 mA -50 800 mA -55 34 36 38 40 42 44 -10 30 Efficiency -15 25 -20 Return Loss 20 -25 15 Gain -30 Input Return Loss (dB) -30 Gain (dB), Efficiency (%) Adjacent Channel Power Ratio (dBm) P/AR = 8 dB, 10 MHz carrier spacing, series show IDQ 10 -35 2070 2090 2110 2130 2150 2170 2190 2210 46 Frequency (MHz) Average Output Power (dBm) Intermodulation Distortion Products vs. Tone Spacing Power Sweep, CW Conditions VDD = 28 V, IDQ = 900 mA, ƒ = 2170 MHz VDD = 28 V IDQ = 900 mA, ƒ = 2140 MHz, POUT = 50 dBm PEP Gain 40 15 30 14 TCASE = 25°C TCASE = 90°C Efficiency 20 13 0 20 40 60 80 100 120 Intermodulation Distortion (dBc) 50 16 Gain (dB) -15 60 Drain Efficiency (%) 17 10 140 -25 3rd Order -30 -35 -40 5th -45 -50 7th -55 0 5 10 15 20 25 30 Tone Spacing (MHz) Output Power (W) Data Sheet -20 3 of 9 Rev. 03, 2008-03-04 PTFA211001E Typical Performance (cont.) Single-carrier WCDMA Drive-up 2-Tone Drive-up 50 -25 45 -30 Efficiency IM3 40 35 -35 30 -40 IM5 25 -45 20 -50 15 -55 10 IM7 -60 Adjacent Channel Power Ratio (dB) -20 Drain Efficiency (%) Intermodulation Distortion (dBc) VDD = 28 V, IDQ = 900 mA, ƒ = 2140 MHz, tone spacing = 1 MHz 5 -65 0 37 39 41 43 45 47 49 -32 50 -36 40 Efficiency -40 ACPR Low -44 10 ACPR Up -52 0 36 37 51 38 39 45 Efficiency -20 40 35 -25 30 IM3 Up 25 -35 20 -40 Gain -45 15 Normalized Bias Voltage -15 Gain (dB), Drain Efficiency (%) 3rd Order Intermodulation Distortion (dBc) 50 1.03 0.2 A 1.02 0.6 A 32 33 1.0 A 1.01 1.5 A 1.00 3.0 A 0.99 4.5 A 0.98 6.0 A 7.5 A 0.97 9.0 A 0.96 0.95 -20 10 0 20 40 60 80 100 Case Temperature (°C) Supply Voltage (V) Data Sheet 45 46 Bias Voltage vs. Temperature -10 28 29 30 31 43 44 Voltage normalized to typical gate voltage, series show current IDQ = 900 mA, ƒ = 2140 MHz, tone spacing = 1 MHz, Output Power (PEP) = 50 dBm 25 26 27 40 41 42 Average Output Power (dBm) IM3, Drain Efficiency and Gain vs. Supply Voltage 23 24 20 -48 Output Power, PEP (dBm) -30 30 Drain Efficiency (%) VDD = 28 V, IDQ = 900mA, ƒ = 2140 MHz, 3GPP WCDMA signal, TM1 w/16 DPCH, 67% clipping, P/A R = 8.5 dB, 3.84 MHz BW 4 of 9 Rev. 03, 2008-03-04 PTFA211001E RA Broadband Circuit Impedance RD G ENE MHz R jX R jX 2070 3.02 –2.80 2.64 1.47 2110 2.96 –2.32 2.57 1.84 2140 2.89 –2.01 2.51 2.10 2170 2.84 –1.66 2.44 2.34 2210 2.85 –1.20 2.40 2.70 Z Source 0.2 Z Load Ω 2070 MHz 0.1 Z Source Ω Frequency 2210 MHz 0 .0 S Z Load 2210 MHz 2070 MHz 0.1 VE G W ARD LOA D T HS T O LE NG Z Load - W AV E LE NGT H S T OW A Z Source Z0 = 50 Ω 0 .1 D See next page for circuit information Data Sheet 5 of 9 Rev. 03, 2008-03-04 PTFA211001E Reference Circuit C1 0.001µF R2 1.3KV R1 1.2KV QQ1 LM7805 VDD Q1 BCP56 C2 0.001µF C3 0.001µF R3 2KV R4 2KV R5 10V C4 10 µF 35V R8 2KV R6 5.1KV C5 R7 0.1µF 5.1KV C6 1µF C8 C7 0.01µF 10pF C11 10pF l6 R9 10V RF_IN l1 l2 C9 0.4pF l4 VDD C14 10µF 50V C19 1.2pF DUT l3 C13 0.02µF l8 l5 C10 10pF C12 1µF l7 l10 l11 l12 C21 10pF l13 l14 l15 RF_OUT C20 1.2pF l9 C15 10pF C16 1µF C17 0.02µF C18 10µF 50V A 2 1 1 0 0 1 e f _ sc h Reference circit schematic for ƒ = 2140 MHz Circuit Assembly Information DUT PTFA211001E PCB 0.76 mm [.030”] thick, εr = 4.5 Microstrip l1 l2 l3 l4 l5 l6 l7 l8, l9 l10 l11 (taper) l12 (taper) l13 l14 LDMOS Transistor Rogers TMM4 Electrical Characteristics at 2140 MHz 1 Dimensions: L x W (mm) 0.130 λ, 52.0 Ω 9.96 x 1.30 0.235 λ, 52.0 Ω 18.01 x 1.30 0.191 λ, 39.0 Ω 14.30 x 2.08 0.018 λ, 11.5 Ω 1.22 x 10.03 0.024 λ, 64.0 Ω 1.88 x 0.89 0.261 λ, 64.0 Ω 20.32 x 0.89 0.073 λ, 7.0 Ω 4.98 x 17.68 0.170 λ, 55.0 Ω 13.08 x 1.17 0.043 λ, 5.0 Ω 2.95 x 25.40 0.059 λ, 5.0 Ω / 17.4 Ω 4.01 x 25.40 / 6.17 0.033 λ, 17.4 Ω / 42.0 Ω 2.36 x 6.17 / 1.83 0.124 λ, 42.0 Ω 9.30 x 1.83 0.381 λ, 50.0 Ω 29.11 x 1.37 2 oz. copper Dimensions: L x W (in.) 0.392 x 0.051 0.709 x 0.051 0.563 x 0.082 0.048 x 0.395 0.074 x 0.035 0.800 x 0.035 0.196 x 0.696 0.515 x 0.046 0.116 x 1.000 0.158 x 1.000 / 0.243 0.093 x 0.243 / 0.072 0.366 x 0.072 1.146 x 0.054 1Electrical characteristics are rounded. Data Sheet 6 of 9 Rev. 03, 2008-03-04 PTFA211001E Reference Circuit (cont.) R5 C5 C4 R6 R4 R3 C1 C3 + 10 35V C9 RF_IN R8 C11 R7 C13 C8 C12 C10 R9 C6 C14 C7 QQ1 Q1 R1 VDD Q1 R1 R7 C6 C7 VDD VDD C1 LM C2 R2 + QQ1 LM C2 R2 R5 C5 C4 R6 R4 R3 C3 R8 C8 C19 A211001ef_dtl RF_OUT C20 C15 C21 C18 C16 C17 VDD A 2 1 1 0 0 1 e f _ a ssy Reference circuit assembly diagram* (not to scale) Component Description Suggested Manufacturer P/N or Comment C1, C2, C3 C4 C5 C6, C12, C16 C7 C8, C10, C11, C15, C21 C9 C13, C17 C14, C18 C19, C20 Q1 QQ1 R1 R2 R3, R8 R4 R5, R9 R6, R7 Capacitor, 0.001 µF Tantalum capacitor, 10 µF, 35 V Capacitor, 0.1 µF Capacitor, 1 µF Capacitor, 0.01 µF Ceramic capacitor, 10 pF Digi-Key Digi-Key Digi-Key ATC Digi-Key ATC PCC1772CT-ND PCS6106TR-ND PCC104BCT-ND 920C105 200B 103 100B 100 Ceramic capacitor, 0.4 pF Capacitor, 0.02 µF Tantalum capacitor, 10 µF, 50 V Ceramic capacitor, 1.2 pF Transistor Voltage regulator Chip resistor 1.2 k-ohms Chip resistor 1.3 k-ohms Chip resistor 2 k-ohms Potentiometer, 2 k-ohms Chip resistor 10 ohms Chip resistor 5.1 k-ohms ATC Digi-Key Gerrette Electronics ATC Infineon Technologies National Semiconductor Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key 100B 0R4 200B203 TPS106K050R0400 100B 1R2 BCP56 LM7805 P1.2KGCT-ND P1.3KGCT-ND P2KECT-ND 3224W-202ETR-ND P10ECT-ND P5.1KECT-ND 1Gerber Files for this circuit available on our Web site: www.infineon.com/rfpower Data Sheet 7 of 9 Rev. 03, 2008-03-04 PTFA211001E Package Outline Specifications Package H-30248-2 (45° X 2.72 [.107]) CL 4.83±0.51 [.190±.020] D FLANGE 9.78 [.385] LID 9.40+0.10 –0.15 19.43 ±0.51 [.370+.004 –.006 ] [.765±.020] S CL 2X R1.63 [R.064] G 4X R1.52 [R.060] 2X 12.70 [.500] 27.94 [1.100] 19.81±0.20 [.780±.008] 1.02 [.040] CL SPH 1.57 [.062] 3.61±0.38 [.142±.015] 0.0381 [.0015] -A34.04 [1.340] 2 4 8 c-a se s h: -3 0 2 4 8 -2 _ p o _ 9 -F -0 8 Diagram Notes: 1. Lead thickness: 0.10 +0.051/–0.025 [.004 +.002/–.001]. 2. All tolerances ± 0.127 [.005] unless specified otherwise. 3. Pins: D = drain, S = source, G = gate. 4. Interpret dimensions and tolerances per ASME Y14.5M-1994. 5. Primary dimensions are mm. Alternate dimensions are inches. 6. Gold plating thickness: S - flange: 2.54 micron [100 microinch] (min) D, G - leads: 1.14 ± 0.38 micron [45 ± 15 microinch] Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Data Sheet 8 of 9 Rev. 03, 2008-03-04 PTFA211001E Confidential, Limited Internal Distribution Revision History: 2008-03-04 Previous Version: 2005-02-04, Data Sheet Data Sheet Page All Subjects (major changes since last revision) Remove references to alternate products. 7 Correct circuit information We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International GOLDMOS® is a registered trademark of Infineon Technologies AG. Edition 2008-03-04 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2004. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 9 of 9 Rev. 03, 2008-03-04