IRF IRF6710S2TR1PBF

PD - 97124D
IRF6710S2TRPbF
IRF6710S2TR1PbF
DirectFET™ Power MOSFET ‚
l RoHS Compliant Containing No Lead and Halogen Free  Typical values (unless otherwise specified)
l Low Profile (<0.7 mm)
VDSS
VGS
RDS(on)
RDS(on)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
25V max ±20V max 4.5mΩ@ 10V 9.0mΩ@ 4.5V
l Optimized for High Frequency Switching 
Qg tot Qgd
Qgs2
Qrr
Qoss Vgs(th)
l Ideal for CPU Core DC-DC Converters
l Optimized for Control FET Application
8.8nC
3.0nC
1.3nC
8.0nC 4.4nC
1.8V
l Compatible with existing Surface Mount Techniques 
l 100% Rg tested
Applicable DirectFET Outline and Substrate Outline 
S2
S1
SB
DirectFET™ ISOMETRIC
S1
M2
M4
L4
L6
L8
Description
The IRF6710S2TRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET TM packaging to
achieve improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6710S2TRPbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in
switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6710S2TRPbF has been optimized for the control FET socket of synchronous buck
operating from 12 volt bus converters.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
g
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
g
h
Typical R DS (on) (mΩ)
20
ID = 12A
15
10
TJ = 125°C
5
TJ = 25°C
0
2.0
e
e
f
4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0
VGS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
VGS, Gate-to-Source Voltage (V)
VDS
Max.
Units
25
±20
12
10
37
100
24
10
V
A
mJ
A
12
ID= 10A
10
VDS = 20V
VDS= 13V
8
6
4
2
0
0
4
8
12
16
20
24
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
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„ TC measured with thermocouple mounted to top (Drain) of part.
… Repetitive rating; pulse width limited by max. junction temperature.
† Starting TJ = 25°C, L = 0.49mH, RG = 25Ω, IAS = 10A.
1
03/16/10
IRF6710S2TR/TR1PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Drain-to-Source Breakdown Voltage
25
–––
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
–––
17
–––
Static Drain-to-Source On-Resistance
–––
4.5
5.9
–––
9.0
11.9
VGS = 0V, ID = 250µA
V
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 12A
VGS = 4.5V, ID
VGS(th)
Gate Threshold Voltage
1.4
1.8
2.4
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
–––
-7.0
–––
mV/°C
Drain-to-Source Leakage Current
–––
–––
1.0
µA
–––
–––
150
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
IGSS
gfs
Qg
Conditions
Typ. Max. Units
BVDSS
i
= 10A i
VDS = VGS, ID = 25µA
VDS = 20V, VGS = 0V
VDS = 20V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
-100
VGS = -20V
S
VDS = 15V, ID =10A
Forward Transconductance
21
–––
–––
Total Gate Charge
–––
8.8
13
Qgs1
Pre-Vth Gate-to-Source Charge
–––
2.3
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.3
–––
VDS = 13V
nC
VGS = 4.5V
Qgd
Gate-to-Drain Charge
–––
3.0
–––
ID = 10A
Qgodr
–––
2.2
–––
See Fig. 15
Qsw
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
4.3
–––
Qoss
Output Charge
–––
4.4
–––
nC
RG
Gate Resistance
–––
0.3
td(on)
Turn-On Delay Time
–––
7.9
–––
tr
Rise Time
–––
20
–––
td(off)
Turn-Off Delay Time
–––
5.2
–––
tf
Fall Time
–––
6.0
–––
Ciss
Input Capacitance
–––
1190
–––
Coss
Output Capacitance
–––
320
–––
Crss
Reverse Transfer Capacitance
–––
150
–––
Min.
Typ. Max. Units
VDS = 10V, VGS = 0V
Ω
i
VDD = 13V, VGS = 4.5V
ID = 10A
ns
RG= 6.2Ω
VGS = 0V
pF
VDS = 13V
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
–––
–––
19
(Body Diode)
ISM
Pulsed Source Current
g
A
–––
–––
Conditions
MOSFET symbol
showing the
100
integral reverse
VSD
Diode Forward Voltage
–––
–––
1.0
V
p-n junction diode.
TJ = 25°C, IS = 10A, VGS = 0V
trr
Reverse Recovery Time
–––
14
21
ns
TJ = 25°C, IF =10A
Qrr
Reverse Recovery Charge
–––
8.0
12
nC
di/dt = 200A/µs
(Body Diode)
i
i
Notes:
… Repetitive rating; pulse width limited by max. junction temperature.
‡ Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6710S2TR/TR1PbF
Absolute Maximum Ratings
Max.
Units
1.8
1.3
15
270
-55 to + 175
W
Parameter
e
e
f
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
Parameter
el
jl
kl
fl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Typ.
Max.
Units
–––
12.5
20
–––
1.0
82
–––
–––
9.8
–––
°C/W
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
Linear Derating Factor
e
0.012
W/°C
100
Thermal Response ( ZthJA )
D = 0.50
0.20
10
0.10
0.05
0.02
1
0.01
τJ
R1
R1
τJ
τ1
R2
R2
R3
R3
τ2
τ1
τ2
τ3
τ3
Ci= τi/Ri
Ci= τi/Ri
0.1
Ri (°C/W)
τC
SINGLE PULSE
( THERMAL RESPONSE )
τ
τι (sec)
11.759 0.009459
48.48669 0.9378
21.76032
37.2
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 
Notes:
‰ Mounted on minimum footprint full size board with metalized
ƒ Surface mounted on 1 in. square Cu board, steady state.
„ TC measured with thermocouple incontact with top (Drain) of part. back and with small clip heatsink.
Š Rθ is measured at TJ of approximately 90°C.
ˆ Used double sided cooling, mounting pad with large heatsink.
ƒ Surface mounted on 1 in. square Cu
board (still air).
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‰ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink. (still air)
3
IRF6710S2TR/TR1PbF
1000
1000
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
BOTTOM
10
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1
0.1
2.5V
100
BOTTOM
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
10
2.5V
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
1
0.01
0.1
1
10
0.1
100
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1000
2.0
VGS = 4.5V
100
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current(Α)
ID = 12A
TJ = 175°C
TJ = 25°C
10
TJ = -40°C
1
0.1
VGS = 10V
1.5
1.0
VDS = 15V
≤60µs PULSE WIDTH
0.01
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.5
5.0
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
10000
30
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
T J = 25°C
25
Typical RDS(on) ( mΩ)
C, Capacitance(pF)
Coss = Cds + Cgd
Ciss
1000
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
Coss
20
15
10
5
Crss
0
100
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
0
20
40
60
80
100
ID, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6710S2TR/TR1PbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 175°C
TJ = 25°C
100
TJ = -40°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
1msec
10
10msec
1
DC
0.1
TA = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.01
0.1
0.2
0.4
0.6
0.8
1.0
0.0
1.2
Fig 10. Typical Source-Drain Diode Forward Voltage
1.0
10.0
100.0
Fig 11. Maximum Safe Operating Area
3.0
VGS(th) Gate threshold Voltage (V)
40
ID, Drain Current (A)
0.1
VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)
30
20
10
2.5
2.0
ID = 1.0A
ID = 1.0mA
ID = 250µA
1.5
ID = 25µA
1.0
0
25
50
75
100
125
150
-75 -50 -25
175
EAS, Single Pulse Avalanche Energy (mJ)
TJ = 175°C
600
500
400
TJ = 25°C
300
200
VDS = 10V
100
380µs PULSE WIDTH
20
40
60
80
100
120
ID, Drain-to-Source Current (A)
50
75
100 125 150 175
100
I D
1.8A
3.8A
BOTTOM 10A
TOP
80
60
40
20
0
0
0
25
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
Fig 12. Maximum Drain Current vs. Case Temperature
700
0
TJ , Temperature ( °C )
TC , Case Temperature (°C)
Gfs, Forward Transconductance (S)
100µsec
140
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
Fig 14. Typ. Forward Transconductance vs. Drain Current Fig 15. Maximum Avalanche Energy vs. Drain Current
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5
IRF6710S2TR/TR1PbF
100
Avalanche Current (A)
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
10
0.01
1
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.1
0.01
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 16. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
30
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 10A
20
10
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 17. Maximum Avalanche Energy
vs. Temperature
6
Notes on Repetitive Avalanche Curves , Figures 16, 17:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 19a, 19b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 16, 17).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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IRF6710S2TR/TR1PbF
Id
Vds
Vgs
L
VCC
DUT
0
20K
1K
Vgs(th)
S
Qgodr
Fig 18a. Gate Charge Test Circuit
Qgs2 Qgs1
Qgd
Fig 18b. Gate Charge Waveform
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
+
- VDD
IAS
20V
I AS
0.01Ω
tp
Fig 19a. Unclamped Inductive Test Circuit
VDS
VGS
RG
A
RD
Fig 19b. Unclamped Inductive Waveforms
VGS
90%
D.U.T.
+
- VDD
V10V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 20a. Switching Time Test Circuit
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10%
VDS
td(off)
tf
td(on)
tr
Fig 20b. Switching Time Waveforms
7
IRF6710S2TR/TR1PbF
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
V DD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
+
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 19. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Board Footprint, S1 Outline (Small Size Can).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
CL
G = GATE
D = DRAIN
S = SOURCE
D
D
G
D
S
S
D
Optional additional pad to allow
interchangeability with S2
outline devices.
Mandatory pads to fit S1 outline.
8
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IRF6710S2TR/TR1PbF
DirectFET™ Outline Dimension, S1 Outline (Small Size Can).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
DIMENSIONS
METRIC
MAX
CODE MIN
4.85
A
4.75
3.95
B
3.70
2.85
C
2.75
0.45
D
0.35
0.52
E
0.48
0.62
F
0.58
0.52
G
0.48
1.12
H
1.08
N/A
J
N/A
0.90
K
0.80
1.80
L
1.70
M
0.740
0.68
R
0.020 0.080
0.17
P
0.08
IMPERIAL
MIN
0.187
0.146
0.108
0.014
0.019
0.023
0.019
0.042
N/A
0.031
0.066
0.027
0.001
0.003
MAX
0.191
0.156
0.112
0.018
0.020
0.024
0.020
0.044
N/A
0.035
0.070
0.029
0.003
0.007
DirectFET™ Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
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9
IRF6710S2TR/TR1PbF
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6710S2TRPBF). For 1000 parts on 7"
reel, order IRF6710S2TR1PBF
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
TR1 OPTION
IMPERIAL
METRIC
METRIC
MIN
MAX
CODE
MIN
MAX
MAX
MIN
12.992
A
N.C
177.77 N.C
330.0
N.C
0.795
B
19.06
20.2
N.C
N.C
N.C
0.504
C
0.520
13.5
12.8
13.2
12.8
0.059
D
1.5
1.5
N.C
N.C
N.C
E
3.937
58.72
100.0
N.C
N.C
N.C
N.C
F
0.724
N.C
N.C
18.4
13.50
G
0.488
11.9
12.4
0.567
14.4
12.01
0.469
H
11.9
11.9
0.606
15.4
12.01
(QTY 1000)
IMPERIAL
MIN
MAX
6.9
N.C
0.75
N.C
0.53
0.50
0.059
N.C
2.31
N.C
N.C
0.53
0.47
N.C
0.47
N.C
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
METRIC
IMPERIAL
MIN
MAX
MIN
MAX
0.311
0.319
7.90
8.10
0.154
0.161
3.90
4.10
0.469
0.484
11.90
12.30
0.215
0.219
5.45
5.55
0.201
0.209
5.10
5.30
0.256
0.264
6.50
6.70
0.059
N.C
1.50
N.C
0.059
0.063
1.50
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified to MSL1 rating for the Consumer market.
Additional storage requirement details for DirectFET products can be found in application note AN1035 on IR’s Web site.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/2010
10
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