INTEGRATED CIRCUITS DATA SHEET TDA8060ATS Satellite ZERO-IF QPSK down-converter Product specification File under Integrated Circuits, IC02 2000 Nov 10 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS FEATURES GENERAL DESCRIPTION • Direct conversion Quadrature Phase Shift Keying (QPSK) demodulation (Zero IF) The direct conversion QPSK demodulator is the front-end receiver dedicated to digital TV broadcasting, satisfying both DVB and DBS TV standards. • 920 to 2200 MHz range • On-chip loop-controlled 0 or 90° phase shifter The 920 to 2200 MHz wide range oscillator covers American, European and Asian satellite bands as well as the SMA-TV US standard. • Variable gain on RF input • 60 MHz, at −3 dB, bandwidth for baseband I and Q amplifiers Accurate QPSK demodulation is ensured by the on-chip loop-controlled phase shifter. The Zero-IF concept discards traditional IF filtering and intermediate conversion techniques. It also simplifies the signal path. • Local oscillator output to PLL satellite or terrestrial • 5 V supply voltage. The baseband I and Q signal bandwidth only depends, to a certain extent, on the external filter used in the application. APPLICATIONS • Direct Broadcasting Satellite (DBS) QPSK demodulation Optimum signal level is guaranteed by a gain-controlled amplifier at the RF input. The pin AGC sets the gain for both I and Q channels, providing a 37 dB range. • Digital Video Broadcasting (DVB) QPSK demodulation. The chip also offers a selectable internal LO prescaler (divide-by-2) and buffer that has been designed to be compatible with the input of a terrestrial or satellite frequency synthesizer. QUICK REFERENCE DATA SYMBOL PARAMETER MIN. TYP. MAX. UNIT VCC supply voltage 4.75 5.00 5.25 V ∆Φ quadrature error − − 3 deg fosc oscillator frequency 920 − 2200 MHz Vo(p-p) output voltage (peak-to-peak value) − 1 − V Tamb ambient temperature −20 − +85 °C ORDERING INFORMATION TYPE NUMBER TDA8060ATS 2000 Nov 10 PACKAGE NAME DESCRIPTION VERSION SSOP24 plastic shrink small outline package; 24 leads; body width 5.3 mm SOT340-1 2 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... VCC(MIX) MIXGND VCC(RF) RFGND VCC(LO) LOGND VCC(DIV) DIVGND IOUT IBBIN 2 17 18 22 15 14 4 8 7 CONVERSION STAGE × 21 I CONVERTER SYM ASYM AMP 13 IBBOUT 12 QBBOUT 9 VCC(BB) 16 BBGND 100 MHz RFA 6 RFB 5 BASEBAND STAGE LNA Q CONVERTER × AGC 1 3 QUADRATURE GENERATOR SYM AMP ASYM 100 MHz STABILIZED LO PLL AND AMPLIFIER Philips Semiconductors LOW-PASS FILTER Satellite ZERO-IF QPSK down-converter BLOCK DIAGRAM 2000 Nov 10 handbook, full pagewidth TDA8060ATS PEN 3 DIVIDE-BY-2 OSCILLATOR 11 24 23 19 20 10 LOOUT LOOUTC TKA TKB QOUT QBBIN Product specification Fig.1 Block diagram. TDA8060ATS LOW-PASS FILTER FCE411 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS PINNING SYMBOL PIN DESCRIPTION AGC 1 RF amplifier gain control input VCC(MIX) 2 supply voltage for mixer circuit (5 V) PEN 3 prescaler enable MIXGND 4 ground for mixer circuit RFB 5 RF signal input B RFA 6 RF signal input A RFGND 7 ground for RF circuit VCC(RF) 8 supply voltage for RF circuit (5 V) VCC(BB) 9 supply voltage for baseband circuit (5 V) QOUT 10 ‘Q’ output from demodulator QBBIN 11 ‘Q’ baseband amplifier input QBBOUT 12 ‘Q’ baseband amplifier output RFB 5 IBBOUT 13 ‘I’ baseband amplifier output RFA 6 IBBIN 14 ‘I’ baseband amplifier input RFGND 7 18 LOGND IOUT 15 ‘I’ output from demodulator VCC(RF) 8 17 VCC(LO) BBGND 16 ground for baseband circuit VCC(BB) 9 16 BBGND VCC(LO) 17 supply voltage for local oscillator circuit (5 V) QOUT 10 15 IOUT LOGND 18 ground for local oscillator circuit QBBIN 11 14 IBBIN TKA 19 tank circuit input A TKB 20 tank circuit input B DIVGND 21 ground for divider circuit VCC(DIV) 22 supply voltage for divider circuit (5 V) LOOUTC 23 LOOUT 24 local oscillator output to synthesizer divided or not according to PEN voltage 2000 Nov 10 handbook, halfpage 24 LOOUT AGC 1 VCC(MIX) 2 23 LOOUTC PEN 3 22 VCC(DIV) 21 DIVGND MIXGND 4 20 TKB 19 TKA TDA8060ATS 13 IBBOUT QBBOUT 12 FCE412 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER MIN. MAX. UNIT VCC supply voltage −0.3 +6.0 V Vi(max) maximum input voltage on all pins −0.3 VCC V tsc(max) maximum short-circuit time − 10 s Tamb ambient temperature −20 +85 °C Tstg storage temperature −55 +150 °C Tj junction temperature − 150 °C HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS thermal resistance from junction to ambient VALUE UNIT 120 K/W MAX. UNIT in free air DC CHARACTERISTICS VCC = 4.75 to 5.25 V; Tamb = −20 to +85 °C; unless otherwise specified. SYMBOL PARAMETER VCC supply voltage ICC supply current CONDITIONS MIN. TYP. 4.75 5.00 5.25 V PEN = 5 V 73 83 93 mA PEN = 0 V 70 80 90 mA Conversion stage VI(RFA) DC input voltage on pin RFA − 0.9 − V VI(RFB) DC input voltage on pin RFB − 0.9 − V VO(IOUT) DC output voltage on pin IOUT − 1.85 − V VO(QOUT) DC output voltage on pin QOUT − 1.85 − V Quadrature generator VO(LOOUT) DC output voltage on pin LOOUT − 4.0 − V VO(LOOUTC) DC output voltage on pin LOOUTC − 4.0 − V Baseband stage VI(IBBIN) DC input voltage on pin IBBIN − 2.5 − V VI(QBBIN) DC input voltage on pin QBBIN − 2.5 − V VO(IBBOUT) DC output voltage on pin IBBOUT − 2.5 − V VO(QBBOUT) DC output voltage on pin QBBOUT − 2.5 − V 2000 Nov 10 5 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS AC CHARACTERISTICS Tamb = 25 °C; VCC = 5 V; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Quadrature generator fosc oscillator frequency note 1 920 − 2200 MHz ΦNosc oscillator phase noise at 10 kHz offset; note 2 − −80 −75 dBc/Hz ∆Φ absolute quadrature error note 4 − 0 3 deg fLOOUT output frequency VPEN = 0 V − − VPEN = VCC − fosc 1⁄ f 2 osc Vo(diff)(LOOUT) differential output voltage at pin LOOUT RL = 100 Ω differential −30 −22 − dBm R2H second harmonic rejection note 3 − 30 − dBc Zo(diff)(LOOUT) differential output impedance at pin LOOUT − 60 − Ω − Conversion stage Ri(diff) series real part of differential input impedance at pins RFA and RFB note 5 − 34 − Ω Li(diff) series inductance of differential input impedance at pins RFA and RFB note 5 − 5 − nH Pi(max) maximum input power per channel − −25 − dBm Pi(min) minimum input power per channel − −62 −60 dBm ∆Gv/∆V(slope) AGC slope − 30 43 dB/V ∆Gv(I-Q) voltage gain mismatch between I and Q − − 1 dB ∆td(g)(RF-IOUT) group delay variation per channel (40 MHz) from RF input to pin IOUT − 0.5 2 ns ∆td(g)(RF-QOUT) group delay variation per channel (40 MHz) from RF input to pin QOUT − 0.5 2 ns td(g)(I-Q)(40) group delay mismatch per channel (40 MHz) between I and Q − 0 0.5 ns B(−1dB)(RF-IOUT) channel −1 dB bandwidth from RF input to pin IOUT − 40 − MHz B(−1dB)(RF-QOUT) channel −1 dB bandwidth from RF input to pin QOUT − 40 − MHz B(−3dB)(RF-IOUT) channel −3 dB bandwidth from RF input to pin IOUT − 70 − MHz B(−3dB)(RF-QOUT) channel −3 dB bandwidth from RF input to pin QOUT − 70 − MHz Zo(IOUT) output impedance at pin IOUT − 65 − Ω Zo(QOUT) output impedance at pin QOUT − 65 − Ω Vo(IOUT) nominal output voltage level at pin IOUT per channel − 28 − dBmV Vo(QOUT) nominal output voltage level at pin QOUT per channel − 28 − dBmV RL(IOUT) resistive load at pin IOUT 400 − − Ω RL(QOUT) resistive load at pin QOUT 400 − − Ω 2000 Nov 10 at Gv(RF-IOUT)(min) 6 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter SYMBOL PARAMETER TDA8060ATS CONDITIONS MIN. TYP. MAX. UNIT SYMMETRICAL RF INPUT (Fig.4) Gv(RF-IOUT)(min) minimum voltage gain from RF input to pin IOUT VAGC = 0.1VCC; note 6 − − 6 dB Gv(RF-IOUT)(max) maximum voltage gain from RF input to pin IOUT VAGC = 0.9VCC; note 6 41 43 − dB Gv(RF-QOUT)(min) minimum voltage gain from RF input to pin QOUT VAGC = 0.1VCC; note 6 − − 6 dB Gv(RF-QOUT)(max) maximum voltage gain from RF input to pin QOUT VAGC = 0.9VCC; note 6 41 43 − dB IP3i(I) I 3rd-order interception point at RF input 1 4 − dBm IP2i(I) I 2nd-order interception point at RF input 12 15 − dBm IP3i(Q) Q 3rd-order interception point at RF input 1 4 − dBm IP2i(Q) Q 2nd-order interception point at RF input 12 15 − dBm Fi noise figure at maximum gain VAGC = 0.9VCC; Zsource = 50 Ω − 12 15 dB ASYMMETRICAL RF INPUT (Fig.5) Gv(RF-IOUT)(min) minimum voltage gain from RF input to pin IOUT VAGC = 0.1VCC; note 7 − − 6 dB Gv(RF-IOUT)(max) maximum voltage gain from RF input to pin IOUT VAGC = 0.9VCC; note 7 − 43 − dB Gv(RF-QOUT)(min) minimum voltage gain from RF input to pin QOUT VAGC = 0.1VCC; note 7 − − 6 dB Gv(RF-QOUT)(max) maximum voltage gain from RF input to pin QOUT VAGC = 0.9VCC; note 7 − 43 − dB IP3i(I) I 3rd-order interception point at RF input − 3 − dBm IP2i(I) I 2nd-order interception point at RF input − 15 − dBm IP3i(Q) Q 3rd-order interception point at RF input − 3 − dBm IP2i(Q) Q 2nd-order interception point at RF input Fi noise figure at maximum gain VAGC = 0.9VCC; Zsource = 50 Ω − 15 − dBm − 13 − dB − 6 − kΩ − 28 − dBmV Baseband stages Zi input impedance Vi nominal input voltage level per channel Gv(IBBIN-IBBOUT) voltage gain from pin IBBIN to pin IBBOUT 19 20 22 dB Gv(QBBIN-QBBOUT) voltage gain from pin QBBIN to pin QBBOUT 19 20 22 dB Gv(I-Q) voltage gain mismatch between I and Q − 0 1 dB IP3i 3rd-order interception point at IQBBIN input − 63 − dBmV IP2i 2nd-order interception point at IQBBIN input − 79 − dBmV ∆td(g)(40) group delay variation in 40 MHz bandwidth − 0.5 2 ns td(g)(I-Q)(40) group delay mismatch in 40 MHz band between I and Q − 0.5 2 ns B(−1dB) channel −1 dB bandwidth − 40 − MHz 2000 Nov 10 7 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter SYMBOL TDA8060ATS PARAMETER B(−3dB) channel −3 dB bandwidth CONDITIONS Zo output impedance Vo(p-p) output voltage level (peak-to-peak value) Ro(L) resistive load at output note 8 MIN. TYP. MAX. UNIT − 80 − − 50 − Ω − 1 − V 400 − − Ω MHz Overall with a 100 nF capacitor instead of LP1 and LP2 td(g)(I-Q)(40) group delay mismatch in 40 MHz band between I and Q − 0.5 2 ns td(g)(I-Q)(R40) group delay ripple in 40 MHz band for I or Q − 0.5 1 ns Gv(I-Q)(40) voltage gain mismatch in 40 MHz band between I and Q − − 1 dB GR(I-Q)(40) voltage gain ripple in 40 MHz band for I or Q − − 1 dB SYMMETRICAL RF INPUT Gv(RF-IBBOUT)(min) minimum voltage gain from RF input to pin IBBOUT VAGC = 0.1VCC − 26 − dB Gv(RF-IBBOUT)(max) maximum voltage gain from RF input to pin IBBOUT VAGC = 0.9VCC − 63 − dB Gv(RF-QBBOUT)(min) minimum voltage gain from RF input to pin QBBOUT VAGC = 0.1VCC − 26 − dB Gv(RF-QBBOUT)(max) maximum voltage gain from RF input to pin QBBOUT VAGC = 0.9VCC − 63 − dB VAGC = 0.9VCC; Zsource = 50 Ω − 13 16 dB Fi noise figure at maximum gain ASYMMETRICAL RF INPUT Gv(RF-IBBOUT)(min) minimum voltage gain from RF input to pin IBBOUT VAGC = 0.1VCC − 26 − dB Gv(RF-IBBOUT)(max) maximum voltage gain from RF input to pin IBBOUT VAGC = 0.9VCC − 63 − dB Gv(RF-QBBOUT)(min) minimum voltage gain from RF input to pin QBBOUT VAGC = 0.1VCC − 26 − dB Gv(RF-QBBOUT)(max) maximum voltage gain from RF input to pin QBBOUT VAGC = 0.9VCC − 63 − dB Fi VAGC = 0.9VCC; Zsource = 50 Ω − 14 − dB noise figure at maximum gain Notes 1. This parameter is very dependent on the application; the range represents the capacity of the oscillator. 2. Measured in baseband (at pin IOUT or pin QOUT) on a carrier at 2 MHz and 25 dBmV. 3. fLO = 1000 MHz; RF wanted = 1005 MHz; RF unwanted = 2002 MHz (see Fig.3). Done on the demo board OM5732. 4. Quadrature error with respect to 90°. 5. The differential input impedance of the IC is 34 Ω in series with the IC pins which give an inductance of 5 nH. For optimum performance, this inductance should be cancelled by a matching network. Coupling capacitors of 1 pF give an acceptable result. 6. Gain = Vo(dB) − Vi(dB) (see Fig.4). Gain for symmetrical RF input. 2000 Nov 10 8 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS 7. Gain = Vo(dB) − Vi(dB) (see Fig.5). Gain for asymmetrical RF input. 8. 2 non-coherent channels (1 desired + 1 adjacent), at 700 mV each, give a total level of 1 V. FCE795 handbook, halfpage 2 MHz 5 MHz Fig.3 Vo(diff)(LOOUT) conditions. handbook, full pagewidth 50 Ω 100 Ω RF SOURCE Vi (dB) 50 Ω 50 Ω 1 pF RFA 1 pF RFB IOUT TDA8060ATS QOUT RF SOURCE high impedance probe Vo (dB) FCE413 50 Ω Fig.4 Gain control diagram for symmetrical RF input. 2000 Nov 10 9 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS handbook, full pagewidth 50 Ω 1.5 pF 1.5 pF IOUT RFB RFA TDA8060ATS RF SOURCE QOUT high impedance probe Vo (dB) FCE414 50 Ω RF SOURCE 50 Ω Vi (dB) Fig.5 Gain control diagram for asymmetrical RF input. APPLICATION INFORMATION Nevertheless, the TDA8060ATS internally filters the baseband at 100 MHz and the nominal levels at inputs and outputs mentioned in the characteristics table should be respected. The input impedance of LP1 and LP2 must exceed 400 Ω to avoid signal distortion. Close attention should be paid to the design of the external tank circuit of the VCO so that it covers the 920 to 2200 MHz frequency range. Both series 6 Ω resistors kill all parasitic oscillations that could alter this frequency range. The BB835 Siemens varicap diodes are mentioned because they provide the highest Cmax/Cmin ratio as well as the least parasitic elements in our frequency range. The U-shaped inductance can be printed with a total length of approximately 20 mm. The converter outputs (pin IOUT and pin QOUT) must be AC-coupled via the low-pass filter to the baseband amplifiers inputs (pin IBBIN and pin QBBIN). Because of the high impedance at pin IQBBIN, a 100 nF capacitor gives a high-pass frequency of 160 Hz. Filters LP1 and LP2 are not detailed in this data sheet because their design only depends on the global system. As the TDA8060ATS has been designed to be compatible with DVB, DSS and Asian DVB, the cut-off frequencies and the tolerance in group delay, the orders of the filters cannot be globally established. 2000 Nov 10 10 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... VCC(LO) LOGND VCC(DIV) DIVGND IOUT 2 17 18 22 4 8 7 CONVERSION STAGE 1 pF RF (2) RF × RFA 6 RFB 5 AGC 1 IBBIN 14 I CONVERTER SYM ASYM AMP 13 IBBOUT LOW-PASS FILTER(3) to I channel ADC 12 QBBOUT LOW-PASS FILTER(3) to Q channel ADC 9 VCC(BB) 16 BBGND 100 MHz BASEBAND STAGE LNA Q CONVERTER 1 pF gain(1) 15 21 × SYM AMP ASYM 100 MHz 100 nF 11 STABILIZED LO PLL AND AMPLIFIER QUADRATURE GENERATOR Philips Semiconductors 100 nF VCC(MIX) MIXGND VCC(RF) RFGND Satellite ZERO-IF QPSK down-converter ull pagewidth 2000 Nov 10 LOW-PASS FILTER(3) TDA8060ATS 0 to 5 V PEN 3 DIVIDE-BY-2 OSCILLATOR 24 23 19 20 10 LOOUT LOOUTC TKA TKB QOUT QBBIN 6Ω 6Ω 11 FCE415 100 nF 1 pF LOW-PASS FILTER(3) to PLL synthesizer IC 20 kΩ BB835 (2×) 20 kΩ Fig.6 Application diagram. Product specification (1) Gain control voltage; minimum gain at 0.1VCC, maximum gain at 0.9VCC; 30 dB range. (2) Differential RF input 950 to 2200 MHz; level = −22 to −52 dBm per channel. (3) The filter input impedance is 400 Ω minimum. TDA8060ATS Vtune from PLL synthesizer IC Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS PACKAGE OUTLINE SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm D SOT340-1 E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.8 0.4 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT340-1 2000 Nov 10 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-150 12 o Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 220 °C for thick/large packages, and below 235 °C for small/thin packages. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2000 Nov 10 TDA8060ATS 13 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Nov 10 14 Philips Semiconductors Product specification Satellite ZERO-IF QPSK down-converter TDA8060ATS DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2000 Nov 10 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SÃO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2451, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260, Tel. +66 2 361 7910, Fax. +66 2 398 3447 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553 For all other countries apply to: Philips Semiconductors, Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 Internet: http://www.semiconductors.philips.com SCA 70 © Philips Electronics N.V. 2000 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 753504/01/pp16 Date of release: 2000 Nov 10 Document order number: 9397 750 07382