INTEGRATED CIRCUITS DATA SHEET UAA3220TS Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver Product specification Supersedes data of 1998 April 10 File under Integrated Circuits, IC01 1999 Jan 22 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS FEATURES GENERAL DESCRIPTION • Low cost single-chip ASK or FSK receiver The UAA3220TS is a fully integrated single-chip receiver, primarily intended for use in VHF and UHF systems. It supports both Amplitude Shift Keying (ASK) and Frequency Shift Keying (FSK) demodulation. By connecting DEMO1 (pin 10) to ground during realisation of the receiver module the UAA3220TS works as an ASK receiver (see Fig.10). By connecting pin 10 as shown in Fig.9 the UAA3220TS works as an FSK receiver. The UAA3220TS incorporates a crystal stabilized local oscillator, frequency multiplier, balanced mixer, post mixer amplifier, limiter, Received Signal Strength Indicator (RSSI), FSK demodulator, data filter, data slicer and power down circuit. • Superheterodyne architecture with high integration level • Few external low cost components and crystal required • Wide supply voltage range • Low power consumption • Wide frequency range, 250 to 920 MHz • High sensitivity • IF bandwidth determined by application • High selectivity • Automotive temperature range • SSOP24 package. Applications • Keyless entry systems • Car alarm systems • Remote control systems • Security systems • Telemetry systems • Wireless data transmission • Domestic appliance. QUICK REFERENCE DATA SYMBOL PARAMETER VCC supply voltage ICC supply current CONDITIONS MIN. TYP. MAX. UNIT 2.7 − 5.5 V operating mode on; VPWD = 0 V 2.8 4.3 5.8 mA operating mode off; VPWD = VCC − 3 30 µA fi(RF) = 433.92 MHz; FSK mode ASK mode Pi(max)(ASK) maximum input power BER ≤ 3% −22 −16 −10 dBm Φi(ASK) sensitivity into pin MIXIN fi(RF) = 433.92 MHz; BER ≤ 3% − −119 −113 dBm Pi(max)(FSK) maximum input power BER ≤ 3% −6 0 +1 dBm Φi(FSK) sensitivity into pin MIXIN fi(RF) = 433.92 MHz; BER ≤ 3% − −103 −100 dBm FSK mode 1999 Jan 22 2 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS ORDERING INFORMATION PACKAGE TYPE NUMBER NAME UAA3220TS DESCRIPTION SSOP24 VERSION SOT340-1 plastic shrink small outline package; 24 leads; body width 5.3 mm BLOCK DIAGRAM MGND MIXIN handbook, full pagewidth 24 FA VCCI LIN 23 22 21 RSSI CPC LFB 20 18 19 CPB 17 CPA 16 DATA CGND 14 13 15 LIMITER AMPLIFIER AM/FM SWITCH DEMODULATOR MIXER PMA UAA3220TS + DATA SLICER − OSCILLATOR 1 ×2/×3 2 3 4 5 OGND OSE OSB VCC OSC MULTIPLIER ×3 6 7 8 BIAS 9 10 11 PWD DEMO1 DEMO2 12 MGM742 TEM TN TP Fig.1 Block diagram. 1999 Jan 22 3 GND Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS PINNING SYMBOL PIN DESCRIPTION OGND 1 oscillator ground OSE 2 oscillator emitter OSB 3 oscillator base VCC 4 positive supply voltage OSC 5 oscillator collector TEM 6 frequency multiplier emitter resistor TN 7 TP handbook, halfpage OGND 1 24 MGND OSE 2 23 MIXIN frequency multiplier negative output OSB 3 22 FA 8 frequency multiplier positive output VCC 4 21 VCCI PWD 9 power down control input OSC 5 20 LIN DEMO1 10 FM demodulator 1, ASK/FSK switch TEM 6 DEMO2 11 FM demodulator 2 GND 12 general ground CGND 13 comparator ground DATA 14 data output CPA 15 CPB 19 LFB UAA3220TS TN 7 18 RSSI TP 8 17 CPC PWD 9 16 CPB comparator input A DEMO1 10 15 CPA 16 comparator input B DEMO2 11 14 DATA CPC 17 comparator input C GND 12 13 CGND RSSI 18 RSSI output LFB 19 limiter feedback LIN 20 limiter input VCCI 21 IF amplifier positive supply voltage FA 22 IF amplifier output MIXIN 23 mixer input MGND 24 mixer ground 1999 Jan 22 MGM743 Fig.2 Pin configuration. 4 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS FUNCTIONAL DESCRIPTION Limiter Mixer The limiter is a single-ended input multiple stage amplifier with high total gain. Amplifier stability is achieved by means of an external DC feedback capacitor (C21), which is also used to determine the lower limiter cut-off frequency. An RSSI signal proportional to the limiter input signal is provided. Figure 3 shows the DC voltage at pin 18 (RSSI) as a function of the input voltage (RMS value) at pin 20 (LIN). It also gives the typical IF of 10.7 MHz. The lower knee of the level curve (see Fig.3) is determined by the effective noise bandwidth and is, consequently, slightly higher. The mixer is a single-balanced emitter-coupled mixer with internal biasing. Matching of the RF source impedance to the mixer input requires an external matching network. Oscillator The oscillator is based on a transistor connected in common collector configuration followed by a cascode stage driving a tuned circuit. The voltage at this tuned circuit drives the frequency multiplier. The bias current of the oscillator is set by an off-chip resistor (R40 in the application diagram of Fig.9) to a typical value of 260 µA at 433.92 MHz (R40 = 1.8 kΩ). The oscillator frequency is controlled by an off-chip overtone crystal (X40). Off-chip capacitors between base and emitter (C42) and ground (C41) make the oscillator transistor appear as having negative resistance at small signal levels. This causes the oscillator to start. A parallel resonance circuit (L40 and C41) connected to the emitter of the oscillator transistor prevents oscillation at the fundamental frequency of the crystal. The LC tank circuit at the output of the oscillator is used to select either the fundamental, the second or the third harmonic of the oscillator frequency. IF filter IF filtering with high selectivity is realized by means of an external ceramic filter (X20), which feeds the IF from the PMA to the limiter. FM demodulator Coming from the limiter the FSK signal is fed differential to the input of the FM demodulator. After buffering the signal is fed to a phase detector. The phase shift is generated by an external LC combination connected to DEMO1 (pin 10) and DEMO2 (pin 11). The baseband signal is coupled out single ended via an output buffer and is fed to the FSK input of the ASK/FSK switch. Frequency multiplier The frequency multiplier is an emitter-coupled transistor pair driving an off-chip balanced tuned circuit. The bias current of this emitter coupled pair is set by an off-chip resistor (R50) to a typical value of 350 µA at 433.92 MHz (R50 = 1.2 kΩ). The oscillator output signal is AC-coupled to one of the inputs of the emitter-coupled pair. The other input is connected to ground via an on-chip capacitor. The output voltage of the frequency multiplier drives the switching stage of the mixer. The bias voltage at this point is set by an off-chip resistor (R51) to allow sufficient voltage swing at the mixer outputs. ASK/FSK switch The selection of either ASK or FSK reception will be done by the DEMO1 (pin 10). Grounding this pin to 0 V will switch the IC to ASK mode. Additional the FM demodulator and parts of the data slicer will be switched off. In FSK mode DEMO1 (pin 10) is connected to DEMO2 (pin 11) via a LC combination (see Fig.9). Data filters After demodulation a two-stage data filtering circuit is provided in order to suppress unwanted frequency components. Two RC low-pass filters with on-chip resistors are provided which are separated by a buffer stage. Post mixer amplifier The Post Mixer Amplifier (PMA) is a differential input, single-ended output amplifier. Amplifier gain is provided in order to reduce the influence of the limiter noise figure on the total noise figure. 1999 Jan 22 5 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS Data slicer RSSI buffer Data detection is provided by means of a level comparator with adaptive slice reference. After the first data filter stage the pre-filtered data is split into two paths. One passes the second data filter stage and is fed to the positive comparator input. The other path is fed to an integration circuit with a large time constant in order to derive the average value (DC component) as an adaptive slice reference which is presented to the negative comparator input. The internal buffer provides 13 dB AC voltage gain. The adaptive reference allows to detect the received data over a large range of noise floor levels. The integration circuit consists of a simple RC low-pass filter with on-chip resistors. The data slicer output is designed with internal pull-up. The RSSI buffer is an amplifier with a voltage gain of 0 dB. At FSK receive mode the RSSI output provides a field strength indication. It has an output impedance of 10 kΩ. Figure 3 shows the level curve (RSSI curve) as a function of the limiter input voltage (RMS value). MGM744 1.55 handbook, full pagewidth VRSSI (V) 1.45 (1) (2) 1.35 (3) 1.25 1.15 10-7 10-6 10-5 10-4 10-3 (1) Tamb = 85 °C. (2) Tamb = 27 °C. (3) Tamb = −40 °C. Fig.3 Level curve VRSSI as a function of VLIN(rms). 1999 Jan 22 6 10-2 -1 VLIN(rms) (V) 10 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.3 +8.0 V Pi(max) absolute maximum input power − 3 dBm Tamb operating ambient temperature −40 +85 °C Tstg storage temperature −55 +125 °C Ves electrostatic handling pins 3 and 6 −50 +50 V pin 2 −100 +100 V pin 5 −250 +150 V pin 23 −200 +250 V all other pins −250 +250 V note 1 Note 1. Machine model: C = 200 pF, R = 0 Ω and L = 0.75 µH; pins are connected to GND and VCC. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) 1999 Jan 22 PARAMETER thermal resistance from junction to ambient CONDITIONS in free air 7 VALUE UNIT 125 K/W Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS DC CHARACTERISTICS VCC = 2.7 V; Tamb = 25 °C; for application diagram see Figs 9 and 10; crystal disconnected; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VCC supply voltage ICC supply current VPWD IPWD voltage on pin PWD current into pin PWD 2.7 − 5.5 V FSK demodulation; note 3 2.8 4.3 5.8 mA ASK demodulation; note 4 2.5 3.7 4.9 mA operating mode off; VPWD = VCC − 3 30 µA operating mode on (receiving mode) 0 − 300 mV operating mode off (sleep mode) VCC − 0.3 − VCC V operating mode on (receiving mode); VPWD = 0 V −30 −10 −3 µA operating mode off (sleep mode); VPWD = VCC − 2 15 µA operating mode on; VPWD = 0 V; notes 1 and 2 Oscillator VOSE DC voltage at pin 2 independent of oscillator 0.33 0.38 0.43 V VOSB DC voltage at pin 3 independent of oscillator 1.05 1.15 1.25 V VTEM DC voltage at pin 6 independent of oscillator 0.33 0.39 0.45 V VTN,TP DC voltage at pins 7 and 8 independent of oscillator 2.01 2.21 2.41 V DC voltage at pin 23 independent of oscillator 0.68 0.78 0.88 V DC voltage at pin 22 independent of oscillator 1.10 1.25 1.40 V VLIN DC voltage at pin 20 independent of oscillator 1.85 1.95 2.05 V VLFB DC voltage at pin 19 independent of oscillator 1.85 1.95 2.05 V VRSSI DC voltage at pin 18 independent of oscillator 1.00 1.16 1.32 V Multiplier Mixer VMIXIN Post mixer amplifier VFA Limiter 1999 Jan 22 8 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver SYMBOL PARAMETER UAA3220TS CONDITIONS MIN. TYP. MAX. UNIT Demodulator VDEMO1,2 DC voltage at pins 10 and 11 VDEMO1(ASK) DC voltage at pin 10 to switch in ASK mode independent of oscillator; note 5 2.00 2.24 2.48 V 0 − 300 mV Data filter and slicer VCPA,CPB,CPC DC voltage at pins 15, 16 and 17 ASK mode 1.27 1.42 1.57 V FSK mode; note 6 1.81 2.01 2.21 V VCC V 0.6 V VOH(DATA) HIGH-level output voltage at pin 14 IDATA = −10 µA VOL(DATA) LOW-level output voltage at pin 14 IDATA = 200 µA VCC − 0.5 − 0 − Notes 1. For fi(RF) = 868.35 MHz all values + 0.6 mA. 2. Crystal connected; oscillator and multiplier active. 3. Pin DEMO1 connected to pin DEMO2 via tank circuit. 4. Pin DEMO1 short circuited to ground. 5. The given values are applicable for FSK reception mode. In ASK mode pin 10 is short circuited to ground. 6. No modulation and fIF = 10.7 MHz. 1999 Jan 22 9 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS AC CHARACTERISTICS VCC = 2.7 V; Tamb = 25 °C; for application diagram see Figs 9 and 10; fi(RF) = 433.92 MHz (see Table 4) and fi(RF) = 868.35 MHz (see Table 5); fmod = 1 kHz square wave; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT System performance fi(RF) RF input frequency 250 − fIF IF frequency 10.56 10.7 10.84 MHz Pi(max) maximum input power − − 3 dBm ASK mode; BER ≤ 3%; notes 1 and 2 −22 −16 −10 dBm FSK mode; BER ≤ 3%; notes 2 and 3 −6 0 +1 dBm 920 MHz PSPUR spurious radiation note 4 − − −57 dBm fDATA data frequency note 5 − 1 − kHz ton(RX) receiver turn-on time notes 6 and 7 fi(RF) = 433.92 MHz − 6 10 ms fi(RF) = 868.35 MHz − 3 7 ms 1.1 − 1.6 V fi(RF) = 433.92 MHz − −119 −113 dBm fi(RF) = 868.35 MHz − −116 −110 dBm BER ≤ 3%; notes 2 and 3 − VRSSI RSSI voltage ASK mode Φi(ASK) input sensitivity directly into pin MIXIN BER ≤ 3%; notes 1 and 2 FSK mode Φi(FSK) input sensitivity directly into pin MIXIN ∆f frequency deviation (peak value) −103 −100 dBm 4 10 75 kHz ∆Φ(FSK)(max) maximum sensitivity degradation ∆f = 4 kHz − − 3 dB Gdem note 8 0.75 1.0 1.25 mV ---------kHz fi(RF) = 433.92 MHz − 600 − Ω demodulator gain Mixer and post mixer amplifier Zi input impedance of mixer IP3PMA interception point (mixer + PMA) GPMA gain (mixer + PMA) Zo(IF) output impedance of IF amplifier fi(RF) = 868.35 MHz 1999 Jan 22 note 9 10 − 300 − Ω −38 −30 − dBm 40 42 50 dB 280 330 380 Ω Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver SYMBOL PARAMETER CONDITIONS UAA3220TS MIN. TYP. MAX. UNIT Limiter limiter input resistance 40 48 56 kΩ RCPC data buffer output resistance at pin 17 24 30 36 kΩ Gbuffer data buffer AC gain 12 13 14 dB RCPA,CPB data buffer output resistance at pins 15 and 16 120 150 180 kΩ 50 − 100 kHz Ri(LIN) Buffer Data slicer; see Chapter “DC characteristics” Bds internal data slicer bandwidth Notes 1. 100% AM modulation (ASK); available power from generator into a 50 Ω load. 2. With external matching network, to transform the impedance to 50 Ω. 3. ∆f = 10 kHz; available power from generator into a 50 Ω load. 4. Measured at the RF input connector of the test board into a 50 Ω load; fi(RF) = 25 MHz to 1 GHz. 5. The data frequency range can be varied by changing C30 to C32 (see Figs 9 and 10) to match other bit rates. Data frequency determined by data slicer application. 6. ton = 50 ms; toff = 138 ms; P = Psens + 3 dB. 7. The given turn-on time is only valid during strobing by pin PWD; if the IC is strobed on and off by the supply voltage the turn-on time will be longer. 8. LC tank circuit (L60, C60) tuned to maximum phase slope. 9. GPMA is typically 6 dB lower when measured in the application, because of the load of the ceramic filter. 1999 Jan 22 11 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS INTERNAL CIRCUITRY Table 1 Equivalent pin circuits and pin voltages for rough test of printed-circuit board; VCC = 2.7 V; no input signal PIN NO. PIN SYMBOL DC VOLTAGE (V) 1 OGND 0 2 OSE 0.38 3 OSB 1.15 5 OSC 2.7 EQUIVALENT CIRCUIT 5 VCC 3 2 8.15 kΩ 1 GND MHA780 4 VCC 2.7 6 TEM 0.39 7 TN 2.21 8 TP 2.21 7 8 GND 9.6 kΩ VCC 5 6 MHA781 9 PWD − VCC 210 kΩ 9 10 DEMO1 2.24 11 DEMO2 2.24 12 GND 0 MGM750 7 kΩ 10 10 kΩ 7 kΩ 11 12 1999 Jan 22 12 MGM751 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver PIN NO. PIN SYMBOL DC VOLTAGE (V) 13 CGND 0 15 CPA 1.95 16 CPB 1.95 UAA3220TS EQUIVALENT CIRCUIT VCC 15 150 kΩ 150 kΩ 16 13 MGM753 14 DATA − VCC 1 kΩ 14 13 17 CPC MGM754 1.95 VCC 30 kΩ 17 GND MGM755 18 RSSI 1.16 10 kΩ 18 12 1999 Jan 22 13 MGM752 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver PIN NO. 19 PIN SYMBOL LFB DC VOLTAGE (V) UAA3220TS EQUIVALENT CIRCUIT 1.95 VCC 19 GND MGM756 20 LIN 1.95 VCC 48 kΩ 20 GND MGM757 21 VCCI 2.7 22 FA 1.25 21 330 Ω 22 GND MGM758 23 MIXIN 0.78 24 MGND 0 23 15 Ω MGM759 1999 Jan 22 14 24 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS TEST INFORMATION Tuning procedures TUNING PROCEDURE FOR AC TESTS 1. Turn on the signal generator (fi(RF) = 433.92 or 868.35 MHz; no modulation; RF input level = −50 dBm). 2. Tune first C50 (multiplier tank circuit), second C11 (RF stage input) to obtain a peak IF voltage at pin FA. TUNING PROCEDURE FOR ASK RECEPTION 1. Make sure that pin DEMO1 is short circuited to ground. 2. Turn on ASK modulation and check that data is appearing on the DATA output pin and proceed with the AC tests. TUNING PROCEDURE FOR FSK RECEPTION 1. Make sure that pins DEMO1 and DEMO2 are connected by the LC tank circuit. 2. Turn on FSK modulation (∆f = 10 kHz; RF input level = −103 dBm). 3. Tune C61 (or L60) (phase shifter LC tank circuit) to obtain a peak LF voltage at pin CPC. 4. Check that data is appearing on pin DATA and proceed with the AC tests. AC test conditions Table 2 Test signals The reference signal level Pref for the following tests is defined as the minimum input level in dBm to give a BER ≤ 3 × 10−2 (e.g. 60 bit errors per second for 2000 bits/s). All test signal levels refer to 50 Ω load condition. TEST SIGNAL FREQUENCY (MHz) DATA SIGNAL MODULATION MODULATION INDEX 1 2 433.92/868.35 1000 Hz square wave AM (ASK) 100% − 433.92/868.35 1000 Hz square wave FM (FSK) − 10 kHz 3 433.92/868.35 − no modulation − − 4 433.82/868.35 − no modulation − − 1999 Jan 22 15 FREQUENCY DEVIATION Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS Table 3 Tests and results P1 is the maximum available power from signal generator 1 at the input of the test board; P2 is the maximum available power from signal generator 2 at the input of the test board. GENERATOR TEST RESULT 1 2 ASK sensitivity into pin MIXIN (see Fig.5) modulated test signal 1; P1 ≤ −113 dBm for fi(RF) = 433.92 MHz; P1 ≤ −110 dBm for fi(RF) = 868.35 MHz − BER ≤ 3 × 10−2 (e.g. 60 bit errors per second for 2000 bits/s) FSK sensitivity into pin MIXIN (see Fig.5) modulated test signal 2; P1 ≤ −100 dBm − BER ≤ 3 × 10−2 (e.g. 60 bit errors per second for 2000 bits/s) Maximum input power modulated test signal 1; for ASK (see Fig.5) P1 ≥ −22 dBm − BER ≤ 3 × 10−2 (e.g. 60 bit errors per second for 2000 bits/s) Maximum input power modulated test signal 2; for FSK (see Fig.5) P1 ≥ −6 dBm − BER ≤ 3 × 10−2 (e.g. 60 bit errors per second for 2000 bits/s) Receiver turn-on time; see note 1 and Fig.4 modulated test signal 1 or 2; P1 = Pref + 3 dB − check that the first 10 bits are correct; error counting is started 10 ms after power down is switched into operating mode on Interception point (mixer + PMA) see note 2 and Fig.6 test signal 3; P1 = −40 dBm test signal 4; P2 = P1 measure with high impedance probe at pin FA IM3 IP3 PMA = P 1 + ---------- dBm (for IM3 see Fig.6) 2 Spurious radiation; see note 3 and Fig.7 − − no spurious signals (25 MHz to 1 GHz) with level higher than maximum PSPUR Notes 1. The voltage at pin PWD of the test circuit alternates between operating mode: on (50 ms; 0 V) and off (138 ms; VCC); see Fig.4. 2. Probe of spectrum analyzer connected to pin FA (pin 22). 3. Spectrum analyzer connected to the input of the test board. handbook, full pagewidth VPWD (V) 2.7 0 0 50 188 238 376 426 t (ms) MGM745 Fig.4 Timing diagram for pulsed power down voltage. 1999 Jan 22 16 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS GENERATOR 1 50 Ω BER TEST FACILITY (2) TEST CIRCUIT (1) MED900 (1) For test circuit see Fig.9. (2) For BER test facility see Fig.8. Fig.5 Test configuration A (single generator). GENERATOR 1 50 Ω 50 Ω 2-SIGNAL POWER COMBINER SPECTRUM ANALYZER WITH PROBE TEST CIRCUIT (1) GENERATOR 2 50 Ω IM3 ∆f ∆f ∆f ∆f = 100 kHz MED901 (1) For test circuit see Fig.9. Fig.6 Test configuration C (IP3). 1999 Jan 22 17 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver SPECTRUM ANALYZER INPUT IMPEDANCE 50 Ω UAA3220TS TEST CIRCUIT (1) MED902 (1) For test circuit see Fig.9. Fig.7 Test configuration D (spurious radiation). TX data SIGNAL GENERATOR MASTER CLOCK DEVICE UNDER TEST RX data BIT PATTERN GENERATOR PRESET DELAY delayed TX data DATA COMPARATOR INTEGRATE AND DUMP to error counter BER TEST BOARD MED904 Fig.8 BER test facility. 1999 Jan 22 18 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... RSSI C22 data output R20 C20 C12 C21 C33 C30 C32 C31 MGND MIXIN FA VCCI LIN LFB RSSI CPC CPB CPA DATA CGND 24 23 22 21 20 19 18 17 16 15 14 13 LIMITER AMPLIFIER AM/FM SWITCH DEMODULATOR MIXER PMA UAA3220TS 19 + DATA SLICER − OSCILLATOR MULTIPLIER ×3 ×2/×3 BIAS 1 2 3 4 5 6 7 8 9 10 11 12 OGND OSE OSB VCC OSC TEM TN TP PWD DEMO1 DEMO2 GND C50 R41 C41 C43 C61 L41 R50 X40 L50 L51 R60 R51 R40 C40 C51 VCC Fig.9 Application diagram (FSK reception). L60 Product specification C44 power-down UAA3220TS C70 MGM747 C60 C42 L40 Philips Semiconductors X20 C11 L10 Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver VCC RF input C10 APPLICATION INFORMATION ndbook, full pagewidth 1999 Jan 22 50 Ω This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... X20 RSSI C22 data output R20 C11 L10 C20 C12 C21 C33 C30 C32 C31 MGND MIXIN FA VCCI LIN LFB RSSI CPC CPB CPA DATA CGND 24 23 22 21 20 19 18 17 16 15 14 13 LIMITER AMPLIFIER AM/FM SWITCH DEMODULATOR MIXER PMA UAA3220TS 20 + DATA SLICER − OSCILLATOR MULTIPLIER ×3 ×2/×3 Philips Semiconductors VCC RF input C10 Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver ndbook, full pagewidth 1999 Jan 22 50 Ω BIAS 1 2 3 4 5 6 7 8 9 10 11 12 OGND OSE OSB VCC OSC TEM TN TP PWD DEMO1 DEMO2 GND MGM748 C50 C42 R41 L40 C41 C43 L41 R50 X40 L50 L51 R51 R40 C40 power-down C51 VCC Fig.10 Application diagram (ASK reception). Product specification C44 UAA3220TS C70 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver Table 4 UAA3220TS Component list for Figs 9 and 10; fi(RF) = 433.92 MHz COMPONENT CHARACTERISTICS TOLERANCE TEMPERATURE LOSS FACTOR COEFFICIENT AT 1 MHz (ppm/K) 330 Ω ±2% +50 − − ±2% +50 − − − − − − − +50 − − − COMPONENT VALUE R20 R40 1.8 kΩ R41 not placed − R50 1.2 kΩ ±2% QUALITY FACTOR SELF RESONANCE FREQUENCY − R51 1.5 kΩ ±2% +50 − − − R60 4.7 kΩ ±2% +50 − − − C10(1) 2.7 pF ±10% 0 ±30 tan δ ≤ 20 × 10−4 − − C11 3 to 10 pF − 0 ±300 tan δ ≤ 20 × 10−4 − − 10−4 C12 100 pF ±10% 0 ±30 tan δ ≤ 10 × − − C20 1 nF ±10% 0 ±30 tan δ ≤ 10 × 10−4 − − C21 47 nF ±10% 0 ±30 tan δ ≤ 10 × 10−4 − − 10−4 C22 1 nF ±10% 0 ±30 tan δ ≤ 10 × − − C30 2.7 nF ±10% 0 ±30 tan δ ≤ 10 × 10−4 − − C31 470 pF ±10% 0 ±30 tan δ ≤ 10 × 10−4 − − 10−4 C32 47 nF ±10% 0 ±30 tan δ ≤ 10 × − − C33 10 nF ±10% 0 ±30 tan δ ≤ 10 × 10−4 − − C40 1 nF ±10% 0 ±30 tan δ ≤ 20 × 10−4 − − 10−4 C41(1) 15 pF ±10% 0 ±30 tan δ ≤ 20 × − − C42 15 pF ±10% 0 ±30 tan δ ≤ 10 × 10−4 − − C43(1) 8.2 pF ±10% ±10% C44 1 nF C50 3 to 10 pF − C51 C60(2) 1 nF 82 pF ±10% ±10% tan δ ≤ 20 × 10−4 − − 0 ±30 tan δ ≤ 10 × 10−4 − − 0 ±300 tan δ ≤ 20 × 10−4 − − 0 ±30 0 ±30 0 ±30 tan δ ≤ 10 × 10−4 − − tan δ ≤ 10 × 10−4 − − 10−4 C61(2) 5 to 30 pF − 0 ±300 tan δ ≤ 10 × − − C70 not placed − − − − − L10(3) 8 nH ±5% +25 to +125 − ≥140 at 150 MHz ≥3 GHz L40 560 nH ±10% +25 to +125 − ≥45 at 100 MHz ≥400 MHz L41 100 nH ±10% +25 to +125 − ≥60 at 350 MHz ≥1 GHz L50(3) 8 nH ±5% +25 to +125 − ≥140 at 150 MHz ≥3 GHz L51(3) 8 nH ±5% +25 to +125 − ≥140 at 150 MHz ≥3 GHz L60(2) 2.2 µH ±10% +25 to +125 − ≥37 at 7.9 MHz ≥150 MHz X20 ceramic filter, Murata SFE 10.7 MA 5 A; see note 4 X40 3rd overtone crystal, 70.5367 MHz; see note 5 1999 Jan 22 21 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS Notes 1. C10, C41 and C43 can be placed as tuning capacitors on the PCB. 2. C60, C61 and L60 can be substituted by an LC tank. 3. L10, L50 and L51 are 3 turn air coils. 4. 3 dB bandwidth: 280 ± 50 kHz; insertion loss: 4 dB typical and 6 dB maximum; spurious: 30 dB minimum at 8 to 12 MHz; input and output impedance: 330 Ω. 5. Motional resistance: Rm ≤ 20 Ω; static capacitance: C0 ≤ 6 pF; load capacitance: CL = 6 pF; loaded parallel resonance frequency: 70.5367 MHz; drive level dependency: Rm ≤ 20 Ω (1 nW ≤ P ≤ 1 mW). 1999 Jan 22 22 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver Table 5 UAA3220TS Component list for Figs 9 and 10; fi(RF) = 868.35 MHz COMPONENT CHARACTERISTICS TOLERANCE TEMPERATURE COEFFICIENT (ppm/K) LOSS FACTOR AT 1 MHz COMPONENT VALUE QUALITY FACTOR SELF RESONANCE FREQUENCY R20 330 Ω ±5% ≤±100 − − − R40 1.5 kΩ ±5% ≤±100 − − − R41 not placed − − − − − R50 390 Ω ±5% ≤±100 − − − R51 330 Ω ±5% ≤±100 − − − R60 4.7 kΩ ±5% ≤±100 − − − C10 27 pF ±5% 0 ±30 tan δ ≤ 10 × 10−4 − − tan δ ≤ 20 × 10−4 − − 10−4 C11 1.7 to 3 pF − 0 ±300 C12 27 pF ±5% 0 ±30 tan δ ≤ 10 × − − C20 1 nF ±10% ±15%(1) tan δ ≤ 2.5% − − ±10% ±15%(1) tan δ ≤ 2.5% − − C21 47 nF C22 1 nF ±10% ±15%(1) tan δ ≤ 2.5% − − C30 3.3 nF ±10% ±15%(1) tan δ ≤ 2.5% − − ±10% ±15%(1) tan δ ≤ 2.5% − − C31 680 pF C32 10 nF ±10% ±15%(1) tan δ ≤ 2.5% − − C33 10 nF ±10% ±15%(1) tan δ ≤ 2.5% − − ±10% ±15%(1) tan δ ≤ 2.5% C40 1 nF − − 10−4 C41 12 pF ±5% 0 ±30 tan δ ≤ 10 × − − C42 12 pF ±5% 0 ±30 tan δ ≤ 10 × 10−4 − − 0 ±30 tan δ ≤ 15 × 10−4 − − 0 ±30 tan δ ≤ 10 × 10−4 − − 0 ±300 tan δ ≤ 20 × 10−4 − − tan δ ≤ 10 × 10−4 − − tan δ ≤ 10 × 10−4 − − 10−4 C43 4 pF ±0.25 pF ±5% C44 47 pF C50 2.5 to 6 pF − C51 C60(2) 47 pF 82 pF ±5% ±5% 0 ±30 0 ±30 C61(2) 5 to 30 pF − 0 ±300 tan δ ≤ 3.4 × − − C70 4.7 µF ±20% ±15%(1) tan δ ≤ 0.06 − − L10(3) − − − − − − L40 560 nH ±10% +25 to +125 − ≥30 at 25 MHz ≥415 MHz L41 39 nH ±10% +25 to +125 − ≥50 at 50 MHz ≥1.5 GHz L50(3) − − − − − − L51(3) − − − − − − L60(2) 2.2 µH ±10% +25 to +125 − ≥20 at 7.9 MHz ≥140 MHz X20 ceramic filter, Murata SFE 107 MA 5 A; see note 4 X40 3rd overtone crystal, 95.2944 MHz; see note 5 1999 Jan 22 23 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS Notes 1. Temperature coefficient given as maximum ∆C/C over temperature range. 2. C60, C61 and L60 can be substituted by an LC tank. 3. Realized as microstrip line; see Fig.12. 4. 3 dB bandwidth: 280 ± 50 kHz; insertion loss: 4 dB typical and 6 dB maximum; spurious: 30 dB minimum at 8 to 12 MHz; input and output impedance: 330 Ω. 5. Motional resistance: Rm ≤ 20 Ω; static capacitance: C0 ≤ 6 pF; load capacitance: CL = 6 pF; loaded parallel resonance frequency: 95.2944 MHz; drive level dependency: Rm ≤ 20 Ω (1 nW ≤ P ≤ 1 mW). 1999 Jan 22 24 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS 47 handbook, full pagewidth 44 top view bottom view VCC RSSI DATA out L60 C51 L51 L50 C33 C30 C32 C31 C61 C60 C22 R60 C20 R20 C21 L10 R51 L41 R50 X10 C12 C50 C43 R41 C44 C42 UAA3220TS L40 C70 C41 C10 C40 C11 R40 X40 MGM749 RF in Dimensions in mm. Fig.11 Printed-circuit board layout for fi(RF) = 433.92 MHz. 1999 Jan 22 25 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS 47 handbook, full pagewidth 46 bottom view jumper DATA out RSSI L60 C50 L41 C11 C42 C44 C40 R40 C41 C10 C43 R41 R20 C22 C21 C51 R51 C12 RF in CON9 C70 UAA3220TS C20 X20 n.p. R50 C33 C30 C32 C31 C61 C60 R60 L40 X40 MHB459 Dimensions in mm. Fig.12 Printed-circuit board layout for fi(RF) = 868.35 MHz. 1999 Jan 22 26 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS PACKAGE OUTLINE SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm D SOT340-1 E A X c HE y v M A Z 24 13 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 12 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.0 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 8.4 8.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.8 0.4 8 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT340-1 1999 Jan 22 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 93-09-08 95-02-04 MO-150AG 27 o Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver If wave soldering is used the following conditions must be observed for optimal results: SOLDERING Introduction to soldering surface mount packages • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Wave soldering Manual soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. To overcome these problems the double-wave soldering method was specifically developed. 1999 Jan 22 UAA3220TS When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. 28 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver UAA3220TS Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE REFLOW(1) WAVE BGA, SQFP not suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable suitable(2) suitable suitable suitable LQFP, QFP, TQFP not recommended(3)(4) suitable SSOP, TSSOP, VSO not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1999 Jan 22 29 Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver NOTES 1999 Jan 22 30 UAA3220TS Philips Semiconductors Product specification Frequency Shift Keying (FSK)/Amplitude Shift Keying (ASK) receiver NOTES 1999 Jan 22 31 UAA3220TS Philips Semiconductors – a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 545002/00/02/pp32 Date of release: 1999 Jan 22 Document order number: 9397 750 04896