ONSEMI NTMSD3P102R2SG

NTMSD3P102R2
FETKY™
P−Channel Enhancement−Mode
Power MOSFET and Schottky Diode
Dual SO−8 Package
Features
• High Efficiency Components in a Single SO−8 Package
• High Density Power MOSFET with Low RDS(on),
Schottky Diode with Low VF
• Independent Pin−Outs for MOSFET and Schottky Die
Allowing for Flexibility in Application Use
• Less Component Placement for Board Space Savings
• SO−8 Surface Mount Package,
Mounting Information for SO−8 Package Provided
• Pb−Free Packages are Available
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery−Powered Products,
i.e.: Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted).
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−20
V
Gate−to−Source Voltage − Continuous
VGS
"20
V
Thermal Resistance −
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4)
RqJA
PD
ID
ID
IDM
171
0.73
−2.34
−1.87
−8.0
°C/W
W
A
A
A
Thermal Resistance −
Junction−to−Ambient (Note 2)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4)
RqJA
PD
ID
ID
IDM
100
1.25
−3.05
−2.44
−12
°C/W
W
A
A
A
RqJA
PD
ID
ID
IDM
62.5
2.0
−3.86
−3.10
−15
°C/W
W
A
A
A
Operating and Storage Temperature Range
TJ, Tstg
−55 to
+150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = −20 Vdc, VGS = −4.5 Vdc,
Peak IL = −7.5 Apk, L = 5 mH, RG = 25 W)
EAS
140
mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
TL
SCHOTTKY DIODE
1.0 AMPERE
20 VOLTS
470 mV @ IF = 1.0 A
A
A
1
8
2
7
C
C
6
S
D
3
G
4
D
5
MARKING DIAGRAM &
PIN ASSIGNMENT
8
8
C
D D
E3P1xx
AYWW G
G
1
SO−8
CASE 751
STYLE 18
E3P1
xx
A
Y
WW
G
C
1
A
A
S G
= Device Code
= 02 or S
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
260
°C
Device
NTMSD3P102R2
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Minimum FR−4 or G−10 PCB, Steady State.
2. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick
single−sided), Steady State.
3. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick single
sided), t ≤ 10 seconds.
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
March, 2006 − Rev. 2
MOSFET
−3.05 AMPERES
−20 VOLTS
0.085 W @ VGS = −10 V
(TOP VIEW)
Thermal Resistance −
Junction−to−Ambient (Note 3)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Pulsed Drain Current (Note 4)
© Semiconductor Components Industries, LLC, 2006
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1
Package
Shipping †
SO−8
2500/Tape & Reel
NTMSD3P102R2G
SO−8
2500/Tape & Reel
(Pb−Free)
NTMSD3P102R2SG
SO−8
2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTMSD3P102R2/D
NTMSD3P102R2
SCHOTTKY MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Peak Repetitive Reverse Voltage
DC Blocking Voltage
VRRM
VR
20
V
Thermal Resistance − Junction−to−Ambient (Note 5)
RqJA
204
°C/W
Thermal Resistance − Junction−to−Ambient (Note 6)
RqJA
122
°C/W
Thermal Resistance − Junction−to−Ambient (Note 7)
RqJA
83
°C/W
IO
1.0
A
Peak Repetitive Forward Current (Note 7)
(Rated VR, Square Wave, 20 kHz, TA = 105°C)
IFRM
2.0
A
Non−Repetitive Peak Surge Current (Note 7)
(Surge Applied at Rated Load Conditions, Half−Wave, Single Phase, 60 Hz)
IFSM
20
A
Average Forward Current (Note 7)
(Rated VR, TA = 100°C)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
5. Minimum FR−4 or G−10 PCB, Steady State.
6. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick single−sided), Steady State.
7. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds.
SCHOTTKY ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 8)
Characteristic
Maximum Instantaneous Forward Voltage
Maximum Instantaneous Forward Voltage
Maximum Instantaneous Reverse Current
Maximum Voltage Rate of Change
Symbol
IF = 1.0 Adc
IF = 2.0 Adc
IF = 1.0 Adc
IF = 2.0 Adc
VR = 20 Vdc
VR = 20 Vdc
8. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%.
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2
VF
Value
Unit
Volts
TJ = 25°C
TJ = 125°C
VF
0.47
0.58
0.39
0.53
Volts
IR
TJ = 25°C
TJ = 125°C
mA
0.05
10
dV/dt
10,000
V/ms
NTMSD3P102R2
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 9)
Characteristic
Symbol
Min
Typ
Max
−20
−
−
−30
−
−
−
−
−
−
−1.0
−25
−
−
−100
−
−
100
−1.0
−
−1.7
3.6
−2.5
−
−
−
0.063
0.090
0.085
0.125
−
5.0
−
Ciss
−
518
750
Coss
−
190
350
Crss
−
70
135
td(on)
−
12
22
tr
−
16
30
td(off)
−
45
80
tf
−
45
80
td(on)
−
16
−
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(VGS = 0 Vdc, ID = −250 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = −20 Vdc, VGS = 0 Vdc, TJ = 25°C)
(VDS = −20 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
Gate−Body Leakage Current
(VGS = −20 Vdc, VDS = 0 Vdc)
IGSS
Gate−Body Leakage Current
(VGS = +20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
mAdc
nAdc
nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = −250 mAdc)
Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−State Resistance
(VGS = −10 Vdc, ID = −3.05 Adc)
(VGS = −4.5 Vdc, ID = −1.5 Adc)
RDS(on)
Forward Transconductance
(VDS = −15 Vdc, ID = −3.05 Adc)
gFS
Vdc
W
Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = −16 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
Output Capacitance
Reverse Transfer Capacitance
pF
SWITCHING CHARACTERISTICS (Notes 10 & 11)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VDD = −20 Vdc, ID = −3.05 Adc,
VGS = −10 Vdc,
RG = 6.0 W)
Fall Time
Turn−On Delay Time
(VDD = −20 Vdc, ID = −1.5 Adc,
VGS = −4.5 Vdc,
RG = 6.0 W)
Rise Time
Turn−Off Delay Time
Fall Time
Total Gate Charge
(VDS = −20 Vdc,
VGS = −10 Vdc,
ID = −3.05 Adc)
Gate−Source Charge
Gate−Drain Charge
ns
ns
tr
−
42
−
td(off)
−
32
−
tf
−
35
−
Qtot
−
16
25
Qgs
−
2.0
−
Qgd
−
4.5
−
VSD
−
−
−0.96
−0.78
−1.25
−
Vdc
trr
−
34
−
ns
ta
−
18
−
tb
−
16
−
QRR
−
0.03
−
nC
BODY−DRAIN DIODE RATINGS (Note 10)
Diode Forward On−Voltage
(IS = −3.05 Adc, VGS = 0 Vdc)
(IS = −3.05 Adc, VGS = 0 Vdc, TJ = 125°C)
Reverse Recovery Time
(IS = −3.05 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/ms)
Reverse Recovery Stored Charge
9. Handling precautions to protect against electrostatic discharge are mandatory.
10. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%.
11. Switching characteristics are independent of operating junction temperature.
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3
mC
NTMSD3P102R2
TYPICAL MOSFET ELECTRICAL CHARACTERISTICS
−ID, DRAIN CURRENT (AMPS)
VGS = −4 V
VGS = −4.6 V
VGS = −6 V
4
VGS = −4.8 V
TJ = 25°C
VGS = −3.6 V
VGS = −2.8 V
VGS = −3.2 V
VGS = −5 V
3
2
VGS = −2.6 V
1
0
0.25
0.5
0.75
1
1.25
VGS = −3 V
1.5
1.75
TJ = −55°C
1
1
2
3
4
5
Figure 2. Transfer Characteristics
ID = −3.05 A
TJ = 25°C
0.4
0.3
0.2
0.1
4
5
6
7
8
0.7
ID = −1.5 A
TJ = 25°C
0.6
0.5
0.4
0.3
0.2
0.1
0
2
3
4
5
6
7
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Gate−to−Source
Voltage
0.25
TJ = 25°C
0.2
VGS = −4.5 V
0.15
VGS = −10 V
0.1
1
TJ = 25°C
2
Figure 1. On−Region Characteristics
0.5
0.05
TJ = 100°C
3
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.6
3
4
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.7
0
VDS > = −10 V
5
0
2
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS = −4.4 V
VGS = −8 V
5
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
6
VGS = −10 V
2
3
4
5
6
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
−ID, DRAIN CURRENT (AMPS)
6
1.6
1.4
ID = −3.05 A
VGS = −10 V
1.2
1
0.8
0.6
−50
−25
0
25
50
75
100
125
−ID, DRAIN CURRENT (AMPS)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance vs. Drain Current and
Gate Voltage
Figure 6. On Resistance Variation with
Temperature
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4
150
NTMSD3P102R2
VGS = 0 V
VDS = 0 V
1200
C, CAPACITANCE (pF)
IDSS, LEAKAGE (nA)
10000
TJ = 150°C
1000
TJ = 125°C
100
VGS = 0 V
Ciss
1000
800
Ciss
Crss
600
Coss
400
Crss
200
TJ = 25°C
2
6
8
10
12
14
16
18
0
10
20
6
12
Q1
8
Q2
6
8
10
12
0
16
14
tf
tr
10
1
1
10
100
Qg, TOTAL GATE CHARGE (nC)
RG, GATE RESISTANCE (W)
Figure 9. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 10. Resistive Switching Time Variation
vs. Gate Resistance
3
VDS = −20 V
ID = −1.5 A
VGS = −4.5 V
100
tr
tf
1
td(off)
4
ID = −3.05 A
TJ = 25°C
4
20
td(on)
2
2
100
t, TIME (ns)
16
VGS
10
15
VDS = −20 V
ID = −3.05 A
VGS = −10 V
20
VDS
0
10
−VDS
Figure 8. Capacitance Variation
QT
4
5
Figure 7. Drain−to−Source Leakage Current
vs. Voltage
24 1000
8
0
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VOLTAGE (VOLTS)
10
0
5
−VGS
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
12
1000
t, TIME (ns)
4
10
IS, SOURCE CURRENT (AMPS)
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
10
td(off)
td(on)
100
VGS = 0 V
TJ = 25°C
2.5
2
1.5
1
0.5
0
0.2
0.4
0.6
0.8
1
RG, GATE RESISTANCE (W)
−VSD, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Resistive Switching Time Variation
vs. Gate Resistance
Figure 12. Diode Forward Voltage vs. Current
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5
1.2
NTMSD3P102R2
di/dt
IS
trr
ta
tb
TIME
0.25 IS
tp
IS
Figure 13. Diode Reverse Recovery Waveform
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESPONSE
1.0
D = 0.5
0.2
0.1
0.1
0.05
Normalized to RqJA at Steady State (1″ pad)
Chip
Junction 2.32 W
18.5 W
50.9 W
37.1 W
56.8 W
0.02
0.0014 F
0.01
0.01
1E−03
0.0073 F
0.022 F
0.105 F
0.484 F
24.4 W
3.68 F
Ambient
Single Pulse
1E−02
1E−01
1E+00
1E+01
1E+02
1E+03
t, TIME (s)
Figure 14. FET Thermal Response
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
10
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
10
TJ = 125°C
1.0
85°C
25°C
−40°
C
0.1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
TJ = 125°C
85°C
1.0
25°C
0.1
0
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
0.2
0.4
0.6
0.8
1.0
1.2
VF, MAXIMUM INSTANTANEOUS
FORWARD VOLTAGE (VOLTS)
Figure 15. Typical Forward Voltage
Figure 16. Maximum Forward Voltage
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6
1.4
IR , REVERSE CURRENT (AMPS)
1E−2
TJ = 125°C
1E−3
85°C
1E−4
1E−5
25°C
1E−6
1E−7
0
5.0
10
15
20
IR, MAXIMUM REVERSE CURRENT (AMPS)
NTMSD3P102R2
1E−1
TJ = 125°C
1E−2
1E−3
1E−4
25°C
1E−5
1E−6
0
5.0
VR, REVERSE VOLTAGE (VOLTS)
IO, AVERAGE FORWARD CURRENT (AMPS)
C, CAPACITANCE (pF)
TYPICAL CAPACITANCE AT 0 V = 170 pF
100
5.0
10
15
20
Figure 18. Maximum Reverse Current
1000
0
15
VR, REVERSE VOLTAGE (VOLTS)
Figure 17. Typical Reverse Current
10
10
20
1.6
dc
1.4
FREQ = 20 kHz
SQUARE WAVE
1.2
1.0
Ipk/Io = p
0.8
Ipk/Io = 5.0
0.6
Ipk/Io = 10
0.4
Ipk/Io = 20
0.2
0
0
VR, REVERSE VOLTAGE (VOLTS)
20
40
60
80
100
120
TA, AMBIENT TEMPERATURE (°C)
Figure 19. Typical Capacitance
Figure 20. Current Derating
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7
140
160
NTMSD3P102R2
PFO, AVERAGE POWER DISSIPATION (WATTS)
TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS
0.7
0.6
Ipk/Io = p
0.5
dc
SQUARE
WAVE
Ipk/Io = 5.0
0.4
Ipk/Io = 10
Ipk/Io = 20
0.3
0.2
0.1
0
0
0.5
1.0
1.5
2.0
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 21. Forward Power Dissipation
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1.0
D = 0.5
0.2
0.1
0.1
NORMALIZED TO RqJA AT STEADY STATE (1″ PAD)
0.05
0.02
0.0031 W
CHIP
JUNCTION 0.0014 F
0.01
0.01
0.0154 W
0.1521 W 0.4575 W 0.3719 W
0.0082 F
0.1052 F
SINGLE PULSE
0.001
1.0E−05
1.0E−04
2.7041 F 158.64 F
AMBIENT
1.0E−03
1.0E−02
1.0E−01
t, TIME (s)
1.0E+00
Figure 22. Schottky Thermal Response
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1.0E+01
1.0E+02
1.0E+03
NTMSD3P102R2
PACKAGE DIMENSIONS
SO−8 NB
CASE 751−07
ISSUE AG
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
1
0.25 (0.010)
M
Y
M
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
H
0.10 (0.004)
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
STYLE 18:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8 _
0.25
0.50
5.80
6.20
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
FETKY is a registered trademark of International Rectifier Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your
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NTMD3P102R2/D